Patents by Inventor Lumin Li

Lumin Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070076346
    Abstract: An electrostatic chuck assembly having a dielectric material and/or having a cavity with varying thickness, profile and/or shape is disclosed. The electrostatic chuck assembly includes a conductive support and an electrostatic chuck ceramic layer. A dielectric layer or insert is located between the conductive support and an electrostatic chuck ceramic layer. A cavity is located in a seating surface of the electrostatic chuck ceramic layer. An embedded pole pattern can be optionally incorporated in the electrostatic chuck assembly. Methods of manufacturing the electrostatic chuck assembly are disclosed as are methods to improve the uniformity of a flux field above a workpiece during a plasma processing process.
    Type: Application
    Filed: September 30, 2005
    Publication date: April 5, 2007
    Inventors: Rajinder Dhindsa, Eric Lenz, Lumin Li, Felix Kozakevich
  • Publication number: 20070044915
    Abstract: A vacuum plasma processor includes a roof structure including a dielectric window carrying (1) a semiconductor plate having a high electric conductivity so it functions as an electrode, (2) a hollow coil and (3) at least one electric shield. The shield, coil and semiconductor plate are positioned to prevent substantial coil generated electric field components from being incident on the semiconductor plate. During a first interval the coil produces an RF electromagnetic field that results in a plasma that strips photoresist from a semiconductor wafer. During a second interval the semiconductor plate and another electrode produce an RF electromagnetic field that results in a plasma that etches electric layers, underlayers and photoresist layers from the wafer.
    Type: Application
    Filed: August 25, 2006
    Publication date: March 1, 2007
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Tuqiang Ni, Wenli Collison, David Hemker, Lumin Li
  • Publication number: 20070026677
    Abstract: A method for etching features in a dielectric layer is provided. A mask is formed over the dielectric layer. A protective silicon-containing coating is formed on exposed surfaces of the mask. The features are etched through the mask and protective silicon-containing coating. The features may be partially etched before the protective silicon-containing coating is formed.
    Type: Application
    Filed: August 22, 2006
    Publication date: February 1, 2007
    Inventors: Bing Ji, Erik Edelberg, Takumi Yanagawa, Zhisong Huang, Lumin Li
  • Patent number: 7169695
    Abstract: A method for forming a dual damascene feature is provided. Vias are formed in an etch layer. A trench patterned mask is provided over the etch layer. A trench is etched, where the etching the trench comprises a cycle of forming protective sidewalls over the sidewalls of the vias and etching a trench through the trench patterned mask. The mask is then stripped.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: January 30, 2007
    Assignee: Lam Research Corporation
    Inventors: Zhisong Huang, Lumin Li, Reza Sadjadi
  • Publication number: 20070012659
    Abstract: A method for etching a high aspect ratio feature through a mask into a layer to be etched over a substrate is provided. The substrate is placed in a process chamber, which is able to provide RF power at a first frequency, a second frequency different than the first frequency, and a third frequency different than the first and second frequency. An etchant gas is provided to the process chamber. A first etch step is provided, where the first frequency, the second frequency, and the third frequency are at power settings for the first etch step. A second etch step is provided, where the first frequency, the second frequency, and the third frequency are at a different power setting.
    Type: Application
    Filed: September 21, 2006
    Publication date: January 18, 2007
    Inventors: Camelia Rusu, Rajinder Dhindsa, Eric Hudson, Mukund Srinivasan, Lumin Li, Felix Kozakevich
  • Publication number: 20070002562
    Abstract: An emergency device having a housing with an illumination device, and a receiver, tuner and speakers positioned within the housing. A power source is electrically coupled with the emergency device and is generally a conventional power cord. An outage circuit is coupled with the power source. Upon sensing a power outage, the outage circuit, which is connected to the illuminating device, illuminates the illuminating device or another auxiliary device.
    Type: Application
    Filed: May 17, 2006
    Publication date: January 4, 2007
    Inventors: Weston VanWambeke, Aaron Erter, Brian Kagen, Lumin Li, David Shaver
  • Patent number: 7144521
    Abstract: A method for etching a high aspect ratio feature through a mask into a layer to be etched over a substrate is provided. The substrate is placed in a process chamber, which is able to provide RF power at a first frequency, a second frequency different than the first frequency, and a third frequency different than the first and second frequency. An etchant gas is provided to the process chamber. A first etch step is provided, where the first frequency, the second frequency, and the third frequency are at power settings for the first etch step. A second etch step is provided, where the first frequency, the second frequency, and the third frequency are at a different power setting.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: December 5, 2006
    Assignee: Lam Research Corporation
    Inventors: Camelia Rusu, Rajinder Dhindsa, Eric A. Hudson, Mukund Srinivasan, Lumin Li, Felix Kozakevich
  • Patent number: 7105102
    Abstract: A vacuum plasma processor includes a roof structure including a dielectric window carrying (1) a semiconductor plate having a high electric conductivity so it functions as an electrode, (2) a hollow coil and (3) at least one electric shield. The shield, coil and semiconductor plate are positioned to prevent substantial coil generated electric field components from being incident on the semiconductor plate. During a first interval the coil produces an RF electromagnetic field that results in a plasma that strips photoresist from a semiconductor wafer. During a second interval the semiconductor plate and another electrode produce an RF electromagnetic field that results in a plasma that etches electric layers, underlayers and photoresist layers from the wafer.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: September 12, 2006
    Assignee: LAM Research Corporation
    Inventors: Tuqiang Ni, Wenli Collison, David Hemker, Lumin Li
  • Publication number: 20060118518
    Abstract: A method for etching a high aspect ratio feature through a mask into a layer to be etched over a substrate is provided. The substrate is placed in a process chamber, which is able to provide RF power at a first frequency, a second frequency different than the first frequency, and a third frequency different than the first and second frequency. An etchant gas is provided to the process chamber. A first etch step is provided, where the first frequency, the second frequency, and the third frequency are at power settings for the first etch step. A second etch step is provided, where the first frequency, the second frequency, and the third frequency are at a different power setting.
    Type: Application
    Filed: December 15, 2003
    Publication date: June 8, 2006
    Inventors: Camelia Rusu, Rajinder Dhindsa, Eric Hudson, Mukund Srinivasan, Lumin Li, Felix Kozakevich
  • Patent number: 6984288
    Abstract: A vacuum plasma chamber for processing a workpiece includes first and second electrodes for electrical coupling with gas in the chamber and respectively connected to first and second relatively high and low frequency RF sources. The chamber includes a wall at a reference potential and a plasma confinement region spaced from the wall. A filter arrangement connected to the sources and the electrodes enables current from the first source to flow to the first electrode, prevents the substantial flow of current from the first source to the second electrode and the second source, and enables current from the second source to flow to the first and second electrodes and prevents the substantial flow of current from the second source to the first source.
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: January 10, 2006
    Assignee: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Mukund Srinivasan, Eric Lenz, Lumin Li
  • Publication number: 20050039682
    Abstract: A workpiece is processed with a plasma in a vacuum plasma processing chamber by exciting the plasma at several frequencies such that the excitation of the plasma by the several frequencies simultaneously causes several different phenomena to occur in the plasma. The chamber includes central top and bottom electrodes and a peripheral top and/or bottom electrode arrangement that is either powered by RF or is connected to a reference potential by a filter arrangement that passes at least one of the plasma excitation frequencies to the exclusion of other frequencies.
    Type: Application
    Filed: August 22, 2003
    Publication date: February 24, 2005
    Inventors: Raj Dhindsa, S.M. Sadjadi, Felix Kozakevich, Dave Trussell, Lumin Li, Eric Lenz, Camelia Rusu, Mukund Srinivasan, Aaron Eppler, Jim Tietz, Jeffrey Marks
  • Publication number: 20050037624
    Abstract: A method for etching a feature in a layer through an etching mask is provided. A protective layer is formed on exposed surfaces of the etching mask and vertical sidewalls of the feature with a passivation gas mixture. The feature is etched through the etching mask with reactive etching mixtures containing at least one etching chemical and at least one passivation chemical.
    Type: Application
    Filed: September 20, 2004
    Publication date: February 17, 2005
    Inventors: Zhisong Huang, Lumin Li
  • Publication number: 20050006028
    Abstract: A plasma processing apparatus for processing a substrate is provided. A plasma processing chamber with chamber walls is provided. A substrate support is provided within the chamber walls. At least one confinement ring is provided, where the confinement ring and the substrate support define a plasma volume. A magnetic source for generating a magnetic field for magnetically enhancing physical confinement provided by the at least one confinement ring is provided.
    Type: Application
    Filed: June 20, 2003
    Publication date: January 13, 2005
    Inventors: Douglas Keil, Lumin Li, Eric Hudson, Reza Sadjadi, Eric Lenz, Rajinder Dhindsa, Ji Kim
  • Patent number: 6833325
    Abstract: A method for etching a feature in a layer through an etching mask is provided. A protective layer is formed on exposed surfaces of the etching mask and vertical sidewalls of the feature with a passivation gas mixture. The feature is etched through the etching mask with reactive etching mixtures containing at least one etching chemical and at least one passivation chemical.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: December 21, 2004
    Assignee: Lam Research Corporation
    Inventors: Zhisong Huang, Lumin Li
  • Publication number: 20040173159
    Abstract: Disclosed is an electrode used for processing a semiconductor wafer through plasma etching operations. The electrode is disposed within a process chamber that includes a support chuck for holding the semiconductor wafer and a pair of RF power sources. The electrode has a center region, a first surface and a second surface. The first surface is configured to receive processing gases from a source and to flow the processing gases into the center region. The second surface has a plurality of gas feed holes that are continuously coupled to a corresponding plurality of electrode openings. Electrode opening diameters are greater than gas feed hole diameters. The plurality of electrode openings define an electrode surface that is over a wafer surface. The electrode surface assists in defining an electrode plasma sheath surface area which causes an increase in bias voltage onto the wafer surface, thereby increasing the ion bombardment energy over the wafer without increasing the plasma density.
    Type: Application
    Filed: March 8, 2004
    Publication date: September 9, 2004
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Andras Kuthi, Lumin Li
  • Publication number: 20040154747
    Abstract: A vacuum plasma processor includes a roof structure including a dielectric window carrying (1) a semiconductor plate having a high electric conductivity so it functions as an electrode, (2) a hollow coil and (3) at least one electric shield. The shield, coil and semiconductor plate are positioned to prevent substantial coil generated electric field components from being incident on the semiconductor plate. During a first interval the coil produces an RF electromagnetic field that results in a plasma that strips photoresist from a semiconductor wafer. During a second interval the semiconductor plate and another electrode produce an RF electromagnetic field that results in a plasma that etches electric layers, underlayers and photoresist layers from the wafer.
    Type: Application
    Filed: February 3, 2004
    Publication date: August 12, 2004
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Tuqiang Ni, Wenli Collison, David Hemker, Lumin Li
  • Patent number: 6746961
    Abstract: A semiconductor manufacturing process wherein high aspect ratio deep openings are plasma etched in a dielectric layer using an etchant gas which includes a fluorocarbon, a sulfur-containing gas, an oxygen-containing gas and an optional carrier gas. The etchant gas can include CxFyHz such as C4F8, SO2, O2 and Ar. The combination of the sulfur-containing gas and the oxygen-containing gas provides profile control of the deep openings.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: June 8, 2004
    Assignee: Lam Research Corporation
    Inventors: Tuqiang Ni, Lumin Li
  • Publication number: 20040072430
    Abstract: A method for forming a dual damascene feature is provided. Vias are formed in an etch layer. A trench patterned mask is provided over the etch layer. A trench is etched, where the etching the trench comprises a cycle of forming protective sidewalls over the sidewalls of the vias and etching a trench through the trench patterned mask. The mask is then stripped.
    Type: Application
    Filed: September 29, 2003
    Publication date: April 15, 2004
    Inventors: Zhisong Huang, Lumin Li, Reza Sadjadi
  • Publication number: 20040072443
    Abstract: A method for etching a feature in a layer through an etching mask is provided. A protective layer is formed on exposed surfaces of the etching mask and vertical sidewalls of the feature with a passivation gas mixture. The feature is etched through the etching mask with reactive etching mixtures containing at least one etching chemical and at least one passivation chemical.
    Type: Application
    Filed: November 14, 2002
    Publication date: April 15, 2004
    Applicant: Lam Research Corporation
    Inventors: Zhisong Huang, Lumin Li
  • Patent number: 6716303
    Abstract: A vacuum plasma processor includes a roof structure including a dielectric window carrying (1) a semiconductor plate having a high electric conductivity so it functions as an electrode, (2) a hollow coil and (3) at least one electric shield. The shield, coil and semiconductor plate are positioned to prevent substantial coil generated electric field components from being incident on the semiconductor plate. During a first interval the coil produces an RF electromagnetic field that results in a plasma that strips photoresist from a semiconductor wafer. During a second interval the semiconductor plate and another electrode produce an RF electromagnetic field that results in a plasma that etches electric layers, underlayers and photoresist layers from the wafer.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: April 6, 2004
    Assignee: Lam Research Corporation
    Inventors: Tuqiang Ni, Wenli Collison, David Hemker, Lumin Li