Patents by Inventor Lun Huang

Lun Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240160844
    Abstract: The present disclosure provides a synonym searching method, which includes steps as follows. When receiving the vocabulary and the definition of the vocabulary from the user device, the natural language processing model is used to search the synonym of the vocabulary from the data governance dictionary according to the definition of the vocabulary; after providing the synonym to the user device, feedback information about the synonym is received from the user device, and the feedback information is used as the token of the vocabulary for the natural language processing model.
    Type: Application
    Filed: February 8, 2023
    Publication date: May 16, 2024
    Inventors: Wei-Chao CHEN, Chen-I HUANG, Yu-Lun CHANG, Chuo-Jui WU, Chih-Pin WEI
  • Publication number: 20240161502
    Abstract: A method for detecting and correcting cycle time includes multiple steps performed by a computing device, and these steps include: obtaining a video from a camera, obtaining a bounding box from an input device, inputting the bounding box and the video to a cycle time detection model to generate a preliminary report, wherein the bounding box is used to set a region of interest in the video, the preliminary report includes a plurality of candidate events, and each candidate event includes a start time and a candidate cycle time, receiving a revision label associated with at least one candidate event from the input device, and tuning a hyper-parameter of the cycle time detection model according to the revision label.
    Type: Application
    Filed: February 9, 2023
    Publication date: May 16, 2024
    Inventors: Jing-Lun Huang, Yu-Lun Chang, Wei-Chao Chen
  • Publication number: 20240140338
    Abstract: An electrostatic eliminating device comprises an electrostatic input terminal, an electrostatic absorption circuit, an electrostatic output terminal. The electrostatic absorption circuit is configured to absorb static electricity accessed to the input end of the electrostatic absorption circuit. The electrostatic input terminal is connected with the door handle, and the electrostatic output terminal is connected with the door handle or the human body to form a circuit, so that the electrostatic ab sorption circuit can absorb the incoming electrostatic charges to avoid the concentration of electrostatic charges on the door handle, which may cause the user to feel electric shock when touching the door handle.
    Type: Application
    Filed: April 23, 2023
    Publication date: May 2, 2024
    Applicants: Futaijing Precision Electronics (Yantai) Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: YU-LUN HUANG
  • Publication number: 20240144868
    Abstract: The present disclosure provides a pixel circuit with pulse width compensation, and the pixel circuit includes a pulse width modulation circuit and a pulse amplitude modulation circuit, and the pulse amplitude modulation circuit is electrically connected to the pulse width modulation circuit. The pulse width modulation circuit includes a P-type pulse width compensation transistor and a first P-type control transistor, and the first P-type control transistor is electrically connected to the P-type pulse width compensation transistor. The pulse amplitude modulation circuit includes a second P-type control transistor, a first capacitor, a P-type driving transistor and a light-emitting element. The second P-type control transistor is electrically connected to the first P-type control transistor. The first capacitor is electrically connected to the second P-type control transistor.
    Type: Application
    Filed: December 8, 2022
    Publication date: May 2, 2024
    Inventors: De-Fu CHEN, Po Lun CHEN, Chun-Ta CHEN, Ta-Jen HUANG, Po-Tsun LIU, Guang-Ting ZHENG, Ting-Yi YI
  • Publication number: 20240145470
    Abstract: A method for processing an integrated circuit includes forming first and second gate all around transistors. The method forms a dipole oxide in the first gate all around transistor without forming the dipole oxide in the second gate all around transistor. This is accomplished by entirely removing an interfacial dielectric layer and a dipole-inducing layer from semiconductor nanosheets of the second gate all around transistor before redepositing the interfacial dielectric layer on the semiconductor nanosheets of the second gate all around transistor.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: Lung-Kun CHU, Mao-Lin HUANG, Chung-Wei HSU, Jia-Ni YU, Kuo-Cheng CHIANG, Kuan-Lun CHENG, Chih-Hao WANG
  • Patent number: 11971528
    Abstract: An image capturing optical system includes seven lens elements, the seven lens elements being, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. An image-side surface of the fifth lens element is convex in a paraxial region thereof. An image-side surface of the sixth lens element is concave in a paraxial region thereof. The seventh lens element has negative refractive power.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: April 30, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Po-Lun Hsu, Hsin-Hsuan Huang
  • Patent number: 11973077
    Abstract: A device includes a transistor, a backside via, and a pair of sidewall spacers. The transistor includes a gate structure, a channel layer surrounded by the gate structure, and a first source/drain structure and a second source/drain structure connected to the channel layer. The backside via is under and connected to the first source/drain structure and includes a first portion, a second portion between the first portion and the first source/drain structure, and a third portion tapering from the first portion to the second portion in a cross-sectional view. The pair of sidewall spacers are on opposite sidewalls of the second portion of the backside via but not on opposite sidewalls of the first portion of the backside via.
    Type: Grant
    Filed: April 21, 2023
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wang-Chun Huang, Hou-Yu Chen, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11969815
    Abstract: An automatic material changing and welding system for stamping materials includes a welding transfer sliding table and a welding platform. The automatic material changing device further includes a feeding system. The feeding system includes a double-head uncoiling machine, an automatic feeding machine and a flattening machine. The automatic material changing device is used for automatic feeding for a stamping machine. The system triggers a material changing signal through a sensor to control and integrate the welding transfer sliding table and the welding platform to act to execute a welding procedure, so that the stamping materials are in welding connection with new and old coiled materials through a welding connection plate to realize continuous production operation of an automated stamping production line.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: April 30, 2024
    Assignee: NATIONAL KAOHSIUNG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Chun-Chih Kuo, Hao-Lun Huang, Bor-Tsuen Lin, Cheng-Yu Yang
  • Publication number: 20240134159
    Abstract: An image capturing optical system includes seven lens elements, the seven lens elements being, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. An image-side surface of the fifth lens element is convex in a paraxial region thereof. An image-side surface of the sixth lens element is concave in a paraxial region thereof. The seventh lens element has negative refractive power.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Inventors: Po-Lun HSU, Hsin-Hsuan HUANG
  • Publication number: 20240135897
    Abstract: The present disclosure provides a scan driving circuit, which includes a pull-up output charging circuit, a pull-down discharge circuit, a pre-charge circuit, an anti-noise start-up circuit and an anti-noise pull-down discharge circuit. The pull-up output charging circuit is electrically connected to an output terminal, and the pull-down discharge circuit is electrically connected to the output terminal. The pre-charge circuit is electrically connected to the pull-up output charging circuit and the pull-down discharge circuit through a driving node. The anti-noise start-up circuit is electrically connected to the pre-charge circuit. The anti-noise pull-down discharge circuit is electrically connected to the anti-noise start-up circuit, and the anti-noise pull-down discharge circuit is electrically connected to the driving node.
    Type: Application
    Filed: December 11, 2022
    Publication date: April 25, 2024
    Inventors: De-Fu CHEN, Po Lun CHEN, Chun-Ta CHEN, Ta-Jen HUANG, Po-Tsun LIU, Guang-Ting ZHENG, Ting-Yi YI
  • Publication number: 20240136213
    Abstract: In an embodiment, a system, includes: a first pressurized load port interfaced with a workstation body; a second pressurized load port interfaced with the workstation body; the workstation body maintained at a set pressure level, wherein the workstation body comprises an internal material handling system configured to move a semiconductor workpiece within the workstation body between the first and second pressurized load ports at the set pressure level; a first modular tool interfaced with the first pressurized load port, wherein the first modular tool is configured to process the semiconductor workpiece; and a second modular tool interfaced with the second pressurized load port, wherein the second modular tool is configured to inspect the semiconductor workpiece processed by the first modular tool.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Chun-Jung HUANG, Yung-Lin HSU, Kuang Huan HSU, Jeff CHEN, Steven HUANG, Yueh-Lun YANG
  • Publication number: 20240133698
    Abstract: A method of route planning and an electronic device using the same method are provided. The method includes: obtaining multiple route points, and generating a route set according to the route points, wherein a first route in the route set includes a first order corresponding to the route points, wherein the first order includes a first route point and a second route point adjacent to the first route point; obtaining multiple weights respectively corresponding to the route points; calculating a first score of the first route according to a distance or time between the first route point and the second route point and the weights, and selecting the first route from the route set as a recommended route according to the first score; and outputting the recommended route.
    Type: Application
    Filed: December 20, 2022
    Publication date: April 25, 2024
    Applicant: Wistron Corporation
    Inventor: Kuo-Lun Huang
  • Patent number: 11967096
    Abstract: A depth estimation from focus method and system includes receiving input image data containing focus information, generating an intermediate attention map by an AI model, normalizing the intermediate attention map into a depth attention map via a normalization function, and deriving expected depth values for the input image data containing focus information from the depth attention map. The AI model for depth estimation can be trained unsupervisedly without ground truth depth maps. The AI model of some embodiments is a shared network estimating a depth map and reconstructing an AiF image from a set of images with different focus positions.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: April 23, 2024
    Assignee: MEDIATEK INC.
    Inventors: Ren Wang, Yu-Lun Liu, Yu-Hao Huang, Ning-Hsu Wang
  • Patent number: 11961489
    Abstract: The present disclosure provides a scan driving circuit, which includes a pull-up output charging circuit, a pull-down discharge circuit, a pre-charge circuit, an anti-noise start-up circuit and an anti-noise pull-down discharge circuit. The pull-up output charging circuit is electrically connected to an output terminal, and the pull-down discharge circuit is electrically connected to the output terminal. The pre-charge circuit is electrically connected to the pull-up output charging circuit and the pull-down discharge circuit through a driving node. The anti-noise start-up circuit is electrically connected to the pre-charge circuit. The anti-noise pull-down discharge circuit is electrically connected to the anti-noise start-up circuit, and the anti-noise pull-down discharge circuit is electrically connected to the driving node.
    Type: Grant
    Filed: December 11, 2022
    Date of Patent: April 16, 2024
    Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution Limited
    Inventors: De-Fu Chen, Po Lun Chen, Chun-Ta Chen, Ta-Jen Huang, Po-Tsun Liu, Guang-Ting Zheng, Ting-Yi Yi
  • Patent number: 11958200
    Abstract: An automatic robotic arm system and a coordinating method for robotic arm and computer vision thereof are disclosed. A beam-splitting mirror splits an incident light into a visible light and a ranging light and respectively guides to an image capturing device and an optical ranging device arranged in the different reference axes. In a calibration mode, a transformation relation is computed based on a plurality of the calibration postures and corresponding calibration images. In an operation mode, a mechanical space coordinate is determined based on an operation image and the transformation relation, and the robotic arm is controlled to move based on the mechanical space coordinate.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: April 16, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Hung-Hsin Chen, Chia-Jun Yu, Qi-Ming Huang, Chin-Lun Chang, Keng-Ning Chang
  • Patent number: 11961840
    Abstract: A semiconductor device structure is provided. The device includes one or more first semiconductor layers, each first semiconductor layer of the one or more first semiconductor layers is surrounded by a first intermixed layer, wherein the first intermixed layer comprises a first material and a second material.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang
  • Publication number: 20240121694
    Abstract: The disclosure is directed to a method of handling conditional handover with a candidate secondary cell group (SCG), a source master node, and a user equipment, which may be used to solve the above technical problems. The method includes: determining, by the source MN, a first execution condition of a first candidate primary cell (PCell); and receiving, by the source MN from a first candidate MN, a parameter of a second execution condition of a first candidate primary SCG cell (PSCell).
    Type: Application
    Filed: September 21, 2023
    Publication date: April 11, 2024
    Applicant: Acer Incorporated
    Inventor: Nai-Lun Huang
  • Patent number: D1024051
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: Hui-Jung Huang, Hong-Kuan Li, I-Lun Li, Ling-Mei Kuo, Kuan-Ju Chen, Fang-Ying Huang, Kai-Hung Huang, Szu-Wei Yang, Kai-Teng Cheng
  • Patent number: D1024054
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: I-Lun Li, Kai-Teng Cheng, Szu-Wei Yang, Fang-Ying Huang
  • Patent number: D1024995
    Type: Grant
    Filed: May 31, 2021
    Date of Patent: April 30, 2024
    Assignee: Acer Incorporated
    Inventors: I-Lun Li, Szu-Wei Yang, Fang-Ying Huang