Patents by Inventor Lun Huang

Lun Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240085611
    Abstract: A front light module includes a light guide sheet and a light bar. The light guide sheet has two light receiving laterals, a fold line, a first pattern area, and a second pattern area respectively located on two sides of the fold line. One light receiving lateral is protruded to form first taper sets, and the other is protruded to form second taper sets. The second pattern area is superimposed on the first pattern area, and the first and second tapers set are engaged and coplanar to form a light incident surface after folding along the fold line. The light bar provides light toward the light incident surface, the first pattern area is lit by the odd positions of the light bar via the first taper sets, and the second pattern area is lit by the even positions of the light bar via the second taper sets.
    Type: Application
    Filed: June 8, 2023
    Publication date: March 14, 2024
    Inventors: JIN-WEI TONG, HAO LU, FAN-WEI WU, WEI-LUN HUANG
  • Publication number: 20240080180
    Abstract: The federated learning system includes a moderator and client devices. Each client device performs a method for verifying model update as follows: receiving a hash function and a general model; training a client model according to the general model and raw data; calculating a difference as an update parameter between the general model and the client model, sending the update parameter to the moderator; inputting the update parameter to the hash function to generate a hash value; sending the hash value to other client devices, and receiving other hash values; summing all the hash values to generate a trust value; receiving an aggregation parameter calculated according to the update parameters; inputting the aggregation parameter to the hash function to generate a to-be-verified value; and updating the client model according to the aggregation parameter when the to-be-verified value equals the trust value.
    Type: Application
    Filed: December 20, 2022
    Publication date: March 7, 2024
    Inventors: Chih-Fan HSU, Wei-Chao CHEN, Jing-Lun Huang, Ming-Ching Chang, Feng-Hao Liu
  • Publication number: 20240013406
    Abstract: A trajectory predicting method and a computing system for trajectory prediction are provided. In the method, feature extraction is respectively performed on past trajectories of multiple target objects through an encoder to generate first trajectory information of the target objects. A pooling process is performed on the first trajectory information of the target objects to generate second trajectory information of the target objects. The second trajectory information of each target object includes location relationships relative to other target objects. Third trajectory information is obtained from the past trajectories of the target objects. The third trajectory information includes a moving direction, scene information, and/or a moving mode. The predicted trajectories of the target objects are generated according to the second trajectory information and the third trajectory information through a decoder. Accordingly, the accuracy of prediction can be improved.
    Type: Application
    Filed: October 27, 2022
    Publication date: January 11, 2024
    Applicant: Wistron Corporation
    Inventors: Xiu Zhi Chen, Jyun Hong He, Yen Lin Chen, Yung Jen Chen, Yi Kai Chiu, You Shiuan Lin, Kuo-Lun Huang, Ke Kang Chen, Shao-Chi Chen
  • Patent number: 11853613
    Abstract: An encoding control method, a memory storage device and a memory control circuit unit are disclosed. The method includes: performing, by an encoding circuit, a first encoding operation to generate first parity data according to write data, a first sub-matrix and a second sub-matrix of a parity check matrix; performing, by the encoding circuit, a second encoding operation to generate second parity data according to the write data, the first parity data, a third sub-matrix, a fourth sub-matrix and a fifth sub-matrix of the parity check matrix; and sending a first write command sequence to instruct a storing of the write data, the first parity data and the second parity data to a rewritable non-volatile memory module.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: December 26, 2023
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Yu-Hsiang Lin, Bo Lun Huang
  • Publication number: 20230393397
    Abstract: An example head-mounted device includes: a frame to nest the device on a head of a user; a biosensor disposed on the frame, the biosensor to: detect a biological characteristic of the user; generate a signal representing the biological characteristic of the user; and a power management controller coupled to the biosensor, the controller to, when the signal corresponds to a predefined profile, determine that the head-mounted device is in a transitional state and change a power state of the head-mounted device based on the transitional state.
    Type: Application
    Filed: October 15, 2020
    Publication date: December 7, 2023
    Inventors: David Steven Daley, Yih-Lun HUANG, Ling I HUNG
  • Patent number: 11824788
    Abstract: An apparatus connected to a Time-Sensitive Networking (TSN) switch in a TSN network is provided. The apparatus includes a transceiver, a storage medium, and a controller. The storage medium stores a first mapping of a traffic class to a time slot, and a second mapping of a frame type of a TSN stream to the traffic class. The controller is coupled to the transceiver and the storage medium, and is configured to determine a routing path and a Gate Control List (GCL) corresponding to the TSN stream based on a network topology of the TSN network, the first mapping, and the second mapping, and deploy the GCL to each TSN switch in the routing path via the transceiver.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: November 21, 2023
    Assignee: Moxa Inc.
    Inventors: Yueh-Ming Ko, Tzu-Lun Huang
  • Patent number: 11824444
    Abstract: A driver chip for a half-bridge circuit includes a drive module and a programming module. The drive module is configured to receive an enabling signal and at least one input signal. The drive module outputs a high-side output signal to a high-side switch and a low-side output signal to a low-side switch, respectively. The programming module includes a decoding unit configured to receive the enabling signal and the at least one input signal. The programming module further includes a preset unit coupled to the decoding unit. The decoding unit outputs decoded data to the preset unit, and the preset unit outputs a circuit parameter.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: November 21, 2023
    Assignee: MOTOR SEMICONDUCTOR CO., LTD.
    Inventor: Kuo-Lun Huang
  • Patent number: 11776292
    Abstract: An object identification method includes: generating a tracking sample and an adversarial sample; training a teacher model according to the tracking sample; and initializing a student model according to the teacher model. The student model adjusts a plurality of parameters according to the teacher model and the adversarial sample, in response to the vector difference between the output result of the student model and the output result of the teacher model being lower than the learning threshold, the student model is deemed to have completed training, and the student model is extracted as an object identification model.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: October 3, 2023
    Assignee: WISTRON CORP
    Inventor: Kuo-Lun Huang
  • Publication number: 20230289102
    Abstract: An encoding control method, a memory storage device and a memory control circuit unit are disclosed. The method includes: performing, by an encoding circuit, a first encoding operation to generate first parity data according to write data, a first sub-matrix and a second sub-matrix of a parity check matrix; performing, by the encoding circuit, a second encoding operation to generate second parity data according to the write data, the first parity data, a third sub-matrix, a fourth sub-matrix and a fifth sub-matrix of the parity check matrix; and sending a first write command sequence to instruct a storing of the write data, the first parity data and the second parity data to a rewritable non-volatile memory module.
    Type: Application
    Filed: April 20, 2022
    Publication date: September 14, 2023
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Yu-Hsiang Lin, Bo Lun Huang
  • Patent number: 11758100
    Abstract: A device may provide, to a camera and a projector of a portable projection mapping device, first instructions for calibrating the camera and the projector, and may receive, based on the first instructions, calibration parameters for the camera and the projector. The device may calculate a stereo calibration between the camera and the projector based on the calibration parameters, and may provide, to the camera, second instructions for recognizing a reference instrument associated with the portable projection mapping device. The device may receive, based on the second instructions, binocular images, and may determine additional parameters based on the binocular images. The device may determine recognition parameters for recognizing the reference instrument, based on the binocular images and the additional parameters.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: September 12, 2023
    Assignee: The Johns Hopkins University
    Inventors: Mehran Armand, Shuya Liu, Wei-Lun Huang, Austin Shin
  • Patent number: 11719907
    Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a housing, a base unit, a holding unit, a driving assembly, and a metal component. The base unit is connected to the housing. The holding unit is configured to hold an optical element having an optical axis and movable relative to the housing and the base. The driving assembly is configured to drive the holding unit to move relative to the housing and the base unit. The metal component is disposed in the base unit, wherein at least a portion of the metal component is connected to the driving assembly.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: August 8, 2023
    Assignee: TDK TAIWAN CORP.
    Inventors: Chien-Lun Huang, Yu-Cheng Lin, Fu-Yuan Wu, Chen-Chi Kuo, Sheng-Zong Chen
  • Publication number: 20230243973
    Abstract: A depth image is acquired using a time-of-flight (ToF) camera. The depth image has two-dimensional (2D) pixels on a plane of the depth image. The 2D pixels correspond to projections of three-dimensional (3D) pixels in a real space onto the plane. For each 3D pixel, 3D coordinates within a 3D camera coordinate system of the real space are calculated based on 2D coordinates of the 2D pixel to which the 3D pixel corresponds within a 2D image coordinate system of the plane, the depth image, and camera parameters of the ToF camera. The 3D pixels are mapped from the real space to a virtual space. An object within the real space within an image of the virtual space is reconstructed using the 3D pixels as mapped to the virtual space.
    Type: Application
    Filed: January 31, 2022
    Publication date: August 3, 2023
    Inventors: Ling I. Hung, David Daley, Yih-Lun Huang
  • Publication number: 20230231035
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A first recess and a second recess are formed in a first region and a second region of a semiconductor substrate, respectively. A bottom surface of the first recess is lower than a bottom surface of the second recess in a vertical direction. A first gate oxide layer and a second gate oxide layer are formed concurrently. At least a portion of the first gate oxide layer is formed in the first recess, and at least a portion of the second gate oxide layer is formed in the second recess. A removing process is performed for removing a part of the second gate oxide layer. A thickness of the second gate oxide layer is less than a thickness of the first gate oxide layer after the removing process.
    Type: Application
    Filed: February 17, 2022
    Publication date: July 20, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Lun Huang, Chia-Ling Wang, Chia-Wen Lu, Ta-Wei Chiu, Ping-Hung Chiang
  • Patent number: 11705489
    Abstract: A heterostructure, includes: a substrate; and a buffer layer that includes a plurality of layers having a composition AlxInyGa1-x-yN, where x?1 and y?0; wherein the buffer layer has a first region that includes at least two layers, a second region that includes at least two layers, and a third region that includes at least two layers.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: July 18, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Jia-Zhe Liu, Yen Lun Huang, Chih-Yuan Chuang, Che Ming Liu, Wen-Ching Hsu, Manhsuan Lin
  • Publication number: 20230223306
    Abstract: Semiconductor device and method of fabricating the same, the semiconductor device includes a substrate, a first transistor, a second transistor, a third transistor, and a plurality of shallow trench isolations. The first transistor is disposed in a medium-voltage region and includes a first plane, a first gate dielectric layer, and a first gate electrode. The second transistor is disposed in a boundary region and includes a second plane, a second gate dielectric layer, and a second gate electrode. The third transistor is disposed in a lower-voltage region and includes a third plane, a third gate dielectric layer, and a third gate electrode. The shallow trench isolations are disposed in the substrate, wherein top surfaces of the shallow trench isolations in the medium-voltage region, the boundary region and the low-voltage region are coplanar with top surfaces of the first gate dielectric layer and the second gate dielectric layer.
    Type: Application
    Filed: February 15, 2022
    Publication date: July 13, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ta-Wei Chiu, Ping-Hung Chiang, Chia-Wen Lu, Chia-Ling Wang, Wei-Lun Huang
  • Patent number: 11698959
    Abstract: A recognition method, for recognizing biological characteristic, includes the following: providing a database, wherein the database comprises a plurality of set biological characteristics and a plurality of function relationship between one of the set biological characteristics and a function; capturing, by an electronic device, a to-be-recognized biological characteristic of a user; comparing, by the first electronic device, the to-be-recognized biological characteristic with the set biological characteristics in the database; determining, by the electronic device, whether the to-be-recognized biological characteristic matches a matched one of the set biological characteristics; and when the to-be-recognized biological characteristic matches the matched one of the set biological characteristics, performing, by the electronic device or another electronic device, the function.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: July 11, 2023
    Assignee: GEAR RADIO ELECTRONICS CORP.
    Inventors: Han-Lun Huang, Chi-Hsueh Wang
  • Publication number: 20230215924
    Abstract: A heterostructure, includes: a substrate; and a buffer layer that includes a plurality of layers having a composition AlxInyGa1-x-yN, where x?1 and y?0; wherein the buffer layer has a first region that includes at least two layers, a second region that includes at least two layers, and a third region that includes at least two layers.
    Type: Application
    Filed: March 9, 2023
    Publication date: July 6, 2023
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Jia-Zhe Liu, Yen Lun Huang, Chih-Yuan Chuang, Che Ming Liu, Wen-Ching Hsu, Manhsuan Lin
  • Publication number: 20230201951
    Abstract: An automatic material changing and welding system for stamping materials includes a welding transfer sliding table and a welding platform. The automatic material changing device further includes a feeding system. The feeding system includes a double-head uncoiling machine, an automatic feeding machine and a flattening machine. The automatic material changing device is used for automatic feeding for a stamping machine. The system triggers a material changing signal through a sensor to control and integrate the welding transfer sliding table and the welding platform to act to execute a welding procedure, so that the stamping materials are in welding connection with new and old coiled materials through a welding connection plate to realize continuous production operation of an automated stamping production line.
    Type: Application
    Filed: December 28, 2021
    Publication date: June 29, 2023
    Inventors: CHUN-CHIH KUO, HAO-LUN HUANG, BOR-TSUEN LIN, CHENG-YU YANG
  • Publication number: 20230207620
    Abstract: A semiconductor structure includes a substrate having a first device region and a second device region in proximity to the first device region. A trench isolation structure is disposed in the substrate between the first device region and the second device region. The trench isolation structure includes a first bottom surface within the first device region and a second bottom surface within the second device region. The first bottom surface is coplanar with the second bottom surface.
    Type: Application
    Filed: January 18, 2022
    Publication date: June 29, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Ling Wang, Ping-Hung Chiang, Wei-Lun Huang, Chia-Wen Lu, Ta-Wei Chiu
  • Publication number: 20230207386
    Abstract: A method of increasing the resistivity of a silicon carbide wafer includes providing a silicon carbide wafer with a first resistivity, and applying a microwave to treat the silicon carbide wafer. The treated silicon carbide wafer has a second resistivity. The second resistivity is higher than the first resistivity. The microwave treated silicon carbide wafer can be applied in a high-frequency device.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 29, 2023
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Mao-Nan CHANG, Ta-Ching HSIAO, Kuo-Lun HUANG, Pei-Ying CHEN