Patents by Inventor Lung Tran
Lung Tran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7668487Abstract: The invention provides a printed circuit board (PCB) printing system. In a particular embodiment, the system includes a liquid electrophotographic printing device. At least one supplier of electrically conductive ink supplying electrically conductive ink to the electrophotographic printing device is also provided. In addition, at least one supplier of dielectric ink supplying dielectric ink to the electrophotographic printing device is also provided. The liquid electrophotographic printing device is operable to apply the electrically conductive ink and the dielectric ink to a provided substrate such that substantially immiscible boundary delineation occurs at any points of contact between the applied electrically conducive ink and the applied dielectric ink. An appropriate method of use for the rendering of a printed circuit board is also provided.Type: GrantFiled: June 9, 2009Date of Patent: February 23, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Manish Sharma, Lung Tran
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Publication number: 20090263162Abstract: The invention provides a printed circuit board (PCB) printing system. In a particular embodiment, the system includes a liquid electrophotographic printing device. At least one supplier of electrically conductive ink supplying electrically conductive ink to the electrophotographic printing device is also provided. In addition, at least one supplier of dielectric ink supplying dielectric ink to the electrophotographic printing device is also provided. The liquid electrophotographic printing device is operable to apply the electrically conductive ink and the dielectric ink to a provided substrate such that substantially immiscible boundary delineation occurs at any points of contact between the applied electrically conducive ink and the applied dielectric ink. An appropriate method of use for the rendering of a printed circuit board is also provided.Type: ApplicationFiled: June 9, 2009Publication date: October 22, 2009Inventors: Manish Sharma, Lung Tran
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Patent number: 7560215Abstract: The invention provides a printed circuit board (PCB) printing system. In a particular embodiment, the system includes a liquid electrophotographic printing device. At least one supplier of electrically conductive ink supplying electrically conductive ink to the electrophotographic printing device is also provided. In addition, at least one supplier of dielectric ink supplying dielectric ink to the electrophotographic printing device is also provided. The liquid electrophotographic printing device is operable to apply the electrically conductive ink and the dielectric ink to a provided substrate such that substantially immiscible boundary delineation occurs at any points of contact between the applied electrically conducive ink and the applied dielectric ink. An appropriate method of use for the rendering of a printed circuit board is also provided.Type: GrantFiled: October 4, 2004Date of Patent: July 14, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Manish Sharma, Lung Tran
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Patent number: 7457153Abstract: An exemplary memory array including a plurality of memory cells, each of the memory cells comprises a first ferromagnetic layer, a second ferromagnetic layer spaced apart from the first ferromagnetic layer by a non-magnetic insulating layer and being magnetically coupled to the first ferromagnetic layer by demagnetizing fields from the first ferromagnetic layer, a spacer layer above the second ferromagnetic layer, and a reference layer above the spacer layer. The first ferromagnetic layer, non-magnetic insulating layer, and second ferromagnetic layer in combination function as a data layer of the memory cell.Type: GrantFiled: November 23, 2005Date of Patent: November 25, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Manish Sharma, Lung Tran
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Patent number: 7391641Abstract: An exemplary memory array including a plurality of memory cells, each of the memory cells comprises a first ferromagnetic layer, a second ferromagnetic layer spaced apart from the first ferromagnetic layer by a non-magnetic separating layer and being magnetically coupled to the first ferromagnetic layer by demagnetizing fields from the first ferromagnetic layer, a spacer layer above the second ferromagnetic layer, and a reference layer above the spacer layer. The first ferromagnetic layer, non-magnetic separating layer, and second ferromagnetic layer in combination function as a data layer of the memory cell.Type: GrantFiled: November 23, 2005Date of Patent: June 24, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Manish Sharma, Lung Tran, Thomas C. Anthony
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Publication number: 20080060995Abstract: A composition of matter and methods to produce the same. The composition of matter includes a thin film and a plurality of smooth-surfaced through-holes extending through the thin film. The thin film may have a thickness of between 200 nm and 150 ?m. The through-holes may have a diameter of between 20 nm and 2500 nm.Type: ApplicationFiled: September 12, 2006Publication date: March 13, 2008Inventors: Sean Zhang, Janice H. Nickel, Patricia A. Beck, Lung Tran, Shuhuai Yao
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Patent number: 7267997Abstract: An exemplary method for making a memory structure comprises forming a first ferromagnetic layer, forming a spacer layer above the first ferromagnetic layer, forming a second ferromagnetic layer above the spacer layer by applying a first deposition process to form a thin layer of ferromagnetic material substantially covering the spacer layer, the first layer being formed at a first energy level, and applying a second deposition process to form the remainder of the second ferromagnetic layer above the thin layer of ferromagnetic material, the second ferromagnetic layer being formed at a second energy level, higher than the first energy level. This way, the spacer layer is protected by the thin layer during the second energy level deposition.Type: GrantFiled: April 29, 2005Date of Patent: September 11, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Manish Sharma, Lung Tran
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Publication number: 20070115718Abstract: An exemplary memory array including a plurality of memory cells, each of the memory cells comprises a first ferromagnetic layer, a second ferromagnetic layer spaced apart from the first ferromagnetic layer by a non-magnetic separating layer and being magnetically coupled to the first ferromagnetic layer by demagnetizing fields from the first ferromagnetic layer, a spacer layer above the second ferromagnetic layer, and a reference layer above the spacer layer. The first ferromagnetic layer, non-magnetic separating layer, and second ferromagnetic layer in combination function as a data layer of the memory cell.Type: ApplicationFiled: November 23, 2005Publication date: May 24, 2007Inventors: Manish Sharma, Lung Tran, Thomas Anthony
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Patent number: 7196957Abstract: The invention includes a stacked magnetic memory structure. The magnetic memory structure includes a stacked magnetic memory structure. The first layer includes a first plurality of magnetic tunnel junctions. A second layer is formed adjacent to the first layer. The second layer includes a second plurality of magnetic tunnel junctions. The stacked magnetic memory structure further includes a common first group conductor connected to each of the first plurality of magnetic tunnel junctions and the second plurality of magnetic tunnel junctions.Type: GrantFiled: April 13, 2005Date of Patent: March 27, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Lung Tran, Thomas C. Anthony
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Patent number: 7180770Abstract: An information storage device is provided. The information storage device may be a magnetic random access memory (MRAM) device including a resistive cross point array of spin dependent tunneling (SDT) junctions or magnetic memory elements, with word lines extending along rows of the SDT junctions and bit lines extending along the columns of the SDT junctions. The present design includes a plurality of heating elements connected in series with associated magnetic memory elements, each heating element comprising a diode. Voltage applied to a magnetic memory element and associated heating element causes reverse current to flow through the diode, thereby producing heat from the diode and heating the magnetic memory element, thereby facilitating the write function of the device.Type: GrantFiled: March 24, 2005Date of Patent: February 20, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Frederick A. Perner, Janice Nickel, Lung Tran
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Patent number: 7136300Abstract: A data storage device includes a cross point array of resistive memory elements and a plurality of blocking elements. The device is arranged in groups. Each group includes series-connected memory elements and a blocking element. The blocking elements are used to prevent sneak path currents from interfering with sense currents during read operations.Type: GrantFiled: October 6, 2003Date of Patent: November 14, 2006Assignee: Hewlett-Packard Development Company, LP.Inventors: Lung The Tran, Frederick A. Perner
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Publication number: 20060215444Abstract: An information storage device is provided. The information storage device may be a magnetic random access memory (MRAM) device including a resistive cross point array of spin dependent tunneling (SDT) junctions or magnetic memory elements, with word lines extending along rows of the SDT junctions and bit lines extending along the columns of the SDT junctions. The present design includes a plurality of heating elements connected in series with associated magnetic memory elements, each heating element comprising a diode. Voltage applied to a magnetic memory element and associated heating element causes reverse current to flow through the diode, thereby producing heat from the diode and heating the magnetic memory element, thereby facilitating the write function of the device.Type: ApplicationFiled: March 24, 2005Publication date: September 28, 2006Inventors: Frederick Perner, Janice Nickel, Lung Tran
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Patent number: 7057920Abstract: A method of performing a thermally assisted write operation on a selected two conductor spin valve memory (SVM) cell having a material wherein the coercivity is decreased upon an increase in temperature. In a particular embodiment, a first write magnetic field is established by a first write current flowing from a first voltage potential to a second voltage potential as applied to the first conductor. A second write magnetic field is established by a second write current flowing from a third voltage potential to a fourth voltage potential as applied to the second conductor. The voltage potential of the first conductor is greater than the voltage potential of the second conductor. As a result, a third current, flows from the first conductor through the SVM cell to the second conductor. The SVM cell has an internal resistance such that the flowing current generates heat within the SVM cell. As the SVM cell is self heated, the coercivity of the SVM cell falls below the combined write magnetic fields.Type: GrantFiled: April 26, 2004Date of Patent: June 6, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Frederick A. Perner, Thomas C. Anthony, Robert C Walmsley, Lung Tran
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Publication number: 20060082526Abstract: A display element includes a variable optical element that changes appearance in response to changes in current, and a programmable resistance in series with the variable optical element. The resistance of the programmable resistance decreases in response to a first current in a first direction. The resistance of the programmable resistance increases in response to a second current in a second direction.Type: ApplicationFiled: October 20, 2004Publication date: April 20, 2006Inventors: Thomas Anthony, Lung Tran, Gary Gibson
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Publication number: 20060072944Abstract: The invention provides a printed circuit board (PCB) printing system. In a particular embodiment, the system includes a liquid electrophotographic printing device. At least one supplier of electrically conductive ink supplying electrically conductive ink to the electrophotographic printing device is also provided. In addition, at least one supplier of dielectric ink supplying dielectric ink to the electrophotographic printing device is also provided. The liquid electrophotographic printing device is operable to apply the electrically conductive ink and the dielectric ink to a provided substrate such that substantially immiscible boundary delineation occurs at any points of contact between the applied electrically conducive ink and the applied dielectric ink. An appropriate method of use for the rendering of a printed circuit board is also provided.Type: ApplicationFiled: October 4, 2004Publication date: April 6, 2006Inventors: Manish Sharma, Lung Tran
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Patent number: 7002820Abstract: A semiconductor storage device including a tip electrode, a media electrode and a storage media. The storage media has a storage area configurable to be in one of a plurality of structural states to represent information stored at the storage area, by passing a current through the storage area between the tip electrode and media electrode.Type: GrantFiled: June 17, 2004Date of Patent: February 21, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Zhizhang Chen, Mark David Johnson, Lung Tran
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Publication number: 20050281075Abstract: A semiconductor storage device including a tip electrode, a media electrode and a storage media. The storage media has a storage area configurable to be in one of a plurality of structural states to represent information stored at the storage area, by passing a current through the storage area between the tip electrode and media electrode.Type: ApplicationFiled: June 17, 2004Publication date: December 22, 2005Inventors: Zhizhang Chen, Mark Johnson, Lung Tran
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Publication number: 20050237795Abstract: A method of performing a thermally assisted write operation on a selected two conductor spin valve memory (SVM) cell having a material wherein the coercivity is decreased upon an increase in temperature. In a particular embodiment, a first write magnetic field is established by a first write current flowing from a first voltage potential to a second voltage potential as applied to the first conductor. A second write magnetic field is established by a second write current flowing from a third voltage potential to a fourth voltage potential as applied to the second conductor. The voltage potential of the first conductor is greater than the voltage potential of the second conductor. As a result, a third current, flows from the first conductor through the SVM cell to the second conductor. The SVM cell has an internal resistance such that the flowing current generates heat within the SVM cell. As the SVM cell is self heated, the coercivity of the SVM cell falls below the combined write magnetic fields.Type: ApplicationFiled: April 26, 2004Publication date: October 27, 2005Inventors: Frederick Perner, Thomas Anthony, Robert Walmsley, Lung Tran
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Publication number: 20050201173Abstract: The method for manufacturing a data storage device is disclosed. The device has a plurality of word lines, a plurality of bit lines, and a resistive crosspoint array of memory cells. Each memory cell is connected to a bit line and connected to an isolation diode that further connects to a respective word line. The isolation diode provides a unidirectional conductive path from the bit line to the word line. Each word line provides a common metal-semiconductor contact with each diode sharing the word line such that each diode has a separate metal contact located between the semiconductor portion of the common metal-semiconductor contact and its respective memory cell.Type: ApplicationFiled: March 24, 2005Publication date: September 15, 2005Inventors: Manish Sharma, Lung Tran
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Publication number: 20050185453Abstract: The invention includes a stacked magnetic memory structure. The magnetic memory structure includes a stacked magnetic memory structure. The first layer includes a first plurality of magnetic tunnel junctions. A second layer is formed adjacent to the first layer. The second layer includes a second plurality of magnetic tunnel junctions. The stacked magnetic memory structure further includes a common first group conductor connected to each of the first plurality of magnetic tunnel junctions and the second plurality of magnetic tunnel junctions.Type: ApplicationFiled: April 13, 2005Publication date: August 25, 2005Inventors: Lung Tran, Thomas Anthony