Patents by Inventor Magnus Andersson

Magnus Andersson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10300065
    Abstract: The present disclosure relates to methods for reducing the rate of cardiovascular death, myocardial infarction, or stroke in a patient in recognized need thereof, comprising administering to the patient a pharmaceutical composition comprising 60 mg ticagrelor twice daily.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: May 28, 2019
    Assignee: ASTRAZENECA AB
    Inventors: Lars Magnus Andersson, Tomas Lars-Gunnar Andersson, Olof Fredrik Bengtsson, Hans Peter Held, Garnet Edward Howells, Eva Christina Jensen, Robert Storey
  • Patent number: 10249079
    Abstract: In the cull pipe, positions of the vertices of a triangle have already been computed and these coordinates may be exploited by taking and sorting triangle groups based on these coordinates. As one example, all the triangles in a tile may constitute a group. The triangle groups are sorted into bins. Within each bin the triangles are sorted based on their depths.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: April 2, 2019
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Magnus Andersson, Bjorn Johnsson
  • Patent number: 10242286
    Abstract: An index is assigned to each entry in the set of possible coverage masks and two functions are generated. One function translates an index to a coverage mask. Also, a sparse function generates an index from a coverage mask. These functions may be realized in hardware and are used during decompression and compression, respectively.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: March 26, 2019
    Assignee: Intel Corporation
    Inventors: Jon N. Hasselgren, Magnus Andersson, Robert M. Toth
  • Publication number: 20190087680
    Abstract: An index is assigned to each entry in the set of possible coverage masks and two functions are generated. One function translates an index to a coverage mask. Also, a sparse function generates an index from a coverage mask. These functions may be realized in hardware and are used during decompression and compression, respectively.
    Type: Application
    Filed: November 16, 2018
    Publication date: March 21, 2019
    Inventors: Jon N. Hasselgren, Magnus Andersson, Robert M. Toth
  • Patent number: 10186236
    Abstract: Techniques related to coding data including techniques for coding data using a universal codec are generally described. In some examples, such techniques may provide a universal (or unified) codec parameterized using a small set of parameters, which may be used to adapt the codec to different types of data to be compressed.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: January 22, 2019
    Assignee: INTEL CORPORATION
    Inventors: Tomas G. Akenine-Moller, Jim Nilsson, Magnus Andersson
  • Patent number: 10073007
    Abstract: A reliability range is determined for a parameter of a component in a machine subjected to life reducing loads during operation, comprising the steps of: acquiring, for each of a plurality of load sessions, at least one parameter value for said component; generating a distribution pattern containing said parameter values for the plurality of load sessions; assigning a reliability range for the distribution pattern, wherein parameter values outside said reliability range are considered as being unrealistic; analyzing the parameter values outside the reliability range to determine which of said parameter values outside the reliability range are confirmed to be unrealistic; and adjusting the reliability range if a ratio between the confirmed unrealistic parameter values and the considered unrealistic parameter values is outside a further range being predetermined for the ratio.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: September 11, 2018
    Assignee: GKN Aerospace Sweden AB
    Inventors: Magnus Andersson, Henrik Eckervald
  • Patent number: 10025893
    Abstract: A life consumption of a component in a machine may be predicted. Load data may be received from a load session of the machine. A plurality of parameter sets may be accessed, each associated with a critical point of the component, which point is considered to have critical life consumption. For each critical point, life consumption may be calculated using a life consumption calculation model receiving the load data and the parameter sets as input. By selecting a plurality of critical points on the component, a more complete view is presented of how the different parts of the component are affected by the load session.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: July 17, 2018
    Assignee: GKN Aerospace Sweden AB
    Inventors: Magnus Andersson, Anders Larsson
  • Patent number: 9934604
    Abstract: In accordance with some embodiments, a full per sample coverage mask may be used for a subset of the pixels in the tile, thereby enabling pixels that belong to multiple depth ranges to be handled. This makes the depth bounds a tighter fit for the true depth range of the tile and improves hierarchical depth culling efficiency when MSAA is used.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: April 3, 2018
    Assignee: Intel Corporation
    Inventors: Jon N. Hasselgren, Magnus Andersson
  • Publication number: 20180082468
    Abstract: Methods and apparatus relating to techniques for provision of hierarchical Z-Culling (HiZ) optimized shadow mapping are described. In an embodiment, a processor performs one or more operations on depth data of an image tile in response to a determination that the depth data includes a minimum depth value inside the image tile and a maximum depth value inside the image tile. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: September 16, 2016
    Publication date: March 22, 2018
    Applicant: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Magnus Andersson, Jon N. Hasselgren, Carl J. Munkberg, Jim K. Nilsson
  • Publication number: 20180082467
    Abstract: Methods and apparatus relating to techniques for provision of hierarchical Z-Culling (HiZ) optimization for texture-dependent discard operations are described. In an embodiment, a processor performs one or more operations (such as HiZ or Hierarchical Stencil test) on depth data of an image tile in response to a determination that texture space bounds of the image tile is fully opaque. The processor performs the one or more operations regardless of whether a discard operation is enabled. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: September 16, 2016
    Publication date: March 22, 2018
    Applicant: Intel Corporation
    Inventors: Magnus Andersson, Robert M. Toth, Jon N. Hasselgren, Tomas G. Akenine-Moller
  • Publication number: 20180082431
    Abstract: Embodiments described herein enable a hierarchical-Z unit of a graphics processor to be primed using Hi-Z data generated by occlusion culling operations performed on a general purpose processor. One embodiment provides for instructions to cause operations including performing occlusion culling for a scene via the general purpose processor and storing generated hierarchical-Z data. The Hierarchical-Z data generated during the occlusion culling operations can be shared with the graphics processor and used to prime a hierarchical-Z unit of the graphics processor. The at least a portion of the scene can then be rendered using the hierarchical-Z data after priming the hierarchical-Z unit, improving the effectiveness of hierarchical-Z operations of the graphics processor for the scene.
    Type: Application
    Filed: September 16, 2016
    Publication date: March 22, 2018
    Applicant: Intel Corporation
    Inventors: Magnus Andersson, Jon N. Hasselgren, Tomas G. Akenine-Moller
  • Patent number: 9922449
    Abstract: An apparatus and method are described for dynamic polygon or primitive sorting for improved culling. For example, one embodiment of an apparatus comprises: a rasterization unit to receive a plurality of polygons to be rasterized in an original ordering; and depth test evaluation logic to determine whether a current polygon is fully visible, partially visible or occluded; and reordering logic to incrementally alter the original ordering by swapping each occluded polygon with another polygon positioned relatively lower in the original ordering and by swapping each fully visible polygon with another polygon positioned relatively higher in the original ordering.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: March 20, 2018
    Assignee: INTEL CORPORATION
    Inventors: Jim K. Nilsson, Tomas G. Akenine-Moller, Magnus Andersson
  • Publication number: 20180015089
    Abstract: The present disclosure relates to methods for reducing the rate of cardiovascular death, myocardial infarction, or stroke in a patient in recognized need thereof, comprising administering to the patient a pharmaceutical composition comprising 60 mg ticagrelor twice daily.
    Type: Application
    Filed: January 27, 2016
    Publication date: January 18, 2018
    Applicant: ASTRAZENECA AB
    Inventors: Lars Magnus ANDERSSON, Tomas Lars-Gunnar ANDERSSON, Olof Fredrik BENGTSSON, Hans Peter HELD, Garnet Edward HOWELLS, Eva Christina JENSEN, Robert STOREY
  • Patent number: 9791647
    Abstract: An optoelectronic module is disclosed. The optoelectronic module comprises an optical connector, a contact, an opto-electric assembly, and a casing. The opto-electric assembly has a carrier optically connected to the optical connector by a flexible optical fiber and electrically connected to the contact by a flexible cable. The casing at least partially encloses the opto-electric assembly, the optical connector, and the contact. An inner surface of a wall of the casing is attached to the carrier in a thermally conductive manner.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: October 17, 2017
    Assignee: Tyco Electronics Svenska Holdings AB
    Inventors: Odd Robert Steijer, Magnus Andersson
  • Patent number: 9761001
    Abstract: A layered, filtered shadow mapping algorithm may be used for motion blurred shadows. The algorithm is divided into two passes, namely a shadow pass and a lighting pass. The shadow pass renders the scene using stochastic rasterization and generates a time-dependent shadow map augmented with per-sample motion vectors. The subsequent lighting pass renders the scene from the camera's point of view, and performs a shadow query for each sample seen from the camera.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: September 12, 2017
    Assignee: Intel Corporation
    Inventors: Magnus Andersson, Jon N. Hasselgren, Carl J. Munkberg, Tomas Akenine-Moller
  • Publication number: 20170230172
    Abstract: Two parties will engage in encrypted data communicating over a non secure channel. The encryption require a common session or consecutively updated key, not known by anybody else, and established without prior secrets. One of the parties, the initial sender, creates a table of multiple equations. Each equation contains parameters, known only by him, variables set to different values for different equations, and a solution. Each equation is true. He sends the information to the initial receiver who uses the original equations to form multiple new ones, thereby obfuscating their origin. The initial receiver keeps the solution side secret and return only the variable parts of his new equations. The initial sender receives the new equations and uses his hidden parameters to calculate the solutions. The solutions will now be known by the two communicating parties, but not easily available for an unauthorized interceptor of the communication.
    Type: Application
    Filed: February 9, 2016
    Publication date: August 10, 2017
    Inventor: Kåre Lars, Magnus Andersson
  • Publication number: 20170186128
    Abstract: An apparatus and method are described for primitive pair merging. For example, one embodiment of a graphics processing apparatus comprises: primitive merging logic to generate merged primitive data for two or more primitives sharing at least one edge, wherein the merged primitive data includes a single set of vertices defining the at least one shared edge; and an intersection unit to test a plurality of rays against the merged primitive data to identify a closest primitive that each ray intersects, the intersection unit to perform shared computations for the shared edge.
    Type: Application
    Filed: December 26, 2015
    Publication date: June 29, 2017
    Inventors: Tomas G. Akenine-Moller, Rasmus Barringer, Magnus Andersson
  • Patent number: 9622926
    Abstract: The present disclosure relates to a wheelchair (1) comprising: a chassis (3), a seat system (5) attached to the chassis (3), which seat system (5) has a backrest (5b) having a front side (5c) and a backside (5d), and an energy absorber (9) having a proximal end (9a) attached to the seat system (5) or joining the chassis (3), a distal end (9b) having means that enable attachment of straps or belts to the distal end (9b), and an intermediate portion (9c) extending from the proximal end (9a) to the distal end (9b) in a direction from the front side (5c) towards the back side (5d), wherein the intermediate portion (9c) has a curved portion adapted to straighten and plastically deform when the energy absorber (9) is subjected to a pulling force above a predetermined threshold.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: April 18, 2017
    Assignee: Permobil AB
    Inventor: Magnus Andersson
  • Patent number: 9626793
    Abstract: In accordance with some embodiments, the number of bits allocated to depth compression may be changed variably based on a number of considerations. As a result, depth data may be compressed in a more efficient way.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: April 18, 2017
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Jim K. Nilsson, Magnus Andersson, Jon N. Hasselgren
  • Patent number: 9582847
    Abstract: In accordance with some embodiments, a mask or table may be maintained to record information about whether or not each pixel within a tile is cleared. As used herein, a “cleared” tile is one that is not covered by any other depicted objects. The clear mask may store a bit per pixel or sample to indicate whether the pixel or sample contains a color value or whether it is cleared. As a result, the compression ratio may be increased for partially covered tiles in some embodiments.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: February 28, 2017
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Jim K. Nilsson, Jon N. Hasselgren, Magnus Andersson