Patents by Inventor Mahito Shinohara

Mahito Shinohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11503234
    Abstract: A photoelectric conversion device includes a photoelectric conversion unit that generates signal charge of a first polarity and a charge conversion circuit that converts the signal charge into a signal voltage. The photoelectric conversion unit includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type that are provided in a surface side of a semiconductor substrate, a third semiconductor region of the first conductivity type provided at a first depth, a fourth semiconductor region of the second conductivity type provided at a second depth and overlaps the second semiconductor region in a plan view, and a fifth semiconductor region of the first conductivity type provided at a third depth, and the third semiconductor region and the fifth semiconductor region overlap the first semiconductor region, the second semiconductor region, and the fourth semiconductor region in the plan view.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: November 15, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Patent number: 11431922
    Abstract: A solid-state imaging apparatus includes first, second, and third semiconductor regions. The third semiconductor region has a second conductivity type. The third semiconductor region extends from a region below the second semiconductor region of a first pixel to a region below the second semiconductor region of a second pixel in the first and second pixels adjacent to each other among a plurality of pixels.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: August 30, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Patent number: 11394904
    Abstract: A solid-state imaging apparatus includes first, second, and third semiconductor regions. The third semiconductor region has a second conductivity type. The third semiconductor region extends from a region below the second semiconductor region of a first pixel to a region below the second semiconductor region of a second pixel in the first and second pixels adjacent to each other among a plurality of pixels.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: July 19, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Publication number: 20220093662
    Abstract: A photoelectric conversion apparatus comprises a semiconductor layer including a first surface and a second surface, a first semiconductor region of a first conductivity type arranged in the semiconductor layer and configured to accumulate a signal charge generated by incident light, a second semiconductor region of the first conductivity type arranged in the semiconductor layer, a first transfer electrode configured to transfer the signal charge accumulated in the first semiconductor region to the second semiconductor region, a third semiconductor region of a second conductivity type arranged between the second semiconductor region and the second surface, and a fourth semiconductor region of the second conductivity type arranged between the third semiconductor region and the second surface. The third semiconductor region at least partially overlaps, in orthographic projection to the first surface, the second semiconductor region and the fourth semiconductor region.
    Type: Application
    Filed: September 16, 2021
    Publication date: March 24, 2022
    Inventors: Mahito Shinohara, Hiroshi Sekine
  • Publication number: 20220085227
    Abstract: An apparatus wherein, in plane view, a first semiconductor region of a first conductivity type overlaps at least a portion of a third semiconductor region, a second semiconductor region overlaps at least a portion of a fourth semiconductor region of a second conductivity type, a height of a potential of the third semiconductor region with respect to an electric charge of the first conductivity type is lower than that of the fourth semiconductor region, and a difference between a height of a potential of the first semiconductor region and that of the third semiconductor region is larger than a difference between a height of a potential of the second semiconductor region and that of the fourth semiconductor region.
    Type: Application
    Filed: September 27, 2021
    Publication date: March 17, 2022
    Inventors: Kazuhiro Morimoto, Mahito Shinohara
  • Publication number: 20220037380
    Abstract: A photoelectric conversion apparatus comprises a first semiconductor region of a first conductivity type arranged between a first surface and a second surface, a second semiconductor region of the first conductivity type arranged between the first surface and the second surface and configured to accumulate a signal charge generated by incident light, a third semiconductor region of the first conductivity type arranged between the first surface and the second surface, a fourth semiconductor region of the first conductivity type arranged between the first surface and the second surface and in contact with the third semiconductor region, a first transfer electrode arranged on the first surface, a semiconductor region of the second conductivity type arranged between the third semiconductor region and the second surface, and a semiconductor region of the second conductivity type arranged between the fourth semiconductor region and the second surface.
    Type: Application
    Filed: July 23, 2021
    Publication date: February 3, 2022
    Inventors: Mahito Shinohara, Hiroshi Sekine
  • Patent number: 11158755
    Abstract: An apparatus wherein, in plane view, a first semiconductor region of a first conductivity type overlaps at least a portion of a third semiconductor region, a second semiconductor region overlaps at least a portion of a fourth semiconductor region of a second conductivity type, a height of a potential of the third semiconductor region with respect to an electric charge of the first conductivity type is lower than that of the fourth semiconductor region, and a difference between a height of a potential of the first semiconductor region and that of the third semiconductor region is larger than a difference between a height of a potential of the second semiconductor region and that of the fourth semiconductor region.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: October 26, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuhiro Morimoto, Mahito Shinohara
  • Publication number: 20210243400
    Abstract: Provided is a photoelectric conversion device including: at least one charge holding portion including a first semiconductor region of a first conductivity type and configured to hold signal charges based on incident light; and an avalanche photodiode including a second semiconductor region of the first conductivity type, in which the signal charges are transferred from the first semiconductor region to the second semiconductor region via a third semiconductor region of a second conductivity type that is different from the first conductivity type, a fourth semiconductor region of the first conductivity type, and a fifth semiconductor region of the second conductivity type in this order.
    Type: Application
    Filed: January 26, 2021
    Publication date: August 5, 2021
    Inventor: Mahito Shinohara
  • Patent number: 11056520
    Abstract: An imaging device includes pixels each including a photoelectric converter that generates charges by photoelectric conversion, a first transfer transistor that transfers charges of the photoelectric converter to a first holding portion, a second transfer transistor that transfers charges of the first holding portion to a second holding portion, and an amplifier unit that outputs a signal based on charges held by the second holding portion. The first transfer transistor is configured to form a potential well for the charges between the photoelectric converter and the first holding portion when the first transistor is in an on-state. The maximum charge amount QPD generated by the photoelectric converter during one exposure period, a saturation charge amount QMEM_SAT of the first holding portion, and the maximum charge amount QGS that can be held in the potential well are in a relationship of: QPD<QGS?QMEM_SAT.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: July 6, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yusuke Onuki, Mahito Shinohara, Hajime Ikeda, Takafumi Miki, Hiroshi Sekine
  • Patent number: 10978503
    Abstract: A light detection apparatus according to an embodiment includes a first semiconductor region having a first conductivity type, a second semiconductor region having a second conductivity type, a third semiconductor region having the first conductivity type, and a circuit unit configured to count the number of generation times of an avalanche current, wherein a reverse bias voltage for causing avalanche multiplication of the signal charge is applied to the second semiconductor region and the third semiconductor region, and the signal charge is accumulated in the first semiconductor region when the potential barrier is formed, wherein the control unit controls the height of the potential barrier.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: April 13, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Patent number: 10944931
    Abstract: A solid state imaging device as an embodiment includes: a plurality of pixels each including at least one photoelectric conversion unit and an amplification transistor having a first input node electrically connected to the photoelectric conversion unit, a first primary node, and a second primary node; a transistor having a second input node, a third primary node, and a fourth primary node and having the same polarity as the amplification transistor; at least one signal line to which the first primary node of each of the plurality of pixels is electrically connected; and a current source electrically connected to the signal line, and a power source voltage is applied to the third primary node, the fourth primary node and the second primary node are electrically connected to each other, and the first primary node and the second input node are electrically connected to each other.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: March 9, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Publication number: 20210043781
    Abstract: An apparatus includes a first semiconductor region of a first conductivity type configured to collect a signal charge, and a connection region of a second conductivity type configured to feed a predetermined potential to a well including a second semiconductor region of the second conductivity type at a depth to which the connection region extends, a third semiconductor region of the second conductivity type at a position deeper than the connection region and the second semiconductor region, and a fourth semiconductor region between the second semiconductor region and the third semiconductor region, wherein a dopant for use in forming a semiconductor region of the first conductivity type is injected in the fourth semiconductor region, and a main carrier of the fourth semiconductor region is a carrier of the same conductivity type as a majority carrier of a semiconductor region of the second conductivity type.
    Type: Application
    Filed: July 31, 2020
    Publication date: February 11, 2021
    Inventor: Mahito Shinohara
  • Patent number: 10911704
    Abstract: A solid state imaging device as an embodiment includes: a plurality of pixels each including at least one photoelectric conversion unit and an amplification transistor having a first input node electrically connected to the photoelectric conversion unit, a first primary node, and a second primary node; a transistor having a second input node, a third primary node, and a fourth primary node and having the same polarity as the amplification transistor; at least one signal line to which the first primary node of each of the plurality of pixels is electrically connected; and a current source electrically connected to the signal line, and a power source voltage is applied to the third primary node, the fourth primary node and the second primary node are electrically connected to each other, and the first primary node and the second input node are electrically connected to each other.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: February 2, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Publication number: 20210020793
    Abstract: According to an aspect of the present disclosure, an avalanche diode, a detection unit configured to detect an avalanche current generated by avalanche multiplication in the avalanche diode, a switch disposed between the avalanche diode and the detection unit, and a reset unit configured to reset a node between the switch and the detection unit. The reset unit resets the node during a period in which the switch is in an off state.
    Type: Application
    Filed: July 10, 2020
    Publication date: January 21, 2021
    Inventor: Mahito Shinohara
  • Publication number: 20200366858
    Abstract: A solid-state imaging device includes a plurality of pixels, each of the plurality of pixels including a photoelectric converter. The photoelectric converter includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided under the first semiconductor region, and a third semiconductor region of the first conductivity type provided under the second semiconductor region. The second semiconductor region has a first end portion and a second end portion opposing to the first end portion. The third semiconductor region has a first region and a second region overlapping with the second semiconductor region in a plan view, and the first region and the second region are spaced apart from each other from a part of the first end portion to a part of the second end portion.
    Type: Application
    Filed: August 5, 2020
    Publication date: November 19, 2020
    Inventor: Mahito Shinohara
  • Patent number: 10818724
    Abstract: A photoelectric conversion device includes a photoelectric converter accumulating signal charge generated by photoelectric conversion in the first semiconductor region of a first conductivity type, a charge-to-voltage converter generating a voltage signal in accordance with amount of the signal charge, a transistor of a second conductivity type provided in a third semiconductor region of the first conductivity type and including a gate connected to the first semiconductor region, and a voltage supply circuit supplying voltage to the source and drain of the transistor. The voltage supply circuit supplies voltage that causes gate capacitance of the transistor to be a first capacitance value when signal charge accumulated in the first semiconductor region correspond to first amount and cause the gate capacitance to be a second capacitance value when signal charge accumulated in the first semiconductor region correspond to second amount.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: October 27, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Publication number: 20200304736
    Abstract: A photoelectric conversion device includes a photoelectric conversion region, a readout circuit, and a counting circuit. The photoelectric conversion region is configured to generate a signal charge. The readout circuit is configured to, when reading out a signal that is based on the signal charge generated at the photoelectric conversion region, selectively perform first readout for reading out the signal using avalanche multiplication that is based on the signal charge and second readout for reading out the signal without causing avalanche multiplication to occur with respect to at least a part of the signal charge. The counting circuit is configured to count a number of occurrences of avalanche current which is caused to occur by avalanche multiplication in the first readout.
    Type: Application
    Filed: March 12, 2020
    Publication date: September 24, 2020
    Inventor: Mahito Shinohara
  • Patent number: 10771720
    Abstract: A solid-state imaging device includes a plurality of pixels, each of the plurality of pixels including a photoelectric converter. The photoelectric converter includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided under the first semiconductor region, and a third semiconductor region of the first conductivity type provided under the second semiconductor region. The second semiconductor region has a first end portion and a second end portion opposing to the first end portion. The third semiconductor region has a first region and a second region overlapping with the second semiconductor region in a plan view, and the first region and the second region are spaced apart from each other from a part of the first end portion to a part of the second end portion.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: September 8, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Publication number: 20200275039
    Abstract: A photoelectric conversion device includes a photoelectric conversion unit that generates signal charge of a first polarity and a charge conversion circuit that converts the signal charge into a signal voltage. The photoelectric conversion unit includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type that are provided in a surface side of a semiconductor substrate, a third semiconductor region of the first conductivity type provided at a first depth, a fourth semiconductor region of the second conductivity type provided at a second depth and overlaps the second semiconductor region in a plan view, and a fifth semiconductor region of the first conductivity type provided at a third depth, and the third semiconductor region and the fifth semiconductor region overlap the first semiconductor region, the second semiconductor region, and the fourth semiconductor region in the plan view.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 27, 2020
    Inventor: Mahito Shinohara
  • Patent number: 10714515
    Abstract: An image sensing apparatus is provided. The apparatus comprises pixels each including a photoelectric conversion element arranged in a semiconductor layer which has a first surface and a second surface and a wiring layer arranged below the first surface. Each of the pixels includes a first reflection film arranged below the first surface, an interlayer film arranged so as to cover the second surface, a second reflection film arranged inside the interlayer film and a microlens which is arranged above the interlayer film. An aperture is arranged in a portion, of the second reflection film, which overlaps the photoelectric conversion element. An area of the aperture is smaller than an area of the photoelectric conversion element, and each of the pixels further includes a deflecting portion configured to deflect light between the aperture and the second surface.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: July 14, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mahito Shinohara