Patents by Inventor Maik Stegemann

Maik Stegemann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230332969
    Abstract: A pressure sensing device includes a deflectable membrane structure to provide a deflection dependent output signal based on a pressure load, and a mechanical abutment structure for adjusting a spring constant of the deflectable membrane structure depending on the deflection of the deflectable membrane structure, wherein the mechanical abutment structure provides an abutting condition of the deflectable membrane structure when the deflection of the deflectable membrane structure exceeds a deflection threshold, wherein the abutting condition results in a change from a first spring constant to an increased, second spring constant of the deflectable membrane structure.
    Type: Application
    Filed: April 11, 2023
    Publication date: October 19, 2023
    Inventors: Marco Haubold, Mirko Vogt, Maik Stegemann, Marco Müller, Anita Förster, Anne Boitier-Mahlberg
  • Patent number: 11594654
    Abstract: A method of generating a germanium structure includes performing an epitaxial depositing process on an assembly of a silicon substrate and an oxide layer, wherein one or more trenches in the oxide layer expose surface portions of the silicon substrate. The epitaxial depositing process includes depositing germanium onto the assembly during a first phase, performing an etch process during a second phase following the first phase in order to remove germanium from the oxide layer, and repeating the first and second phases. A germanium crystal is grown in the trench or trenches. An optical device includes a light-incidence surface formed by a raw textured surface of a germanium structure obtained by an epitaxial depositing process without processing the surface of the germanium structure after the epitaxial process.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: February 28, 2023
    Assignee: Infineon Technologies AG
    Inventors: Andre Roeth, Henning Feick, Heiko Froehlich, Thoralf Kautzsch, Olga Khvostikova, Stefano Parascandola, Thomas Popp, Maik Stegemann, Mirko Vogt
  • Patent number: 11545561
    Abstract: A MOSFET includes a semiconductor body having a first side, a drift region, a body region forming a first pn-junction with the drift region, a source region forming a second pn-junction with the body region, in a vertical cross-section, a dielectric structure on the first side and having an upper side; a first gate electrode, a second gate electrode, a contact trench between the first and second gate electrodes, extending through the dielectric structure to the source region, in a horizontal direction a width of the contact trench has, in a first plane, a first value, and, in a second plane, a second value which is at most about 2.5 times the first value, and a first contact structure arranged on the dielectric structure having a through contact portion arranged in the contact trench, and in Ohmic contact with the source region.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: January 3, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Andreas Riegler, Wolfgang Jantscher, Manfred Pippan, Maik Stegemann
  • Publication number: 20220326275
    Abstract: A capacitive microelectromechanical device is provided. The capacitive microelectromechanical device includes a semiconductor substrate, a support structure, an electrode element, a spring element, and a seismic mass. The support structure, for example, a pole, suspension or a post, is fixedly connected to the semiconductor substrate, which may comprise silicon. The electrode element is fixedly connected to the support structure. Moreover, the seismic mass is connected over the spring element to the support structure so that the seismic mass is displaceable, deflectable or movable with respect to the electrode element. Moreover, the seismic mass and the electrode element form a capacitor having a capacitance which depends on a displacement between the seismic mass and the electrode element.
    Type: Application
    Filed: June 28, 2022
    Publication date: October 13, 2022
    Applicant: Infineon Technologies AG
    Inventors: Thoralf KAUTZSCH, Steffen BIESELT, Heiko FROEHLICH, Andre ROETH, Maik STEGEMANN, Mirko VOGT, Bernhard WINKLER
  • Patent number: 11422151
    Abstract: A capacitive microelectromechanical device is provided. The capacitive microelectromechanical device includes a semiconductor substrate, a support structure, an electrode element, a spring element, and a seismic mass. The support structure, for example, a pole, suspension or a post, is fixedly connected to the semiconductor substrate, which may comprise silicon. The electrode element is fixedly connected to the support structure. Moreover, the seismic mass is connected over the spring element to the support structure so that the seismic mass is displaceable, deflectable or movable with respect to the electrode element. Moreover, the seismic mass and the electrode element form a capacitor having a capacitance which depends on a displacement between the seismic mass and the electrode element.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: August 23, 2022
    Inventors: Thoralf Kautzsch, Steffen Bieselt, Heiko Froehlich, Andre Roeth, Maik Stegemann, Mirko Vogt, Bernhard Winkler
  • Patent number: 11393714
    Abstract: In a method for producing a buried cavity in a semiconductor substrate, trenches are produced in a surface of a semiconductor substrate down to a depth that is greater than cross-sectional dimensions of the respective trench in a cross section perpendicular to the depth, wherein a protective layer is formed on sidewalls of the trenches. Isotropic etching through bottom regions of the trenches is carried out. After carrying out the isotropic etching, the enlarged trenches are closed by applying a semiconductor epitaxial layer to the surface of the semiconductor substrate.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: July 19, 2022
    Assignee: Infineon Technologies AG
    Inventors: Andre Roeth, Boris Binder, Thoralf Kautzsch, Uwe Rudolph, Maik Stegemann, Mirko Vogt
  • Publication number: 20220069156
    Abstract: A method of generating a germanium structure includes performing an epitaxial depositing process on an assembly of a silicon substrate and an oxide layer, wherein one or more trenches in the oxide layer expose surface portions of the silicon substrate. The epitaxial depositing process includes depositing germanium onto the assembly during a first phase, performing an etch process during a second phase following the first phase in order to remove germanium from the oxide layer, and repeating the first and second phases. A germanium crystal is grown in the trench or trenches. An optical device includes a light-incidence surface formed by a raw textured surface of a germanium structure obtained by an epitaxial depositing process without processing the surface of the germanium structure after the epitaxial process.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 3, 2022
    Inventors: Andre Roeth, Henning Feick, Heiko Froehlich, Thoralf Kautzsch, Olga Khvostikova, Stefano Parascandola, Thomas Popp, Maik Stegemann, Mirko Vogt
  • Patent number: 11078072
    Abstract: A method for manufacturing a microelectromechanical systems (MEMS) device, includes forming a cavity in a bulk semiconductor substrate; defining a movably suspended mass in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate to the cavity; arranging a cap structure on the main surface area of the bulk semiconductor substrate; and forming a capacitive structure. Forming the capacitive structure includes arranging a first electrode structure on the movably suspended mass; and providing a second electrode structure at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a direction perpendicular to the main surface area of the bulk semiconductor substrate.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: August 3, 2021
    Inventors: Thoralf Kautzsch, Steffen Bieselt, Heiko Froehlich, Andre Roeth, Maik Stegemann, Mirko Vogt
  • Publication number: 20210151584
    Abstract: A MOSFET includes a semiconductor body having a first side, a drift region, a body region forming a first pn-junction with the drift region, a source region forming a second pn-junction with the body region, in a vertical cross-section, a dielectric structure on the first side and having an upper side; a first gate electrode, a second gate electrode, a contact trench between the first and second gate electrodes, extending through the dielectric structure to the source region, in a horizontal direction a width of the contact trench has, in a first plane, a first value, and, in a second plane, a second value which is at most about 2.5 times the first value, and a first contact structure arranged on the dielectric structure having a through contact portion arranged in the contact trench, and in Ohmic contact with the source region.
    Type: Application
    Filed: December 28, 2020
    Publication date: May 20, 2021
    Inventors: Andreas Riegler, Wolfgang Jantscher, Manfred Pippan, Maik Stegemann
  • Patent number: 10903341
    Abstract: A method for manufacturing a MOSFET semiconductor device includes providing a wafer including a semiconductor body having a first side, a first semiconductor region adjacent to the first side, a second semiconductor region adjacent to the first side and forming a first pn-junction with the first semiconductor region, and a third semiconductor region adjacent to the first side and forming a second pn-junction with the second semiconductor region, a first dielectric layer arranged on the first side, a gate electrode embedded in the first dielectric layer, and a second dielectric layer arranged on the first dielectric layer. Next to the gate electrode, a trench is formed through the first dielectric layer and the second dielectric layer. At a side wall of the trench, a dielectric spacer is formed. The trench is extended into the semiconductor body to form a contact trench.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: January 26, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Andreas Riegler, Wolfgang Jantscher, Manfred Pippan, Maik Stegemann
  • Publication number: 20210013087
    Abstract: In a method for producing a buried cavity in a semiconductor substrate, trenches are produced in a surface of a semiconductor substrate down to a depth that is greater than cross-sectional dimensions of the respective trench in a cross section perpendicular to the depth, wherein a protective layer is formed on sidewalls of the trenches. Isotropic etching through bottom regions of the trenches is carried out. After carrying out the isotropic etching, the enlarged trenches are closed by applying a semiconductor epitaxial layer to the surface of the semiconductor substrate.
    Type: Application
    Filed: July 7, 2020
    Publication date: January 14, 2021
    Inventors: Andre ROETH, Boris BINDER, Thoralf KAUTZSCH, Uwe RUDOLPH, Maik STEGEMANN, Mirko VOGT
  • Patent number: 10870575
    Abstract: A semiconductor device may include a stress decoupling structure to at least partially decouple a first region of the semiconductor device and a second region of the semiconductor device. The stress decoupling structure may include a set of trenches that are substantially perpendicular to a main surface of the semiconductor device. The first region may include a micro-electro-mechanical (MEMS) structure. The semiconductor device may include a sealing element to at least partially seal openings of the stress decoupling structure.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 22, 2020
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Horst Theuss, Bernhard Knott, Thoralf Kautzsch, Mirko Vogt, Maik Stegemann, Andre Roeth, Marco Haubold, Heiko Froehlich, Wolfram Langheinrich, Steffen Bieselt
  • Publication number: 20200300886
    Abstract: A capacitive microelectromechanical device is provided. The capacitive microelectromechanical device includes a semiconductor substrate, a support structure, an electrode element, a spring element, and a seismic mass. The support structure, for example, a pole, suspension or a post, is fixedly connected to the semiconductor substrate, which may comprise silicon. The electrode element is fixedly connected to the support structure. Moreover, the seismic mass is connected over the spring element to the support structure so that the seismic mass is displaceable, deflectable or movable with respect to the electrode element. Moreover, the seismic mass and the electrode element form a capacitor having a capacitance which depends on a displacement between the seismic mass and the electrode element.
    Type: Application
    Filed: April 28, 2020
    Publication date: September 24, 2020
    Applicant: Infineon Technologies AG
    Inventors: Thoralf KAUTZSCH, Steffen BIESELT, Heiko FROEHLICH, Andre ROETH, Maik STEGEMANN, Mirko VOGT, Bernhard WINKLER
  • Publication number: 20200290867
    Abstract: A method for manufacturing a microelectromechanical systems (MEMS) device, includes forming a cavity in a bulk semiconductor substrate; defining a movably suspended mass in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate to the cavity; arranging a cap structure on the main surface area of the bulk semiconductor substrate; and forming a capacitive structure. Forming the capacitive structure includes arranging a first electrode structure on the movably suspended mass; and providing a second electrode structure at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a direction perpendicular to the main surface area of the bulk semiconductor substrate.
    Type: Application
    Filed: April 29, 2020
    Publication date: September 17, 2020
    Applicant: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Thoralf KAUTZSCH, Steffen BIESELT, Heiko FROEHLICH, Andre ROETH, Maik STEGEMANN, Mirko VOGT
  • Publication number: 20200253000
    Abstract: A light emitter device contains a heater structure configured to emit light if a predefined current flows through the heater structure. The heater structure is arranged at a heater carrier structure. The light emitter device contains an upper portion of a cavity located vertically between the heater carrier structure and a cover structure. The light emitter device contains a lower portion of the cavity located vertically between the heater carrier structure and at least a portion of a carrier substrate. The heater carrier structure contains a plurality of holes connecting the upper portion of the cavity and the lower portion of the cavity. A pressure within the cavity is less than 100 mbar.
    Type: Application
    Filed: April 24, 2020
    Publication date: August 6, 2020
    Inventors: Thoralf Kautzsch, Heiko Froehlich, Uwe Rudolph, Alessia Scire, Maik Stegemann, Mirko Vogt
  • Patent number: 10683203
    Abstract: A microelectromechanical systems (MEMS) device is provided and includes a bulk semiconductor substrate, a cavity formed in the bulk semiconductor substrate, a movably suspended mass, a cap structure and a capacitive structure is shown. The movably suspended mass is defined in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate to the cavity. The cap is structure arranged on the main surface area of the bulk semiconductor substrate. The capacitive structure comprises a first electrode structure arranged on the movably suspended mass and a second electrode structure arranged at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a direction perpendicular to the main surface area of the bulk semiconductor substrate.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: June 16, 2020
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Thoralf Kautzsch, Steffen Bieselt, Heiko Froehlich, Andre Roeth, Maik Stegemann, Mirko Vogt
  • Patent number: 10684306
    Abstract: A capacitive microelectromechanical device is provided. The capacitive microelectromechanical device includes a semiconductor substrate, a support structure, an electrode element, a spring element, and a seismic mass. The support structure, for example, a pole, suspension or a post, is fixedly connected to the semiconductor substrate, which may comprise silicon. The electrode element is fixedly connected to the support structure. Moreover, the seismic mass is connected over the spring element to the support structure so that the seismic mass is displaceable, deflectable or movable with respect to the electrode element. Moreover, the seismic mass and the electrode element form a capacitor having a capacitance which depends on a displacement between the seismic mass and the electrode element.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: June 16, 2020
    Assignee: Infineon Technologies AG
    Inventors: Steffen Bieselt, Heiko Froehlich, Thoralf Kautzsch, Andre Roeth, Maik Stegemann, Mirko Vogt, Bernhard Winkler
  • Patent number: 10681777
    Abstract: A light emitter device contains a heater structure configured to emit light if a predefined current flows through the heater structure. The heater structure is arranged at a heater carrier structure. The light emitter device contains an upper portion of a cavity located vertically between the heater carrier structure and a cover structure. The light emitter device contains a lower portion of the cavity located vertically between the heater carrier structure and at least a portion of a carrier substrate. The heater carrier structure contains a plurality of holes connecting the upper portion of the cavity and the lower portion of the cavity. A pressure within the cavity is less than 100 mbar.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: June 9, 2020
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Thoralf Kautzsch, Heiko Froehlich, Uwe Rudolph, Alessia Scire, Maik Stegemann, Mirko Vogt
  • Patent number: 10544037
    Abstract: The present disclosure relates to an integrated semiconductor device, comprising a semiconductor substrate; a cavity formed into the semiconductor substrate; a sensor portion of the semiconductor substrate deflectably suspended in the cavity at one side of the cavity via a suspension portion of the semiconductor substrate interconnecting the semiconductor substrate and the sensor portion thereof, wherein an extension of the suspension portion along the side of the cavity is smaller than an extension of said side of the cavity.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: January 28, 2020
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Thoralf Kautzsch, Heiko Froehlich, Alessia Scire, Maik Stegemann, Bernhard Winkler, Andre Roeth, Steffen Bieselt, Mirko Vogt
  • Publication number: 20200002159
    Abstract: A semiconductor device may include a stress decoupling structure to at least partially decouple a first region of the semiconductor device and a second region of the semiconductor device. The stress decoupling structure may include a set of trenches that are substantially perpendicular to a main surface of the semiconductor device. The first region may include a micro-electro-mechanical (MEMS) structure. The semiconductor device may include a sealing element to at least partially seal openings of the stress decoupling structure.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventors: Horst THEUSS, Bernhard Knott, Thoralf Kautzsch, Mirko Vogt, Maik Stegemann, Andre Roeth, Marco Haubold, Heiko Froehlich, Wolfram Langheinrich, Steffen Bieselt