Patents by Inventor Maik Stegemann

Maik Stegemann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140175571
    Abstract: A method for manufacturing a micromechanical system includes creating a sacrificial layer at a substrate surface. A structural material is deposited at a sacrificial layer surface and at a support structure for later supporting the structural material. At least one hole is created in the structural material extending from an exposed surface of the structural material to the surface of the sacrificial layer. The at least one hole leads to a margin region of the sacrificial layer. The sacrificial layer is removed using a removal process through the at least one hole, to obtain a cavity between the surface of the substrate and the structural material. The method also includes filling the at least one hole and a portion of the cavity beneath the at least one hole close to the cavity. A corresponding micromechanical system and a microelectromechanical transducer are also described.
    Type: Application
    Filed: December 20, 2012
    Publication date: June 26, 2014
    Applicant: Infineon Technologies Dresden GmbH
    Inventors: Thoralf Kautzsch, Heiko Froehlich, Mirko Vogt, Maik Stegemann
  • Publication number: 20130217223
    Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a seed layer over a dielectric layer and a patterned resist layer over the seed layer. Next, metal lines are formed on regions of the seed layer not covered by the patterned resist layer. The patterned resist layer is removed using a plasma process, which involves using an oxidizing species and a reducing species in the plasma. The reducing species substantially prevents the oxidation of the metal lines and the seed layer during the plasma process.
    Type: Application
    Filed: February 16, 2012
    Publication date: August 22, 2013
    Applicant: Infineon Technologies, AG
    Inventor: Maik Stegemann
  • Patent number: 7396749
    Abstract: The invention relates to a method for contacting parts of a component integrated into a semiconductor substrate (1). According to the inventive method, a first contact hole is produced in an insulating layer (2), said contact hole being then filled with contact material (16) and connected to a line. The aim of the invention is to minimise the processes required for contacting parts of a component integrated into a semiconductor substrate. To this end, the hard mask (3) used to produce the contact hole is also used to structure the line.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: July 8, 2008
    Assignee: Infineon Technologies AG
    Inventors: Ludwig Dittmar, Wolfgang Gustin, Maik Stegemann
  • Patent number: 7368390
    Abstract: A carbon hard mask layer is applied to a substrate to be patterned by means of a plasma-enhanced deposition process in such a manner that it has a hardness comparable to that of diamond in at least one layer thickness section. During the production of this diamond-like layer thickness section, the parameters used in the deposition are set in such a manner that growth regions which are produced in a form other than diamond-like are removed again in situ by means of subsequent etching processes and that diamond-like regions which are formed are retained.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: May 6, 2008
    Assignee: Infineon Technologies AG
    Inventors: Guenther Czech, Carsten Fuelber, Markus Kirchhoff, Maik Stegemann, Mirko Vogt, Stephan Wege
  • Patent number: 7141507
    Abstract: A method for producing a semiconductor structure including preparing a semiconductor substrate, and generating a lower first, a middle second and an upper third masking layer on a surface of the semiconductor substrate. The method further includes forming at least one first window in the upper third masking layer, structuring the middle second masking layer using the first window for transferring the first window, structuring the lower first masking layer using the first window for transferring the first window, and enlarging the first window to form a second window. The method for further includes restructuring the middle second masking layer using the second window for transferring the second window, structuring the semiconductor substrate, using the structured lower third masking layer, restructuring the lower first masking layer using the second window, and restructuring the semiconductor substrate using the restructured lower third masking layer.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: November 28, 2006
    Assignee: Infineon Technologies AG
    Inventors: Oliver Genz, Markus Kirchhoff, Stephan Machill, Alexander Reb, Barbara Schmidt, Momtchil Stavrev, Maik Stegemann, Stephan Wege
  • Publication number: 20060094217
    Abstract: The invention relates to a method for contacting pans of a component integrated into a semiconductor substrate (1). According to the inventive method, a first contact hole is produced in an insulating layer (2), said contact hole being then filled with contact material (16) and connected to a line. The aim of the invention is to minimise the processes required for contacting parts of a component integrated into a semiconductor substrate. To this end, the hard mask (3) used to produce the contact hole is also used to structure the line.
    Type: Application
    Filed: June 24, 2003
    Publication date: May 4, 2006
    Inventors: Ludwig Dittmar, Wolfgang Gustin, Maik Stegemann
  • Publication number: 20050112506
    Abstract: A carbon hard mask layer is applied to a substrate to be patterned by means of a plasma-enhanced deposition process in such a manner that it has a hardness comparable to that of diamond in at least one layer thickness section. During the production of this diamond-like layer thickness section, the parameters used in the deposition are set in such a manner that growth regions which are produced in a form other than diamond-like are removed again in situ by means of subsequent etching processes and that diamond-like regions which are formed are retained.
    Type: Application
    Filed: October 29, 2002
    Publication date: May 26, 2005
    Inventors: Gunter Czech, Carsten Fuelber, Marcus Kirchhoff, Maik Stegemann, Mirko Vogt, Stephan Wege
  • Publication number: 20050090114
    Abstract: The invention relates to a process for the production of a semiconductor apparatus, in which an etch step is carried out after an exposure step using light having a wavelength of 193 nm and a development step, the etch gas used containing an added reactive monomer. As a result, polymerization of the surface and hence sidewall passivation of the photoresist used are achieved.
    Type: Application
    Filed: October 29, 2002
    Publication date: April 28, 2005
    Inventors: Michael Rogalli, Alexander Reb, Lars Volkel, Maik Stegemann
  • Publication number: 20040192060
    Abstract: A method for fabricating a semiconductor structure includes providing a semiconductor substrate and a sacrificial layer between a layer to be patterned and a resist layer, patterning the resist layer to form a patterned resist layer; selectively etching the sacrificial layer with a taper angle so as to reduce the dimensions within the sacrificial layer in the etching direction which are prescribed by depressions situated in the patterned resist layer, and selectively etching the layer to be patterned using the sacrificial layer etched with a taper angle as a mask. The present invention also relates to a method for fabricating a semiconductor structure in which two sacrificial layers are used.
    Type: Application
    Filed: March 22, 2004
    Publication date: September 30, 2004
    Inventors: Maik Stegemann, Stephan Wege
  • Publication number: 20020011462
    Abstract: In a process for the anisotropic dry etching of an organic antireflection layer, the etching gases used are substantially hydrogen and nitrogen.
    Type: Application
    Filed: July 27, 2001
    Publication date: January 31, 2002
    Inventors: Harald Richter, Stephan Wege, Maik Stegemann
  • Publication number: 20010034112
    Abstract: The invention relates to a method for producing trenches for manufacturing storage capacitors in DRAM cell configurations. In the method, a two-stage hard mask having a first mask layer (1) and an underlying second mask layer (2) is used. A resist mask is applied to the mask layers (1, 2). The trenches are structured by etching processes, in which, in a first etching process, the first mask layer (1) is etched selectively with respect to the resist mask, and in a second etching process, the second mask layer (2) is etched selectively with respect to the first mask layer (1).
    Type: Application
    Filed: January 3, 2001
    Publication date: October 25, 2001
    Inventors: Lothar Brencher, Maik Stegemann, Uwe Rudolph