Patents by Inventor Makoto Hirano

Makoto Hirano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10108370
    Abstract: A method of reading a nonvolatile memory device including a plurality of pages coupled to a plurality of word lines and a plurality of bit lines, each of the plurality of pages including a data region storing a data and a flag region storing a flag, includes applying a first read voltage to a selected word line to generate first sensing data and a first sensing flag; applying a second read voltage to the selected word line to generate second sensing data and a second sensing flag, generating determination data by performing a logical operation on the first and second sensing data; determining a shift voltage based on the determination data and the read flag; and applying a third read voltage, based on the shift voltage, to the selected word line to generate a read data.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: October 23, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Makoto Hirano
  • Patent number: 10089258
    Abstract: A semiconductor integrated circuit operates with a voltage supplied from a first power supply IC to transmit and receive data to and from an external memory. The semiconductor integrated circuit includes: an interface circuit operating with a voltage supplied from a second power supply IC and accessing the external memory to transmit and receive data to and from the external memory; a determination circuit which determines, based on a result of the access by the interface circuit, an AC timing specification between the external memory and the interface circuit to generate control information for controlling an output voltage of the second power supply IC in accordance with the AC timing specification; and a voltage control circuit which controls the output voltage of the second power supply IC in accordance with the control information.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: October 2, 2018
    Assignee: SOCIONEXT INC.
    Inventors: Hironori Kubo, Norihiko Mizobata, Makoto Hirano, Akihiro Suzuki, Masahiro Takeuchi
  • Patent number: 9911635
    Abstract: Provided is a substrate processing apparatus including a substrate container transfer device configured to transfer a substrate container accommodating a substrate and purge an inside of the substrate container; a purge gas supply unit installed at the substrate container transfer device and configured to supply a purge gas into the substrate container; a substrate container standby unit configured to accommodate the substrate container; a contact preventing unit installed at the substrate container standby unit and configured to prevent a contact between the purge gas supply unit and the substrate container standby unit when the substrate container is transferred to the substrate container standby unit by the substrate container transfer device; and a control unit configured to control the substrate container transfer device and the purge gas supply unit.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: March 6, 2018
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventor: Makoto Hirano
  • Publication number: 20180054322
    Abstract: In the present disclosure, a procedure begins with an operation request from a communication terminal in step S301, and counting by a timer of a household apparatus starts in step S306. Processing of steps S311 to S314 is performed periodically when communication is possible between a controller and a communication adapter. That is, due to periodic resetting of the timer of the household apparatus in step S314, the timer does not time out. However, when communication between the controller and the communication adapter is not performed for some reason, the timer of the household apparatus afterward times out in step S321, and the household apparatus-transitions to a safe operation state in step S322.
    Type: Application
    Filed: May 12, 2015
    Publication date: February 22, 2018
    Inventors: Naoyuki HIBARA, Makoto HIRANO, Hirotoshi YANO
  • Patent number: 9822970
    Abstract: An object of the present invention is to provide a combustion device which does not cause an increase in the amount of generated NOx or a degradation in efficiency due to a lower flame luminance, even when the combustion space is limited in the lengthwise direction of the flame. A fuel ejector is configured so as to be provided with at least a first fuel ejector and a second fuel ejector lined up in a specific direction as viewed in the lengthwise direction of fuel ejection, and is configured so that a first ejection stream ejected from the first fuel ejector and the second fuel ejector collide on the downstream side of ejection.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: November 21, 2017
    Assignee: Osaka Gas Co., Ltd.
    Inventors: Makoto Hirano, Hitoshi Inoue
  • Publication number: 20170329667
    Abstract: A read method of a nonvolatile memory device is provided. The method includes storing data sensed from selected memory cells of the nonvolatile memory device into a page buffer, performing an error decoding operation by performing error detection on the sensed data to detect and error, correcting the detected error if the error is detected, and overwriting the page buffer with the corrected data, and de-randomizing data stored in the page buffer by using a seed after the error decoding operation has completed.
    Type: Application
    Filed: March 1, 2017
    Publication date: November 16, 2017
    Inventors: MAKOTO HIRANO, WOOJUNG SUN
  • Publication number: 20170329556
    Abstract: A method of reading a nonvolatile memory device including a plurality of pages coupled to a plurality of word lines and a plurality of bit lines, each of the plurality of pages including a data region storing a data and a flag region storing a flag, includes applying a first read voltage to a selected word line to generate first sensing data and a first sensing flag; applying a second read voltage to the selected word line to generate second sensing data and a second sensing flag, generating determination data by performing a logical operation on the first and second sensing data; determining a shift voltage based on the determination data and the read flag; and applying a third read voltage, based on the shift voltage, to the selected word line to generate a read data.
    Type: Application
    Filed: February 17, 2017
    Publication date: November 16, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Makoto HIRANO
  • Publication number: 20170293449
    Abstract: A nonvolatile memory device includes a memory cell array including a plurality of first segments having a write data, and a plurality of second segments having a programmed information defining a programmed segment from the plurality of first segments. A randomizer is configured to randomize the write data. An error correction circuit is configured to perform an error correction operation on the write data. A control logic is configured to determine the programmed information from an address received from a memory controller, and to determine whether to operate the randomizer and the error correction circuit based on the determination of the programmed information during the program operation. A page buffer is configured to store the write data and the programmed information during the randomizing and the error correction operation.
    Type: Application
    Filed: January 9, 2017
    Publication date: October 12, 2017
    Inventors: Jung Sunwoo, Makoto Hirano
  • Publication number: 20170231258
    Abstract: A rice cooking method includes: a rice washing step of washing uncooked rice; a soaking step of soaking the uncooked rice, which has been washed in the rice washing step, in water; a rice cooking step of cooking the uncooked rice, which has been soaked in water in the soaking step, with the addition of water, indigestible dextrin as dietary fiber, and a seasoning liquid; and a steaming step of steaming rice that has been cooked in the rice cooking step. The seasoning liquid contains vinegar, fulvic acid, and mineral salt. The addition of the seasoning liquid containing vinegar, fulvic acid, and mineral salt in the rice cooking step can enhance the delicious taste, sweet taste, and water holding capacity of cooked rice.
    Type: Application
    Filed: February 9, 2017
    Publication date: August 17, 2017
    Inventor: Makoto HIRANO
  • Patent number: 9695509
    Abstract: A substrate processing apparatus includes a processing vessel configured to process a substrate; a first purging part configured to perform a first purge to supply inert gas at a first flow rate into a substrate container accommodating the substrate; and a second purging part configured to perform a second purge to supply inert gas at a second flow rate into the substrate container, the second flow rate being lower than the first flow rate.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: July 4, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Makoto Hirano, Akinari Hayashi
  • Patent number: 9677760
    Abstract: A furnace-heating combustion apparatus that allows adjustment of a ratio between the amount of primary air and the amount of secondary air. A double-tube elongate burner extends through a rear wall portion of an air box disposed away from a furnace wall. The leading end portion of the burner is disposed inside a tube section such that a secondary air conduit is formed between an outer circumferential face of the leading end portion and an inner circumferential face of the tube section. A primary air conduit is provided at the leading end portion of the burner to introduce the air inside the air box from the rear end portion and cause it to flow toward the leading end portion. A burner supporting means is provided for to allow adjustment of the position of the burner in the longitudinal direction relative to the rear wall of the air box.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: June 13, 2017
    Assignee: Osaka Gas Co., Ltd.
    Inventor: Makoto Hirano
  • Publication number: 20170117056
    Abstract: An edge word line management method includes performing an erase operation on a memory device in response to an erase command, randomly determining data of a dummy pattern, and performing a post-program operation by writing the data of the dummy pattern in a dummy memory cell, wherein the dummy memory cell is adjacent to a main memory cell of a cell string included in a memory block for which the erase operation has been performed.
    Type: Application
    Filed: October 18, 2016
    Publication date: April 27, 2017
    Inventors: HYUN-KOOK PARK, YEONG-TAEK LEE, MAKOTO HIRANO
  • Patent number: 9424953
    Abstract: A data transfer unit includes a page buffer to latch data of a normal bit line connected to a normal memory cell, a second page buffer to latch data of a parity bit line connected to a parity memory cell, and a third page buffer that is first replaced when the first page buffer is defective or when the second page buffer is defective. ECC Bus_1 is connected to the first, second, and third page buffers, respectively, and Data Bus_1 is connected to the first and third page buffers.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: August 23, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Makoto Hirano
  • Patent number: 9384083
    Abstract: Provided is an error check and correction (ECC) circuit which includes a Chien search unit configured to determine whether there is an error in a data string. The Chien search unit includes a circuit configured to calculate a first bit string by multiplying a plurality of elements of Galois Field GF(2n) and a value of (n-k)-bit, and calculate a second bit string by multiplying the plurality of elements and a value of k-bit; and a plurality of Chien search circuits configured to combine the first bit string and the second bit string to calculate the arbitrary element. The plurality of Chien search circuits are arranged in a matrix along a row direction and a column direction. The first bit string is provided in the row direction or the column direction, and the second bit string is provided in a direction different from the direction of the first bit string.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: July 5, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Daisuke Fujiwara, Makoto Hirano
  • Patent number: 9362007
    Abstract: A data transfer unit includes a first page buffer to latch data of a normal bit line connected to a normal memory cell, a second page buffer to latch data of a parity bit line connected to a parity memory cell, and a third page buffer to be first replaced when the first page buffer is defective or when the second page buffer 102c is defective. An error code correction bus is connected to the first and second page buffers, and a data bus is connected to the first, second and third page buffers.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: June 7, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Makoto Hirano
  • Publication number: 20160091943
    Abstract: A semiconductor integrated circuit operates with a voltage supplied from a first power supply IC to transmit and receive data to and from an external memory. The semiconductor integrated circuit includes: an interface circuit operating with a voltage supplied from a second power supply IC and accessing the external memory to transmit and receive data to and from the external memory; a determination circuit which determines, based on a result of the access by the interface circuit, an AC timing specification between the external memory and the interface circuit to generate control information for controlling an output voltage of the second power supply IC in accordance with the AC timing specification; and a voltage control circuit which controls the output voltage of the second power supply IC in accordance with the control information.
    Type: Application
    Filed: December 9, 2015
    Publication date: March 31, 2016
    Inventors: Hironori KUBO, Norihiko MIZOBATA, Makoto HIRANO, Akihiro SUZUKI, Masahiro TAKEUCHI
  • Publication number: 20160061470
    Abstract: The object is to obtain an electric apparatus capable of immediately using an application program at the time of installing an apparatus without causing pressure on the capacity of a storage region included in a controller of the apparatus to be controlled while reducing loads on an external server and a communication line. Also, the electric apparatus is capable of making each apparatus perform a specific function by a mobile terminal to be operated. An electric apparatus (for example, air conditioner) which is remotely operated by an operation unit included in a mobile terminal includes an application data storing unit (for example, application data storage region) for storing specific data of the electric apparatus. The operation unit includes a common operation unit having a communication driver and a screen configuration frame common to the same kind of electric apparatuses and a specific operation unit having information specific for the electric apparatus.
    Type: Application
    Filed: August 8, 2014
    Publication date: March 3, 2016
    Inventors: Motoi NAGAMINE, Makoto HIRANO
  • Patent number: D785776
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: May 2, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Makoto Hirano
  • Patent number: D786417
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: May 9, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Makoto Hirano
  • Patent number: D786418
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: May 9, 2017
    Assignee: HITACHI KOUSAI ELECTRIC INC.
    Inventor: Makoto Hirano