Patents by Inventor Makoto Kaneko

Makoto Kaneko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6437719
    Abstract: A delta-sigma modulator for use in power amplification of audio signals is configured by an integration circuit, a 1-bit quantizer, an output inversion inhibitor circuit, a delay circuit, and an adder. An analog signal is supplied to the integration circuit by way of the adder, wherein it is subjected to integration. An integration result is subjected to quantization by the 1-bit quantizer to produce 1-bit digital signals. The output inversion inhibitor circuit inhibits an output signal of the 1-bit quantizer from being re-inverted during a re-inversion inhibiting period corresponding to a preset number ‘N’ (where N≧2) of clock pulses counted after the timing when the output signal of the 1-bit quantizer is inverted. The output of the output inversion inhibitor circuit is delayed by one sample and is fed back to the adder by way of the delay circuit.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: August 20, 2002
    Assignee: Yamaha Corporation
    Inventors: Masao Noro, Makoto Kaneko
  • Patent number: 6422200
    Abstract: In a self-igniting possible range, both intake and exhaust valves are placed in a closure condition for a period from the end of an exhaust stroke and the beginning of an intake stroke for establishing a negative overlap period in which a residual gas is pressurized to increase its temperature, thus raising the air fuel mixture temperature in a combustion chamber up to a self-igniting possible temperature. In addition, when a crank angle reaches a predetermined crank angle in the first half of an intake stroke, a fuel is injected from an in-cylinder injector into the combustion chamber. This fuel injected becomes a premixed air fuel because of being evaporated by the gas temperature in the combustion chamber, and on shifting to a compression stroke afterwards, the temperature in the combustion chamber reaches the self-igniting possible temperature.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: July 23, 2002
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Koji Morikawa, Makoto Kaneko, Nobumasa Kani, Youhei Saisyu, Jin Itoh
  • Publication number: 20020026924
    Abstract: In a self-igniting possible range, both intake and exhaust valves are placed in a closure condition for a period from the end of an exhaust stroke and the beginning of an intake stroke for establishing a negative overlap period in which a residual gas is pressurized to increase its temperature, thus raising the air fuel mixture temperature in a combustion chamber up to a self-igniting possible temperature. In addition, when a crank angle reaches a predetermined crank angle in the first half of an intake stroke, a fuel is injected from an in-cylinder injector into the combustion chamber. This fuel injected becomes a premixed air fuel because of being evaporated by the gas temperature in the combustion chamber, and on shifting to a compression stroke afterwards, the temperature in the combustion chamber reaches the self-igniting possible temperature.
    Type: Application
    Filed: August 30, 2001
    Publication date: March 7, 2002
    Applicant: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Koji Morikawa, Makoto Kaneko, Nobumasa Kani, Youhei Saisyu, Jin Itoh
  • Publication number: 20020021238
    Abstract: A delta-sigma modulator for use in power amplification of audio signals is configured by an integration circuit, a 1-bit quantizer, an output inversion inhibitor circuit, a delay circuit, and an adder. An analog signal is supplied to the integration circuit by way of the adder, wherein it is subjected to integration. An integration result is subjected to quantization by the 1-bit quantizer to produce 1-bit digital signals. The output inversion inhibitor circuit inhibits an output signal of the 1-bit quantizer from being re-inverted during a re-inversion inhibiting period corresponding to a preset number ‘N’ (where N≧2) of clock pulses counted after the timing when the output signal of the 1-bit quantizer is inverted. The output of the output inversion inhibitor circuit is delayed by one sample and is fed back to the adder by way of the delay circuit.
    Type: Application
    Filed: August 16, 2001
    Publication date: February 21, 2002
    Inventors: Masao Noro, Makoto Kaneko
  • Patent number: 6261798
    Abstract: The present invention relates to a method of producing [S,S]-ethylenediamine-N,N′-disuccinate wherein a microorganism having malate isomerase activity or matter processed therefrom and a microorganism having ethylenediamine-N,N′-disuccinate ethylenediamine lyase activity or matter processed therefrom are allowed to act on a substrate solution containing maleic acid, maleic anhydride, or a maleic acid salt, and ethylenediamine, in the presence of at least one metal ion selected from the group consisting of alkaline earth metals, iron, zinc, copper, nickel, aluminum, titanium and manganese. The present invention enables to accumulate [S,S]-ethylenediamine-N,N′-disuccinate in a higher yield and at a high concentration within a reaction system using maleic acid as a raw material.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: July 17, 2001
    Assignee: Mitsubishi Rayon Co., Ltd.
    Inventors: Osamu Kato, Makoto Kaneko, Takakazu Endo
  • Patent number: 6184754
    Abstract: A VCO has n inverters connected to each other in a ring, wherein the inverters have a depletion-mode FET. A selector control circuit produces a select signal based upon a threshold voltage of a selector depletion-mode FET to select one of an output derived from a (n−i)-th inverter, or another output signal derived from the n-th inverter. Because the selector FET and the inverter FETs are made using the same process steps and thus have the same device parameters, the selector FET has the same threshold voltage variation as the inverter FETs. Based upon the variation in the FET threshold voltage, the selected output is provided to an input of a first inverter. The VCO operates at a constant frequency by changing the total number of inverters in the ring to compensate for the variation in the threshold voltage of the depletion-mode FETs in the inverters, as determined by the depletion-mode FET in the selector circuit.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: February 6, 2001
    Assignee: NEC Corporation
    Inventor: Makoto Kaneko
  • Patent number: 6136573
    Abstract: A process for producing an [S,S]-ethylenediamine-N,N'-disuccinic acid alkali metal salt which comprises reacting fumaric acid with ethylenediamine in an aqueous medium in the presence of an ion of at least one metal selected from the group consisting of alkaline earth metals and transition metals by the action of ethylenediamine-disuccinic acid ethylenediamine lyase of microorganism origin, adding an alkali hydroxide to a reaction product mixture thereby to separate and recover the metal ion as an insoluble precipitate, and obtaining an [S,S]-ethylenediamine-N,N'-disuccinic acid alkali metal salt.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: October 24, 2000
    Assignee: Mitsubishi Rayon Co., Ltd.
    Inventors: Makoto Kaneko, Takakazu Endo, Toshihiko Fukuda, Mami Kato
  • Patent number: 6103508
    Abstract: This invention relates to a method for removing fumarase activity from a microorganism or processed product thereof having ethylenediamine-N,N'-disuccinic acid ethylenediamine lyase activity, which includes treating the microorganism or processed product thereof with an aqueous alkaline solution at a pH of 8.0 to 10.5 in the presence of at least one salt with a concentration of 5 mM to 1000 mM. The salt is preferably selected from the group consisting of sodium, potassium, ammonium and C.sub.2-6 alkanediamine salts of boric acid, phosphoric acid, hydrochloric acid, sulfuric acid, acetic acid, oxalic acid, fumaric acid, maleic acid and ethylenediamine-N,N'-disuccinic acid, and mixtures thereof.
    Type: Grant
    Filed: October 28, 1998
    Date of Patent: August 15, 2000
    Assignee: Mitsubishi Rayon Co., Ltd.
    Inventors: Mami Kato, Makoto Kaneko, Takakazu Endo
  • Patent number: 5981238
    Abstract: A process for producing an optically active aminopolycarboxylic acid, such as S,S-ethylenediamine-N,N'-disuccinic acid, from a mixture of a diamine, such as ethylenediamine, with fumaric acid using a microorganism having a lyase activity, wherein at least one metal ion selected from the group consisting of an alkaline earth metal, iron, zinc, copper, nickel, aluminum, titanium and manganese is added to the reaction system. According to this process, aminopolycarboxylic acids, such as S,S-ethylenediamine-N,N'-disuccinic acid, or metal complexes thereof, can be appropriately and efficiently produced while improving the reaction yield.
    Type: Grant
    Filed: April 30, 1997
    Date of Patent: November 9, 1999
    Assignee: Mitsubishi Rayon Co., Ltd.
    Inventors: Makoto Kaneko, Yoshihiro Hashimoto, Takakazu Endo, Mami Kato, Wataru Mizunashi
  • Patent number: 5969577
    Abstract: A voltage controlled oscillator is implemented by odd inverters forming a loop, and a depletion type load transistor, a depletion type frequency control transistor and a depletion type compensating transistor supply driving current to an enhancement type driving transistor in each inverter; the compensating transistor is controlled by a reference voltage generator implemented by a series of resistor and a depletion type load transistor, and fluctuation in a fabrication process equally affects the depletion type transistors; when the depletion transistors increases the driving current, the resistor decreases the reference voltage supplied to the gate electrode of the depletion type compensating transistor, and the depletion type compensating transistor cancels the increment of the driving current so as to make the voltage controlled oscillator less sensitive to the fluctuation of the threshold.
    Type: Grant
    Filed: May 4, 1998
    Date of Patent: October 19, 1999
    Assignee: NEC Corporation
    Inventor: Makoto Kaneko
  • Patent number: 5879235
    Abstract: A roulette-like ball game machine has a rotary disk with a plurality of pockets arranged in a peripheral direction and assigned a number respectively, and a guide circle provided around the rotary disk at a somewhat higher position and joining to the rotary disk through an inclined surface. While the rotary disk is turned, a ball rolled along the guide circle falls inside and enters one of the pockets to decide a prize number. In such a ball game machine, a plurality of operation stands are arranged around the guide circle, the rotary disk is formed in an annular shape having a large inner diameter, a large-sized picture surface is provided within the central space of the rotary disk and various pictures are projected on the picture surface by an image projector.
    Type: Grant
    Filed: September 10, 1996
    Date of Patent: March 9, 1999
    Assignee: Sega Enterprises, Ltd.
    Inventors: Makoto Kaneko, Yasuo Jin, Shingo Kataoka, Takanori Akiyama
  • Patent number: 5396347
    Abstract: An output of a TV camera for picking up an X-ray fluoroscopic image is supplied to an image memory. An output of an electrocardiograph is supplied to a cardiograph memory. The output from the image memory is subjected to subtraction processing to obtain an angiogram and the angiogram data is supplied to an image synthesizing circuit. The image synthesizing circuit reads out data of the latest several seconds from the cardiograph memory, and produces a cardiogram on the basis of the read-out data. A synthesis image, in which the cardiogram is superimposed on part of the angiogram, is displayed on a display. The outputs from the image memory and the cardiograph memory are supplied to a recording/reproducing processor. The image data is compressed, and both the compressed image data of one field and the cardiograph output data representing the cardiogram superimposed on the field image are recorded on a recording area of one filed image of a video tape.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: March 7, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Makoto Kaneko
  • Patent number: 5200562
    Abstract: A key position computing apparatus for a player piano is presented which includes the following components (a) sensing device provided on each key and adapted for measuring a distance between a reference plane and a key surface for each key, (b) memory device for storing computer programs to compute the relationship between the output from the sensing device and the distance between the reference plane and the key surface, (c) programmable memory device for storing the characteristic operating data of the sensing device for each key, (d) computing device for computing the relationship between the output from the sensing device and the distance from the reference plane to the surface of each key, (e) gain adjusting device for adjusting the gain of the output from the sensing device to a constant value, and (f) linearizing device for approximating the output of the sensing device by a linearized signal.
    Type: Grant
    Filed: October 23, 1991
    Date of Patent: April 6, 1993
    Assignee: Yamaha Corporation
    Inventors: Makoto Kaneko, Ichirou Ohe
  • Patent number: 5018179
    Abstract: A recursive filter for reducing image noise, in which a subtracter calculates a subtraction between first and second images to obtain a subtraction result, and a factor table determines an addition ratio between the first and second images on the basis of the subtraction result, and in which an adder adds the first and second images at the addition ratio to obtain a third image. An image display apparatus including the recursive filter is also disclosed.
    Type: Grant
    Filed: April 17, 1990
    Date of Patent: May 21, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Makoto Kaneko
  • Patent number: 4909086
    Abstract: A torque sensor for a pulley-belt driving system has a belt passed round a drive pulley and a driven pulley. The torque sensor has a frame having opposite ends respectively in contact with first and second parts of the belt, a beam secured to a stationary body and supporting the frame and strain detection means for detecting the strain of the beam.
    Type: Grant
    Filed: November 17, 1988
    Date of Patent: March 20, 1990
    Assignees: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Makoto Kaneko, Kazuo Tanie, Kazuhito Yokoi
  • Patent number: 4835526
    Abstract: A display controller can display a cursor having sufficient contour irrespective of the background color. The display controller has two cursor pattern memories from which first and second cursor patterns are read in such a timing that the first cursor pattern is displayed at a selected position on the screen and that the second cursor pattern is superimposed on the first cursor pattern. The display controller also has two registers storing therein first and second color codes corresponding respectively to the first and second cursor patterns. The color of the first cursor pattern is determined by a color code obtained by subjecting the first color code and a background color code read from a video memory to a logical multiplication, and the color of the second cursor pattern is determined by a color code obtained by subjecting the color code of the first cursor pattern and the second color code to an exclusive-OR operation.
    Type: Grant
    Filed: July 13, 1988
    Date of Patent: May 30, 1989
    Assignees: Ascii Corporation, Nippon Gakki Seizo Kabushiki Kaisha
    Inventors: Takatoshi Ishii, Makoto Kaneko
  • Patent number: 4783832
    Abstract: An image processing apparatus includes an image memory for storing digital image data obtained by A/D-converting a video signal, an arithmetic circuit for performing an arithmetic operation of the image data so as to emphasize an edge, a first plane memory for storing the edge image data, and a second plane memory for storing binary data of all "1"s or "0"s. The first and second plane memories are addressed in response to address data from an address generator. The readout edge image data and the binary data are processed to paint the edge image. That is, the area surrounded by the edge line is painted with the binary data.
    Type: Grant
    Filed: October 22, 1986
    Date of Patent: November 8, 1988
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Makoto Kaneko
  • Patent number: 4779083
    Abstract: A display control system can implement a gray-scale display of an image composed of a plurality of display dots on a display screen. A plurality of luminance data each representing an intensity level of a corresponding one of the plurality of display dots are first generated. Each luminance data is then converted into a pulse signal whose pulse number corresponds to an intensity level of the corresponding display dot represented by the luminance data. And, each display dot on the display screen is activated in accordance with a corresponding one of the thus produced pulse signals. To eliminate flicker of the display dots, the display dots on the display screen are grouped into a plurality of display sections each composed of a predetermined number of adjacent display dots, and if the display dots in one display section are equal in intensity level, these display dots are activated by the pulse signals which are equal in pulse-number but different in phase.
    Type: Grant
    Filed: January 31, 1986
    Date of Patent: October 18, 1988
    Assignees: ASCII Corporation, Nippon Gakki Seizo Kabushiki Kaisha
    Inventors: Takatoshi Ishii, Makoto Kaneko
  • Patent number: 4760387
    Abstract: A display controller displays an image on either of a CRT display unit and a liquid crystal display unit (LCD) having upper and lower screens in accordance with image data stored in a memory. When a CRT display unit is driven, an address generating circuit calculates at the beginning of each horizontal scanning an address of the memory corresponding to the leftmost display position on the current horizontal scanning line in accordance with the vertical position of the horizontal scanning line and the number of display positions on a horizontal scanning line, and stores data representing the address in a first register. The data in the first register is incremented in accordance with the horizontal scanning and fed to the memory to read the image data.
    Type: Grant
    Filed: January 31, 1986
    Date of Patent: July 26, 1988
    Assignees: Ascii Corporation, Nippon Gakki Seizo Kabushiki Kaisha
    Inventors: Takatoshi Ishii, Makoto Kaneko
  • Patent number: 4756662
    Abstract: A variable compliance manipulator comprising a five linkage structure in which one stationary segment and at least four moving segments are connected with one another through joints each having one degree of freedom, and actuators disposed on two or three of the joints and having a variable-stiffness property, wherein the stiffness of motion of the manipulator in working can be adjusted by detecting and delivering the change in angle of the moving segments to a servo system for controlling the actuators.
    Type: Grant
    Filed: March 30, 1987
    Date of Patent: July 12, 1988
    Assignees: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Kazuo Tanie, Makoto Kaneko, Kazuhito Yokoi