Patents by Inventor Makoto Kitabatake

Makoto Kitabatake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120305944
    Abstract: A semiconductor element according to the present invention can perform both a transistor operation and a diode operation via its channel layer. If the potential Vgs of its gate electrode 165 with respect to that of its source electrode 150 is 0 volts, then a depletion layer with a thickness Dc, which has been depleted entirely in the thickness direction, is formed in at least a part of the channel layer 150 due to the presence of a pn junction between a portion of its body region 130 and the channel layer 150, and another depletion layer that has a thickness Db as measured from the junction surface of the pn junction is formed in that portion of the body region 130.
    Type: Application
    Filed: October 14, 2011
    Publication date: December 6, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Makoto Kitabatake, Masao Uchida
  • Publication number: 20120236615
    Abstract: A converter utilizing synchronous rectification comprises a first switch, a second switch connected in series to the first switch, and a gate drive circuit controlling each switch to switch to on/off-state using pulse-width modulation. Each switch includes a channel region that is conductive in both forward and reverse directions in on-state and is not conductive in the forward direction in off-state, and a unipolar diode region conductive only in the reverse direction. The gate drive circuit synchronizes output timing for signal with which the first switch switches to on-state with output timing for signal with which the second switch switches to off-state, and synchronizes output timing for signal with which the first switch switches to off-state with output timing for signal with which the second switch switches to on-state.
    Type: Application
    Filed: October 28, 2011
    Publication date: September 20, 2012
    Inventor: Makoto Kitabatake
  • Publication number: 20120119690
    Abstract: A synchronous motor drive system improves the design flexibility regarding torque characteristics as compared with conventionally available design flexibility. A synchronous motor has a rotor and a stator. Each of at least two adjacent stator teeth has a slit formed at the tip thereof. Each of a plurality of stator teeth has a main coil wound therearound in concentrated winding. Between each two adjacent teeth having a slit, a sub-coil is wound around in a manner of being accommodated in the respective slits. The drive device separately controls electric current supplied to the main coils and electric current supplied to the sub-coil.
    Type: Application
    Filed: February 15, 2011
    Publication date: May 17, 2012
    Inventors: Noriyoshi Nishiyama, Makoto Kitabatake
  • Publication number: 20110304236
    Abstract: Enhancing torque while reducing torque rippling. A synchronous electric motor, comprising a rotor 2 and a stator 3, wherein a plurality of stator teeth 7 form stator teeth groups 8 with three stator teeth 7 lined up circumferentially forming one group; for the three stator teeth, a main coil is independently wound and sub-coil is further wound around at least one of the stator teeth; coils in one phase are constituted by, in series, the three main coils included in one of the stator teeth groups 8 and sub-coils included in other stator teeth groups, serially connected; and coils in another phase comprise the sub-coils included in one of the stator teeth groups 8 as well as three main coils included in other stator teeth groups.
    Type: Application
    Filed: July 27, 2009
    Publication date: December 15, 2011
    Inventors: Noriyoshi Nishiyama, Masaki Tagome, Yasuhiro Kondo, Makoto Kitabatake, Shun Kazama
  • Publication number: 20110260656
    Abstract: Provided is a small-sized load drive system which, even with three three-phase inverters, significantly reduces noise regardless of control duty ratio. The load drive system includes three-phase inverters 301 to 303, and first, second, and third control units 401 to 403. The inverters 301 to 303 are connected to loads 211 to 213, respectively. The first control unit 401 generates sawtooth wave voltage and controls the inverter 301 according to the sawtooth wave voltage. The second control unit 402 generates inverse sawtooth wave voltage and controls the inverter 302 according to the inverse sawtooth wave voltage. The third control unit 403 generates triangular wave voltage which has ramps respectively equal to the sawtooth/inverse sawtooth wave voltage and either has a same phase or is out of phase by half a period relative to the sawtooth/inverse sawtooth wave voltage, and also controls the inverter 303 according to the triangular wave voltage.
    Type: Application
    Filed: November 18, 2010
    Publication date: October 27, 2011
    Inventors: Shun Kazama, Makoto Kitabatake, Masaki Tagome
  • Patent number: 8030758
    Abstract: A semiconductor module (10) includes a heat sink (1), an electronic component (2), a semiconductor device (3), and a thermally-conductive sheet member (4). The thermally-conductive sheet member (4) covers a part of the semiconductor device (3) and has a lower part (4b) and a side part (4c). The lower part (4b) is in contact with a mounting face (11a) of the heat sink (1). The side part (4c) extends from the lower part (4b) and covers a first side surface (3c) of the semiconductor device (3). The electronic component (2) is disposed across the side part (4c) of the thermally-conductive sheet member (4) from the semiconductor device (3).
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: October 4, 2011
    Assignee: Panasonic Corporation
    Inventor: Makoto Kitabatake
  • Publication number: 20110168697
    Abstract: To aim to reduce ripple current flowing through a capacitor in a power converter apparatus including a converter, the capacitor and an inverter. A current sensor 6 is connected between a capacitor 5 and an inverter circuit 7 for detecting current Iinv flowing from the capacitor 5 to the inverter circuit 7. A frequency detecting subunit 11 performs fast Fourier transform on a waveform of the current Iinv to detect a frequency of a frequency component having the largest amplitude. Also, the frequency detecting subunit 12 detects a zero-cross point of the frequency component having the largest amplitude. Then a carrier signal control subunit 13 performs control such that a frequency and a rise time of a PWM carrier signal for driving the converter circuit 4 match the frequency and the zero-cross point that have been detected by the frequency detecting subunit 11 and the phase detecting subunit 12.
    Type: Application
    Filed: July 30, 2010
    Publication date: July 14, 2011
    Inventors: Shun Kazama, Masaki Tagome, Makoto Kitabatake
  • Patent number: 7964911
    Abstract: In a semiconductor element (20) including a field effect transistor (90), a schottky electrode (9a) and a plurality of bonding pads (12S, 12G), at least one of the plurality of bonding pads (12S, 12G) is disposed so as to be located above the schottky electrode (9a).
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: June 21, 2011
    Assignee: Panasonic Corporation
    Inventors: Makoto Kitabatake, Osamu Kusumoto, Masao Uchida, Kenya Yamashita
  • Publication number: 20110074239
    Abstract: Provided is a synchronous motor including a rotor having magnetic poles distributed circumferentially along a rotation direction of the rotor at equal intervals, and a stator having stator teeth arranged circumferentially along the rotation direction of the rotor, each tooth wound with a stator coil by concentrated winding. Every M consecutive stator teeth belong to one of stator teeth groups arranged at equal intervals. The M consecutive stator teeth in each stator teeth group are arranged at intervals different from the intervals of the magnetic poles of the rotor. The stator coils wound around the M consecutive stator teeth are connected to separate terminals. A motor driver supplies currents of different phases to the stator coils via the respective terminals.
    Type: Application
    Filed: May 28, 2009
    Publication date: March 31, 2011
    Inventors: Noriyoshi Nishiyama, Masaki Tagome, Yasuhiro Kondo, Makoto Kitabatake, Shun Kazama
  • Publication number: 20110057591
    Abstract: The present invention provides a synchronous motor drive system designed to realize reduced vibration and noise along with high output. The system includes: inverters 101, 102, and 103 for converting a direct current to a three-phase alternating current; a current application control unit 52 that controls operations of the three-phase inverters; and a synchronous motor 41 driven by three-phase alternating currents supplied from the three-phase inverters. The current application control unit 52 determines, for each three-phase inverter, a current phase angle and a current amount of a three-phase alternating current to output, and each inverter supplies a three-phase alternating current having the determined current phase angle and current amount to a different one of three-phase coil groups 200a to 200c.
    Type: Application
    Filed: May 29, 2009
    Publication date: March 10, 2011
    Inventors: Masaki Tagome, Noriyoshi Nishiyama, Yasuhiro Kondo, Makoto Kitabatake, Shun Kazama
  • Patent number: 7846828
    Abstract: Ion implantation is carried out to form a p-well region and a source region in parts of a high resistance SiC layer on a SiC substrate, and a carbon film is deposited over the substrate. With the carbon film deposited over the substrate, annealing for activating the implanted dopant ions is performed, and then the carbon film is removed. Thus, a smooth surface having hardly any surface roughness caused by the annealing is obtained. Furthermore, if a channel layer is epitaxially grown, the surface roughness of the channel layer is smaller than that of the underlying layer. Since the channel layer having a smooth surface is provided, it is possible to obtain a MISFET with a high current drive capability.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: December 7, 2010
    Assignee: Panasonic Corporation
    Inventors: Osamu Kusumoto, Makoto Kitabatake, Masao Uchida, Kunimasa Takahashi, Kenya Yamashita, Masahiro Hagio, Kazuyuki Sawada
  • Publication number: 20100301784
    Abstract: In a power conversion circuit operating with high frequency, an off-voltage control circuit 101u of a lower-arm gate drive circuit 24u controls the output voltage of a gate drive power supply 103u to change the output voltage to a voltage lower than a predetermined off voltage during a time period from termination of turn-off operation of a lower arm 22u until start of turn-on operation of an upper arm 21u, and thereafter return the output voltage to the predetermined off voltage immediately after termination of the turn-on operation of the upper arm 21u. With this control, short-circuiting through the upper and lower arms occurring due to a high voltage change dv/dt can be avoided, and the life of a switching element constituting the power conversion circuit improves, increasing the reliability of the power conversion circuit.
    Type: Application
    Filed: December 16, 2009
    Publication date: December 2, 2010
    Inventors: Masaki Tagome, Makoto Kitabatake, Shun Kazama
  • Patent number: 7816688
    Abstract: An upper part of a SIC substrate 1 is oxidized at a temperature of 800 to 1400° C., inclusive, in an oxygen atmosphere at 1.4×102 Pa or less, thereby forming a first insulating film 2 which is a thermal oxide film of 20 nm or less in thickness. Thereafter, annealing is performed, and then a first cap layer 3, which is a nitride film of about 5 nm in thickness, is formed thereon by CVD. A second insulating film 4, which is an oxide film of about 130 nm in thickness, is deposited thereon by CVD. A second cap layer 5, which is a nitride film of about 10 nm in thickness, is formed thereon. In this manner, a gate insulating film 6 made of the first insulating film 2 through the second cap layer 5 is formed, thus obtaining a low-loss highly-reliable semiconductor device.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: October 19, 2010
    Assignee: Panasonic Corporation
    Inventors: Kenya Yamashita, Makoto Kitabatake, Kunimasa Takahashi, Osamu Kusumoto, Masao Uchida, Ryoko Miyanaga
  • Patent number: 7791308
    Abstract: A semiconductor element (20) of the present invention includes a plurality of field effect transistors (90) and a schottky electrode (9a), and the schottky electrode (9a) is formed along an outer periphery of a region where the plurality of field effect transistors (90) are formed.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: September 7, 2010
    Assignee: Panasonic Corporation
    Inventors: Makoto Kitabatake, Osamu Kusumoto, Masao Uchida, Kenya Yamashita
  • Patent number: 7786565
    Abstract: A semiconductor apparatus includes a semiconductor chip 61 including a power semiconductor device using a wide band gap semiconductor, base materials 62 and 63, first and second intermediate members 65 and 68a, a heat conducting member 66, a radiation fin 67, and an encapsulating material 68 for encapsulating the semiconductor chip 61, the first and second intermediate member 65 and 68a and the heat conducting member 66. The tips of the base materials 62 and 63 work respectively as external connection terminals 62a and 63a. The second intermediate member 68a is made of a material with lower heat conductivity than the first intermediate member 65, and a contact area with the semiconductor chip 61 is larger in the second intermediate member 68a than in the first intermediate member.
    Type: Grant
    Filed: September 6, 2004
    Date of Patent: August 31, 2010
    Assignee: Panasonic Corporation
    Inventors: Makoto Kitabatake, Osamu Kusumoto, Masao Uchida, Kunimasa Takahashi, Kenya Yamashita
  • Patent number: 7751215
    Abstract: The present invention provides a semiconductor device and an electric apparatus each of which can realize both high-speed switching operation and energy loss reduction and excels in resistance to current concentration based on a counter electromotive voltage generated by, for example, an inductance load of the electric apparatus.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: July 6, 2010
    Assignee: Panasonic Corporation
    Inventor: Makoto Kitabatake
  • Publication number: 20100148718
    Abstract: A semiconductor element (20) of the present invention includes a plurality of field effect transistors (90) and a schottky electrode (9a), and the schottky electrode (9a) is formed along an outer periphery of a region where the plurality of field effect transistors (90) are formed.
    Type: Application
    Filed: July 21, 2006
    Publication date: June 17, 2010
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Makoto Kitabatake, Osamu Kusumoto, Masao Uchida, Kenya Yamashita
  • Publication number: 20100148244
    Abstract: In a semiconductor element (20) including a field effect transistor (90), a schottky electrode (9a) and a plurality of bonding pads (12S, 12G), at least one of the plurality of bonding pads (12S, 12G) is disposed so as to be located above the schottky electrode (9a).
    Type: Application
    Filed: July 21, 2006
    Publication date: June 17, 2010
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Makoto Kitabatake, Osamu Kusumoto, Masao Uchida, Kenya Yamashita
  • Patent number: 7709403
    Abstract: A gate insulating film which is an oxide layer mainly made of SiO2 is formed over a silicon carbide substrate by thermal oxidation, and then, a resultant structure is annealed in an inert gas atmosphere in a chamber. Thereafter, the silicon carbide-oxide layered structure is placed in a chamber which has a vacuum pump and exposed to a reduced pressure NO gas atmosphere at a high temperature higher than 1100° C. and lower than 1250° C., whereby nitrogen is diffused in the gate insulating film. As a result, a gate insulating film which is a V-group element containing oxide layer, the lower part of which includes a high nitrogen concentration region, and the relative dielectric constant of which is 3.0 or higher, is obtained. The interface state density of an interface region between the V-group element containing oxide layer and the silicon carbide layer decreases.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: May 4, 2010
    Assignee: Panasonic Corporation
    Inventors: Kenya Yamashita, Makoto Kitabatake, Osamu Kusumoto, Kunimasa Takahashi, Masao Uchida, Ryoko Miyanaga
  • Patent number: 7671409
    Abstract: A field-effect transistor power device includes a source electrode, a drain electrode, a wide gap semiconductor including a channel region and a drift region, the channel region and the drift region forming a series current path between the source electrode and the drain electrode, a gate insulating film that covers the channel region, and a gate electrode formed on the gate insulating film. In the series current path which is electrically conducting when the field-effect transistor power device is in an ON state, any region other than the channel region has an ON resistance exhibiting a positive temperature dependence, and the channel region has an ON resistance exhibiting a negative temperature dependence. A ratio ?Ron/Ron(?30° C.) is 50% or less.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: March 2, 2010
    Assignee: Panasonic Corporation
    Inventors: Makoto Kitabatake, Osamu Kusumoto, Masao Uchida, Kunimasa Takahashi, Kenya Yamashita, Koichi Hashimoto