Patents by Inventor Malcolm J. Bevan

Malcolm J. Bevan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11456178
    Abstract: Processing methods may be performed to produce semiconductor structures. The methods may include forming a silicon layer over a semiconductor substrate. The forming may include forming a silicon layer incorporating a dopant. The methods may include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The oxidizing may drive a portion of the dopant through the silicon layer and into the semiconductor substrate.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: September 27, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Steven C. H. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes F. Swenberg
  • Publication number: 20220301920
    Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.
    Type: Application
    Filed: June 6, 2022
    Publication date: September 22, 2022
    Inventors: Kin Pong LO, Vladimir NAGORNY, Wei LIU, Theresa Kramer GUARINI, Bernard L. HWANG, Malcolm J. BEVAN, Jacob ABRAHAM, Swayambhu Prasad BEHERA
  • Patent number: 11450759
    Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-? layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-? layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: September 20, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Steven C. H. Hung, Benjamin Colombeau, Andy Lo, Byeong Chan Lee, Johanes F. Swenberg, Theresa Kramer Guarini, Malcolm J. Bevan
  • Patent number: 11380575
    Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: July 5, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Kin Pong Lo, Vladimir Nagorny, Wei Liu, Theresa Kramer Guarini, Bernard L. Hwang, Malcolm J. Bevan, Jacob Abraham, Swayambhu Prasad Behera
  • Publication number: 20220178747
    Abstract: One or more embodiments described herein generally relate to systems and methods for calibrating an optical emission spectrometer (OES) used for processing semiconductor substrates. In embodiments herein, a light fixture is mounted to a plate within a process chamber. A light source is positioned within the light fixture such that it provides an optical path that projects directly at a window through which the OES looks into the process chamber for its reading. When the light source is on, the OES measures the optical intensity of radiation from the light source. To calibrate the OES, the optical intensity of the light source is compared at two separate times when the light source is on. If the optical intensity of radiation at the first time is different than the optical intensity of radiation at the second time, the OES is modified.
    Type: Application
    Filed: March 27, 2020
    Publication date: June 9, 2022
    Inventors: Kin Pong LO, Lara HAWRYLCHAK, Malcolm J. BEVAN, Theresa Kramer GUARINI, Wei LIU, Bernard L. HWANG
  • Patent number: 11271097
    Abstract: Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include forming a silicon layer over a semiconductor substrate. The semiconductor substrate may include silicon germanium. The methods may include oxidizing a portion of the silicon layer to form a sacrificial oxide while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The methods may include removing the sacrificial oxide. The methods may include oxidizing the portion of the silicon layer in contact with the semiconductor substrate to form an oxygen-containing material. The methods may include forming a high-k dielectric material overlying the oxygen-containing material.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: March 8, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Steven C. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes Swenberg
  • Publication number: 20220028656
    Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.
    Type: Application
    Filed: July 27, 2020
    Publication date: January 27, 2022
    Inventors: Kin Pong LO, Vladimir NAGORNY, Wei LIU, Theresa Kramer GUARINI, Bernard L. HWANG, Malcolm J. BEVAN, Jacob ABRAHAM, Swayambhu Prasad BEHERA
  • Publication number: 20220013336
    Abstract: A method and apparatus for the use of hydrogen plasma treatments is described herein. The process chamber includes a plurality of chamber components. The plurality of chamber components may be coated with a yttrium zirconium oxide composition, such as a Y2O3—ZrO2 solid solution. Some of the plurality of chamber components are replaced with a bulk yttrium zirconium oxide ceramic. Yet other chamber components are replaced with similar components of different materials.
    Type: Application
    Filed: July 10, 2020
    Publication date: January 13, 2022
    Inventors: Jian WU, Lara A. HAWRYLCHAK, Ren-Guan DUAN, Bernard L. HWANG, Malcolm J. BEVAN, Wei LIU
  • Publication number: 20210398814
    Abstract: Processing methods may be performed to produce semiconductor structures. The methods may include forming a silicon layer over a semiconductor substrate. The forming may include forming a silicon layer incorporating a dopant. The methods may include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The oxidizing may drive a portion of the dopant through the silicon layer and into the semiconductor substrate.
    Type: Application
    Filed: June 15, 2021
    Publication date: December 23, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Steven C. H. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes F. Swenberg
  • Publication number: 20210202702
    Abstract: Embodiments of the disclosure provide an improved apparatus and methods for nitridation of stacks of materials. In one embodiment, a method for processing a substrate in a processing region of a process chamber is provided. The method includes generating and flowing plasma species from a remote plasma source to a delivery member having a longitudinal passageway, flowing plasma species from the longitudinal passageway to an inlet port formed in a sidewall of the process chamber, wherein the plasma species are flowed at an angle into the inlet port to promote collision of ions or reaction of ions with electrons or charged particles in the plasma species such that ions are substantially eliminated from the plasma species before entering the processing region of the process chamber, and selectively incorporating atomic radicals from the plasma species in silicon or polysilicon regions of the substrate.
    Type: Application
    Filed: March 15, 2021
    Publication date: July 1, 2021
    Inventors: Matthew Scott ROGERS, Roger CURTIS, Lara HAWRYLCHAK, Canfeng LAI, Bernard L. HWANG, Jeffrey A. TOBIN, Christopher S. OLSEN, Malcolm J. BEVAN
  • Publication number: 20210134986
    Abstract: Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include forming a silicon layer over a semiconductor substrate. The semiconductor substrate may include silicon germanium. The methods may include oxidizing a portion of the silicon layer to form a sacrificial oxide while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The methods may include removing the sacrificial oxide. The methods may include oxidizing the portion of the silicon layer in contact with the semiconductor substrate to form an oxygen-containing material. The methods may include forming a high-k dielectric material overlying the oxygen-containing material.
    Type: Application
    Filed: October 26, 2020
    Publication date: May 6, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Steven C. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes Swenberg
  • Publication number: 20210104617
    Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-? layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-? layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.
    Type: Application
    Filed: September 30, 2020
    Publication date: April 8, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Steven C.H. Hung, Benjamin Colombeau, Andy Lo, Byeong Chan Lee, Johanes F. Swenberg, Theresa Kramer Guarini, Malcolm J. Bevan
  • Publication number: 20210043448
    Abstract: Processing platforms having a central transfer station with a robot and an environment having greater than or equal to about 0.1% by weight water vapor, a pre-clean chamber connected to a side of the transfer station and a batch processing chamber connected to a side of the transfer station. The processing platform configured to pre-clean a substrate to remove native oxides from a first surface, form a blocking layer using a alkylsilane and selectively deposit a film. Methods of using the processing platforms and processing a plurality of wafers are also described.
    Type: Application
    Filed: October 27, 2020
    Publication date: February 11, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Ning Li, Mihaela A. Balseanu, Li-Qun Xia, Dongqing Yang, Lala Zhu, Malcolm J. Bevan, Theresa Kramer Guarini, Wenbo Yan
  • Patent number: 10872763
    Abstract: Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include delivering a nitrogen-containing precursor or an oxygen-containing precursor to a substrate contained in a semiconductor processing chamber. The methods may include forming reactive ligands on an exposed surface of the substrate with the nitrogen-containing precursor or the oxygen-containing precursor. The methods may also include forming a high-k dielectric material overlying the substrate.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: December 22, 2020
    Assignee: Applied Materials, Inc.
    Inventors: David Chu, Steven C. Hung, Malcolm J. Bevan, Charles Chu, Tatsuya E. Sato, Shih-Chung Chen, Patricia M. Liu, Johanes Swenberg
  • Publication number: 20200350157
    Abstract: Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include delivering a nitrogen-containing precursor or an oxygen-containing precursor to a substrate contained in a semiconductor processing chamber. The methods may include forming reactive ligands on an exposed surface of the substrate with the nitrogen-containing precursor or the oxygen-containing precursor. The methods may also include forming a high-k dielectric material overlying the substrate.
    Type: Application
    Filed: May 3, 2019
    Publication date: November 5, 2020
    Applicant: Applied Materials, Inc.
    Inventors: David Chu, Steven C. Hung, Malcolm J. Bevan, Charles Chu, Tatsuya E. Sato, Shih-Chung Chen, Patricia M. Liu, Johanes Swenberg
  • Patent number: 10068771
    Abstract: Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer between at least two sequential process steps used in the fabrication the gate dielectric structure. Maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth also improves the uniformity of nitrogen implanted in the gate dielectric.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: September 4, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Malcolm J. Bevan, Haowen Bu, Hiroaki Niimi, Husam N. Alshareef
  • Patent number: 10049881
    Abstract: Embodiments of the invention provide an improved apparatus and methods for nitridation of stacks of materials. In one embodiment, a remote plasma system includes a remote plasma chamber defining a first region for generating a plasma comprising ions and radicals, a process chamber defining a second region for processing a semiconductor device, the process chamber comprising an inlet port formed in a sidewall of the process chamber, the inlet port being in fluid communication with the second region, and a delivery member disposed between the remote plasma chamber and the process chamber and having a passageway in fluid communication with the first region and the inlet port, wherein the delivery member is configured such that a longitudinal axis of the passageway intersects at an angle of about 20 degrees to about 80 degrees with respect to a longitudinal axis of the inlet port.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: August 14, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Matthew S. Rogers, Roger Curtis, Lara Hawrylchak, Ken Kaung Lai, Bernard L. Hwang, Jeffrey Tobin, Christopher Olsen, Malcolm J. Bevan
  • Publication number: 20180211833
    Abstract: Processing platforms having a central transfer station with a robot and an environment having greater than or equal to about 0.1% by weight water vapor, a pre-clean chamber connected to a side of the transfer station and a batch processing chamber connected to a side of the transfer station. The processing platform configured to pre-clean a substrate to remove native oxides from a first surface, form a blocking layer using a alkylsilane and selectively deposit a film. Methods of using the processing platforms and processing a plurality of wafers are also described.
    Type: Application
    Filed: January 24, 2018
    Publication date: July 26, 2018
    Inventors: Ning Li, Mihaela Balseanu, Li-Qun Xia, Dongqing Yang, Lala Zhu, Malcolm J. Bevan, Theresa Kramer Guarini, Wenbo Yan
  • Publication number: 20180130662
    Abstract: Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer between at least two sequential process steps used in the fabrication the gate dielectric structure. Maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth also improves the uniformity of nitrogen implanted in the gate dielectric.
    Type: Application
    Filed: January 9, 2018
    Publication date: May 10, 2018
    Inventors: Malcolm J. Bevan, Haowen Bu, Hiroaki Niimi, Husam N. Alshareef
  • Patent number: 9892927
    Abstract: Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer between at least two sequential process steps used in the fabrication the gate dielectric structure. Maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth also improves the uniformity of nitrogen implanted in the gate dielectric.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: February 13, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Malcolm J. Bevan, Haowen Bu, Hiroaki Niimi, Husam N. Alshareef