Patents by Inventor Man Wong

Man Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Policy services
    Patent number: 8775621
    Abstract: A method and system for applying policies to services is provided. An embodiment includes a method for applying services wherein a request from a subscriber for a particular service is received. The request is compared with a policy to ascertain whether or not access to the particular service is permitted, and, if permitted, if there are any restrictions or limitations to that access.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: July 8, 2014
    Assignee: Redknee Inc.
    Inventors: Frank Seiferth, Vincent Chi Chiu Wong, Rebecca Yuen Man Wong, Nigel Reginald Back, Bohdan Zabawskyj
  • Method for fabrication of active-matrix display panels
    Patent number: 8754416
    Abstract: The present invention provides a method of an active-matrix thin film transistor array, comprising of two levels of metallic interconnections formed from one layer of metallic conductor; and thin-film transistors with source, drain and gate electrodes either fully or partially replaced with metal, and wherein the pixel electrodes are polycrystalline silicon.
    Type: Grant
    Filed: November 24, 2006
    Date of Patent: June 17, 2014
    Assignee: The Hong Hong University of Science and Technology
    Inventors: Hoi-Sing Kwok, Man Wong, Zhiguo Meng, Dongli Zhang, Jiaxin Sun, Xiuling Zhu
  • THIN FILM TRANSISTOR WITH TWO-DIMENSIONAL DOPING ARRAY
    Publication number: 20140159039
    Abstract: A thin film transistor includes: a source region; a drain region; and a polycrystalline thin film active channel region connected to the source region and the drain region, the active channel region comprising grains and being doped with a two-dimensional pattern comprising a plurality of doped regions, the plurality of doped regions each comprising at least portions of a plurality of the grains and at least one grain boundary.
    Type: Application
    Filed: December 12, 2013
    Publication date: June 12, 2014
    Inventors: Hoi Sing KWOK, Meng ZHANG, Shuming CHEN, Wei ZHOU, Man WONG
  • Oxide microchannel with controllable diameter
    Patent number: 8716050
    Abstract: Described herein is a microchannel that is formed beneath and parallel to a surface of a silicon substrate. Silicon migration technology is utilized to form a microchannel that is buried beneath the surface of the silicon substrate. Etching opens at least one end of the microchannel. Oxidization is utilized through the open end of the microchannel to facilitate a controlled diameter of the microchannel.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: May 6, 2014
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Man Wong, Fan Zeng
  • Method and apparatus for equalizing a bandwidth impedance mismatch between a client and an interface
    Patent number: 8683089
    Abstract: One or more client engines issues write transactions to system memory or peer parallel processor (PP) memory across a peripheral component interconnect express (PCIe) interface. The client engines may issue write transactions faster than the PCIe interface can transport those transactions, causing write transactions to accumulate within the PCIe interface. To prevent the accumulation of write transactions within the PCIe interface, an arbiter throttles write transactions received from the client engines based on the number of write transactions currently being transported across the PCIe interface.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: March 25, 2014
    Assignee: Nvidia Corporation
    Inventors: Raymond Hoi Man Wong, Samuel H. Duncan, Lukito Muliadi
  • Fast and highly scalable quota-based weighted arbitration
    Patent number: 8667200
    Abstract: One embodiment of the present invention sets forth a technique for arbitrating between a set of requesters that transmit data transmission requests to the weighted LRU arbiter. Each data transmission request is associated with a specific amount of data to be transmitted over the crossbar unit. Based on the priority state associated with each requester, the weighted LRU arbiter then selects the requester in the set of requesters with the highest priority. The weighted LRU arbiter then decrements the weight associated with the selected requester stored in a corresponding weight store based on the size of the data to be transmitted. If the decremented weight is equal to or less than zero, then the priority associated with the selected requester is set to a lowest priority. If, however, the decremented weight is greater than zero, then the priority associated with the selected requester is not changed.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: March 4, 2014
    Assignee: NVIDIA Corporation
    Inventors: Lukito Muliadi, Raymond Hoi Man Wong, Madhukiran V. Swarna, Samuel H. Duncan
  • Read completion data management
    Patent number: 8656117
    Abstract: An input/output unit for a computer system that is interfaced with a memory unit having a plurality of partitions manages completions of read requests in the order that they were made. A read request buffer tracks the order in which the read requests were made so that read data responsive to the read requests can be completed and returned to a requesting client in the order the read requests were made.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: February 18, 2014
    Assignee: Nvidia Corporation
    Inventors: Raymond Hoi Man Wong, Samuel Hammond Duncan, Lukito Muliadi, Madhukiran V. Swarna
  • ELECTRICAL AND THERMAL CONDUCTIVE THIN FILM WITH DOUBLE LAYER STRUCTURE PROVIDED AS A ONE-DIMENSIONAL NANOMATERIAL NETWORK WITH GRAPHENE/GRAPHENE OXIDE COATING
    Publication number: 20130299217
    Abstract: A conductive thin film device includes a substrate and a thin film structure applied to the substrate. The thin film structure is applied as a first layer and forms a one-dimensional nanomaterial networked layer deposited on the substrate. A coating layer overlays the one-dimensional nanomaterial networked layer and can be made from graphene or graphene oxide. The coating layer at least partially covers the nanomaterial networked layer, thereby forming the device as a double-layer structure.
    Type: Application
    Filed: May 10, 2013
    Publication date: November 14, 2013
    Applicant: THE HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Matthew Ming Fai YUEN, Xinfeng ZHANG, Wayman Ngai Man WONG
  • Build profile for a set-top box
    Patent number: 8510788
    Abstract: One embodiment of the present disclosure takes the form of a method for generating a profile of a build program for one or more set-top box platforms supported by a satellite distribution system. The one or more build profiles may maintain information about the one or more the modules and sub-modules of the build program, including but not limited to a memory address indicating the location of each module of the build program in the memory components of the set-top box. In another embodiment, the build profile may also maintain the relative offset address of each module of the build program from the beginning of the build program, an indicator of each module and sub-module and the amount of memory that each module comprises when stored in memory.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: August 13, 2013
    Assignee: EchoStar Technologies L.L.C.
    Inventor: Kan Man Wong
  • MEMORY BANDWIDTH REALLOCATION FOR ISOCHRONOUS TRAFFIC
    Publication number: 20130138815
    Abstract: The MMU services data requests associated with isochronous (ISO) data (referred to herein as “ISO requests”) with a high priority to meet a fixed latency requirement. Such data includes display data for transmission to the display device or other display devices. Conversely data requests associated with non-isochronous (NISO) data are serviced with a relatively lower priority. Such data requests include requests received from the CPU, video requests and copy requests. The MMU utilizes a buffering mechanism to buffer ISO and NISO requests. The size of the buffer that stores ISO requests controls the amount of memory bandwidth that is allocated to the ISO requests and the amount of memory bandwidth available for NISO requests.
    Type: Application
    Filed: November 30, 2011
    Publication date: May 30, 2013
    Inventors: Wishwesh Anil GANDHI, Raymond Hoi Man Wong
  • Polycrystalline silicon thin film transistors with bridged-grain structures
    Patent number: 8426865
    Abstract: A low temperature polycrystalline silicon device and techniques to manufacture thereof with excellent performance. Employing doped poly-Si lines which we called a bridged-grain structure (BG), the intrinsic or lightly doped channel is separated into multiple regions. A single gate covering the entire active channel including the doped lines is still used to control the current flow. Using this BG poly-Si as an active layer and making sure the TFT is designed so that the current flows perpendicularly to the parallel lines of grains, grain boundary effects can be reduced.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: April 23, 2013
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Hoi Sing Kwok, Man Wong, Zhiguo Meng, Shuyun Zhao
  • Data packer for packing and aligning write data
    Patent number: 8396993
    Abstract: A data packer of an input/output hub of a computer system packs and formats write data that is supplied to it before the write data is written into a memory unit of the computer system. More particularly, the data packer accumulates write data received from lower bandwidth clients for delivery to a high bandwidth memory interface. Also, the data packer aligns the write data, so that when the write data is read out from the write data packer, no further alignment is needed.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: March 12, 2013
    Assignee: NVIDIA Corporation
    Inventors: Raymond Hoi Man Wong, Samuel Hammond Duncan, Lukito Muliadi, Madhukiran V. Swarna
  • Wheelchair safety device
    Patent number: 8381883
    Abstract: A wheelchair safety device comprises a brake lever, four link levers, an upper brake plate, a brake wheel, a lower brake plate, a parking wheel, and an angularly adjustable mounting plate. One end of the first, the second and the third link levers is respectively articulated at the brake lever, another end of the first and the second link levers are articulated with one end of the fourth link lever. Another end of the fourth link lever is articulated at the upper brake plate and another end of the third link lever is articulated at the lower brake plate. One end of the upper and the lower brake plates is respectively articulated at the angularly adjustable mounting plate, and another end thereof is mounted with the brake wheel and the parking wheel, respectively. The brake wheel and the parking wheel respectively act on the wheelchair.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: February 26, 2013
    Inventors: Wang Kin Lo, Wai Man Wong
  • Data packer for packing and aligning write data
    Patent number: 8380895
    Abstract: A data packer of an input/output hub of a computer system packs and formats write data that is supplied to it before the write data is written into a memory unit of the computer system. More particularly, the data packer accumulates write data received from lower bandwidth clients for delivery to a high bandwidth memory interface. Also, the data packer aligns the write data, so that when the write data is read out from the write data packer, no further alignment is needed.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: February 19, 2013
    Assignee: NVIDIA Corporation
    Inventors: Raymond Hoi Man Wong, Samuel Hammond Duncan, Lukito Muliadi, Madhukiran V. Swarna
  • Data packer for packing and aligning write data
    Patent number: 8380896
    Abstract: A data packer of an input/output hub of a computer system packs and formats write data that is supplied to it before the write data is written into a memory unit of the computer system. More particularly, the data packer accumulates write data received from lower bandwidth clients for delivery to a high bandwidth memory interface. Also, the data packer aligns the write data, so that when the write data is read out from the write data packer, no further alignment is needed.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: February 19, 2013
    Assignee: NVIDIA Corporation
    Inventors: Raymond Hoi Man Wong, Samuel Hammond Duncan, Lukito Muliadi, Madhukiran V. Swarna
  • Metal-Oxide Based Thin-Film Transistors with Fluorinated Active Layer
    Publication number: 20130037798
    Abstract: A thin-film transistor with a fluorinated channel and fluorinated source and drain regions and methods of fabrication are provided. The thin-film transistor includes: a substrate; a semiconductor active layer of fluorine-doped metal-oxide formed on the substrate; fluorine-doped source and drain regions disposed adjacent to the semiconductor active layer; a gate electrode disposed over the semiconductor active layer, configured to induce a continuous conduction channel between the source and drain regions; and a gate dielectric material separating the gate electrode and the channel.
    Type: Application
    Filed: August 10, 2012
    Publication date: February 14, 2013
    Applicant: THE HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Man WONG, Hoi Sing KWOK, Zhi YE
  • Polycrystalline silicon as an electrode for a light emitting diode and method of making the same
    Patent number: 8339026
    Abstract: Metal induced polycrystallized silicon is used as the anode in a light emitting device, such as an OLED or AMOLED. The polycrystallized silicon is sufficiently non-absorptive, transparent and made sufficiently conductive for this purpose. A thin film transistor can be formed onto the polycrystallized silicon anode, with the silicon anode acting as the drain of the thin film transistor, thereby simplifying production.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: December 25, 2012
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Hoi Sing Kwok, Man Wong, Zhiguo Meng, Jiaxin Sun, Xiuling Zhu
  • Metal-induced crystallization of amorphous silicon in thin film transistors
    Patent number: 8338237
    Abstract: The invention provides a method for forming thin film transistors including a polycrystalline semiconducting film. The method comprises depositing a first layer of amorphous semiconducting thin film on to a substrate; depositing a second layer of thin film on to the first layer of amorphous semiconducting thin film; patterning the second layer of thin film so that the first layer of amorphous semiconducting thin film is exposed at selected locations; exposing the first and second layers of thin film to a nickel containing compound in either a solution or a vapor phase ; removing the second layer of thin film; and annealing the first layer of amorphous semiconducting thin film at an elevated temperature so the first layer of amorphous semiconducting thin film converts into a polycrystalline semiconducting thin film.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: December 25, 2012
    Assignee: Hong Kong University of Science and Technology
    Inventors: Hoi Sing Kwok, Man Wong, Zhiguo Meng, Shuyun Zhao, Chunya Wu
  • PHOSPHOR INK COMPOSITION
    Publication number: 20120286208
    Abstract: The present invention provides phosphor inks configured to achieve high efficiency in converting LED light from one wavelength to another. The phosphor ink composition for deposition on an LED device comprises a phosphor component having nano-phosphor particles on the order of 100 to 1000 nanometers, and a curable resin component. In particular, the nano-phosphor particles are uniformly dispersed throughout the ink composition. The nano-phosphor particles may be formed by a size reduction process carried out on larger phosphor particles on the order of 1 to 50 micrometers. Preferably, the size reduction process is based on solvent wet milling. Methods for preparing the phosphor inks based on forming the nano-phosphor particles from larger particles by solvent wet milling are also provided.
    Type: Application
    Filed: July 30, 2012
    Publication date: November 15, 2012
    Applicant: Hong Kong Applied Science and Technology Research Institute Company Limited
    Inventors: Dennis MCKEAN, Pan Man WONG, Wenbo MA
  • Bandwidth impedance matching and starvation avoidance by read completion buffer allocation
    Patent number: 8279231
    Abstract: Read completion buffer space is allocated in accordance with a preset limit. When a read request is received from a client, the sum of a current allocation of the read completion buffer space and a new allocation of the read completion buffer space required by the read request is compared with the preset limit. If the preset limit is not exceeded, read completion buffer space is allocated to the read request. If the preset limit is exceeded, the read request is suspended until sufficient data is read out from the read completion buffer.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: October 2, 2012
    Assignee: NVIDIA Corporation
    Inventors: Samuel Hammond Duncan, John H. Edmondson, Raymond Hoi Man Wong, Lukito Muliadi