Abstract: An image processing apparatus includes a processor configured to: extract position coordinates of each document image from an entire image resulting from photographing multiple documents; perform a first operation that extracts, from the document images included in the entire image, a first document image having two sides parallel with a direction of arrangement of the documents and having a first side of the two sides being a far side from a first coordinate axis, the first side having the shortest distance to the first coordinate axis, the first coordinate axis being in parallel with the direction of the arrangement of the documents set with respect to an origin of the entire image; perform a second operation that extracts, as an document image of the same group, a second document image overlapping an extension of the first side of the extracted first image document; and perform a third operation that sets a page number on each of the extracted document images of the same group in an order of closeness from

Abstract: The semiconductor device includes an insulating film that is formed using a cyclic siloxane having a six-membered ring structure as a raw material; a trench that is formed in the insulating film; and a interconnect that is configured by a metal film embedded in the trench. In the semiconductor device, a modified layer is formed on a bottom surface of the trench, in which the number of carbon atoms and/or the number of nitrogen atoms per unit volume is larger than that inside the insulating film.

Abstract: To provide a semiconductor device featuring reduced variation in capacitor characteristics. In the semiconductor device, a protective layer is provided at the periphery of the upper end portion of a recess (hole). This protective layer has a dielectric constant higher than that of an insulating layer placed in the same layer as the protective layer and configuring a multilayer wiring layer placed in a logic circuit region.

Abstract: A semiconductor device includes a semiconductor substrate, and an insulating layer that is provided on the semiconductor substrate, wherein, in an internal circuit formation region of the insulating layer, a via hole and an interconnect trench, that is formed on the via hole and communicates with the via hole, are provided, in the via hole and the interconnect trench, a conductor is provided so as to integrally fill the via hole and said interconnect trench, in a dicing region of the insulating layer, a groove portion and an opening, that communicates with the groove portion and is formed to cover the groove portion when the semiconductor substrate is seen in plane view, are formed, and in the groove portion and the opening, a conductor is provided so as to integrally fill the groove portion and the opening.

Abstract: To provide a semiconductor device featuring reduced variation in capacitor characteristics. In the semiconductor device, a protective layer is provided at the periphery of the upper end portion of a recess (hole). This protective layer has a dielectric constant higher than that of an insulating layer placed in the same layer as the protective layer and configuring a multilayer wiring layer placed in a logic circuit region.

Abstract: A post-CMP cleaning process of a copper layer is to be performed as follows. An alkaline aqueous solution, a polycarboxylic acid, BTA, and an alkaline aqueous solution are sequentially brought into contact with a primary surface of a silicon substrate over which the copper layer is provided.

Abstract: A semiconductor device includes a semiconductor substrate, and an insulating layer that is provided on the semiconductor substrate, wherein, in an internal circuit formation region of the insulating layer, a via hole and an interconnect trench that is formed on the via hole and communicates with the via hole are provided, in the via hole and the interconnect trench, a conductor is provided so as to integrally bury the via hole and said interconnect trench, in a dicing region of the insulating layer, a groove portion and an opening that communicates with the groove portion and is formed to cover the groove portion when the semiconductor substrate is seen in plane view from the side of the substrate surface are formed, and in the groove portion and the opening, a conductor is provided so as to integrally bury the groove portion and the opening.

Abstract: A method of manufacturing a semiconductor device includes: forming a groove portion in a dicing region of an insulating layer and forming a via hole in an internal circuit formation region; providing a first resist film on the insulating layer; providing a second resist film to cover the first resist film; forming an interconnect opening in a region covering an internal circuit formation region of the second resist film and forming a position aligning opening in a region covering the dicing region of the second resist film; and detecting a positional relationship between the groove portion and the position aligning opening so as to detect whether the interconnect opening of the second resist film exists at a predetermined position with respect to the via hole of the insulating layer. In selective removing of the second resist film, the position aligning opening is formed such that a region of the position aligning opening covers the groove portion of the insulating layer.

Abstract: The semiconductor device includes an insulating film that is formed using a cyclic siloxane having a six-membered ring structure as a raw material; a trench that is formed in the insulating film; and a interconnect that is configured by a metal film embedded in the trench. In the semiconductor device, a modified layer is formed on a bottom surface of the trench, in which the number of carbon atoms and/or the number of nitrogen atoms per unit volume is larger than that inside the insulating film.

Abstract: A post-CMP cleaning process of a copper layer is to be performed as follows. An alkaline aqueous solution, a polycarboxylic acid, BTA, and an alkaline aqueous solution are sequentially brought into contact with a primary surface of a silicon substrate over which the copper layer is provided.

Abstract: A post-CMP cleaning process of a copper layer is to be performed as follows. An alkaline aqueous solution, a polycarboxylic acid, BTA, and an alkaline aqueous solution are sequentially brought into contact with a primary surface of a silicon substrate over which the copper layer is provided.

Abstract: A method of manufacturing a semiconductor device includes forming a barrier metal film including a high melting point metal in a concave portion formed in an insulating film formed over a substrate; forming a seed alloy film including copper and an impurity metal different from the copper over the barrier metal film so as to fill a portion of the concave portion; forming a plated metal film containing copper as a major ingredient over the seed alloy film so as to fill the concave portion; first heat-treating the seed alloy film and the plated metal film at 200° C. or higher and for ten minutes or less; removing the plated metal film, the seed alloy film, and the barrier metal film which are exposed to the outside of the concave portion, after the first heat-treating; and second heat-treating the seed alloy film and the plated metal film.

Abstract: A fuse element according to the present invention and a semiconductor integrated circuit with the fuse element include interconnects and a via connected to a region for connecting the interconnects. A first angle between a first side surface of the via and the connect region is smaller than a second angle between a second side surface opposite the first side surface and the connect region.

Abstract: A moving object noise elimination processing device and a moving object noise elimination processing program are provided for making it possible to effectively eliminate a noise due to a moving object in front of a photographing object with a relatively simple method. A moving object noise elimination process involves first photographing an image every predetermined sampling interval ?t and the photographed images are stored in association with time (S10, S12). Next, with respect to the currently photographed image frame data and the previously photographed image frame data, each corresponding pixel brightness value is compared (S14, S16, S18). For each pixel, the one with a higher brightness value is then eliminated as a noise and that with lower brightness value is left (S20). The brightness value in each pixel of the image frame is updated with the left brightness value in each pixel and the updated one is output (S22, S24).

Abstract: A method of manufacturing a semiconductor device includes: forming a groove portion in a dicing region of an insulating layer and forming a via hole in an internal circuit formation region; providing a first resist film on the insulating layer; providing a second resist film to cover the first resist film; forming an interconnect opening in a region covering an internal circuit formation region of the second resist film and forming a position aligning opening in a region covering the dicing region of the second resist film; and detecting a positional relationship between the groove portion and the position aligning opening so as to detect whether the interconnect opening of the second resist film exists at a predetermined position with respect to the via hole of the insulating layer. In selective removing of the second resist film, the position aligning opening is formed such that a region of the position aligning opening covers the groove portion of the insulating layer.

Abstract: A post-CMP cleaning process of a copper layer is to be performed as follows. An alkaline aqueous solution, a polycarboxylic acid, BTA, and an alkaline aqueous solution are sequentially brought into contact with a primary surface of a silicon substrate over which the copper layer is provided.

Abstract: A post-CMP cleaning process of a copper layer is to be performed as follows. An alkaline aqueous solution, a polycarboxylic acid, BTA, and an alkaline aqueous solution are sequentially brought into contact with a primary surface of a silicon substrate over which the copper layer is provided.

Abstract: A post-CMP cleaning process of a copper layer is to be performed as follows. An alkaline aqueous solution, a polycarboxylic acid, BTA, and an alkaline aqueous solution are sequentially brought into contact with a primary surface of a silicon substrate over which the copper layer is provided.

Abstract: A semiconductor device having a structure which can be manufactured with a higher yield includes a local interconnection layer 14 (a first interconnection layer) on a semiconductor substrate 10 and a global interconnection layer 18 (a second interconnection layer) on the local interconnection layer 14. The local interconnection layer 14 and the global interconnection layer 18 include a local interconnection 24 (a first interconnection) and a global interconnection 28 (a second interconnection), respectively, and the global interconnection 28 is thicker than the local interconnection 24. The local interconnection layer 14 and the global interconnection layer 18 also have a dummy interconnection 34 (a first dummy interconnection) and a dummy interconnection 38 (a second dummy interconnection), respectively. The dummy interconnection 34 is narrower than the dummy interconnection 38.

Abstract: A semiconductor device has a first guard ring surrounding a circuit region, a second ring disposed between the circuit region and the first guard ring, and first connections connecting the first guard ring and the second guard ring to each other. An area sandwiched between the first guard ring and the second guard ring is divided by the first connections into a plurality of subareas. Even if the first guard ring is partly defective, water enters from outside into only the subarea which is contiguous to the defective part of the first guard ring.