Abstract: Provided is a data processing system that processes input data, comprising a data generating apparatus that generates the input data and a data processing apparatus that processes the input data generated by the data generating apparatus. The data processing apparatus includes a time interpolation section that generates time interpolated data, in which level differences between pieces of data adjacent in time are a constant value, based on the input data.

Abstract: A jitter measuring apparatus measures timing jitter of a signal-under-test. The jitter measuring apparatus includes a pulse generator for outputting a pulse signal of a predetermined pulse width for an edge of the signal-under-test, and a jitter measuring sub-unit for extracting the timing jitter on the basis of a duty ratio of each cycle of the signal output by the pulse generator.

Abstract: There is provided a measuring apparatus for measuring a signal-to-noise ratio of a discrete waveform which is output from an AD converter in response to an input signal, where the signal-to-noise ratio indicates a ratio of a signal component of the input signal to noise generated by the AD converter. The measuring apparatus includes a spectrum compensating section that receives a spectrum of the discrete waveform output from the AD converter, and compensates the received spectrum in accordance with a non-symmetric sideband between an upper sideband and a lower sideband of the received spectrum, where the upper and lower sidebands are defined with respect to a fundamental frequency of the input signal, and a phase noise waveform calculating section that calculates a phase noise waveform of the discrete waveform based on the spectrum which has been compensated by the spectrum compensating section.

Abstract: A measuring apparatus including a timing jitter estimator which estimates an output timing jitter sequence which indicates the output timing jitter of an output signal based on an output signal output from a DUT in response to an input signal input to the DUT, and a jitter transfer function estimator which estimates a jitter transfer function in the DUT based on the output timing jitter sequence. The jitter transfer function estimator includes an instantaneous phase noise estimator which estimates an instant phase noise of the output signal based on an output signal, and a resampler which generates the output timing jitter sequence by resampling the instantaneous phase noise at predetermined timing.

Abstract: There is provided a clock generator for generating a single-phase clock into which jitter has been injected, having a multi-phase clock generating section for generating a plurality of clock signals having an almost equal phase difference from each other and a jitter injecting section for injecting jitter into the respective clock signals.

Abstract: There is provided a measuring apparatus for measuring a signal-to-noise ratio of a discrete waveform which is output from an AD converter in response to an input signal, where the signal-to-noise ratio indicates a ratio of a signal component of the input signal to noise generated by the AD converter. The measuring apparatus includes a spectrum compensating section that receives a spectrum of the discrete waveform output from the AD converter, and compensates the received spectrum in accordance with a non-symmetric sideband between an upper sideband and a lower sideband of the received spectrum, where the upper and lower sidebands are defined with respect to a fundamental frequency of the input signal, and a phase noise waveform calculating section that calculates a phase noise waveform of the discrete waveform based on the spectrum which has been compensated by the spectrum compensating section.

Abstract: A jitter measurement apparatus for measuring an intrinsic jitter of a circuit to be tested including a phase detector which outputs a signal according to a phase difference between a supplied first input signal and a supplied second input signal, includes: an input unit for supplying an identical signal to the phase detector as the first input signal and as the second input signal; and a jitter measurement unit for measuring the intrinsic jitter of the circuit to be tested by measuring a jitter of a signal which is generated in an inside of the circuit to be tested according to an signal output from the phase detector.

Abstract: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, including a pulse generating section having first pulse generating means for detecting edges of the data-signal-under-measurement to output a first pulse signal having a pulse width set in advance corresponding to the edge and second pulse generating means for detecting boundaries of data sections where data values do not change in the data-signal-under-measurement to output a second pulse signal having a pulse width set in advance over the edge timings of the boundaries of the detected data sections and a jitter calculating section for calculating timing jitter in the data-signal-under-measurement based on the first and second pulse signals.

Abstract: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, having a signal converting section for calculating a spectrum of the signal-under-measurement, a bandwidth calculating section for calculating frequency where a saturation rate of a value of the integrated spectrum of the signal-under-measurement becomes almost equal to a saturation rate set in advance in a band-to-be-measured set in advance as upper cutoff frequency of the band-to-be-measured to calculate the jitter and a jitter calculating section for measuring the jitter in the signal-under-measurement based on the spectaum in the band-to-be-measured of the signal-under-measurement.

Abstract: A testing device for testing an electronic device is provided. The testing device includes: a deterministic jitter application unit for applying deterministic jitter to a given input signal without causing an amplitude modulation component and supplying the input signal with the deterministic jitter to the electronic device; a jitter amount controller for controlling the magnitude of the deterministic jitter generated by the deterministic jitter application unit; and a determination unit for determining whether or not the electronic device is defective based on an output signal output from the electronic device in accordance with the input signal.

Abstract: Timing jitter sequences ??j[n] and ??k[n] of respective clock signals under measurement xj(t) and xk(t) are estimated, and a timing difference sequence between those timing jitter sequences is calculated. In addition, initial phase angles ?0j and ?0k of linear instantaneous phases of the xj(t) and xk(t) are estimated, respectively. A sum of a difference between those initial angles and the timing difference sequence is calculated to obtain a clock skew sequence between the xj(t) and xk(t).

Abstract: Embodiments of the present invention apply wavelets to radio frequency (RF) signals to extract specific characteristics (e.g., jitter, phase variations, frequency variations) so that their timing, phase, and frequency components can be characterized. In one embodiment of the present invention, a Haar wavelet is used to extract timing characteristics. In another embodiment, a Morlet wavelet is used to extract phase characteristics. In still another embodiment, a Morlet wavelet is used to extract frequency characteristics.

Abstract: A wideband signal analyzing apparatus for analyzing an input signal includes frequency-shifting means for generating a plurality of intermediate frequency signals by shifting a frequency of the input signal as much as respectively different frequency-shifting amounts, so that if a frequency band of the input signal is divided into a plurality of frequency bands, each of the frequency bands can be shifted to a predetermined intermediate band, spectrum measuring means for outputting a complex spectrum of each of the intermediate frequency signals, and spectrum reconstructing means for merging the complex spectra.

Abstract: A testing apparatus for testing a device under test (DUT) includes a performance board; a main frame for generating a test signal for testing the DUT and determining pass/fail of the DUT based on an output signal output by the DUT; a pin electronics between the main frame and the performance board and performs sending and receiving signals between the main frame and the DUT; a deterministic jitter injecting unit for receiving the output signal without passing through the pin electronics and inputting a loop signal, which is the received output signal into which a deterministic jitter is injected, to an input pin of the DUT without passing through the pin electronics; and a switching unit for determining whether the input pin of the DUT is provided with the test signal output by the pin electronics or the loop signal output by the deterministic jitter injecting unit.

Abstract: A measuring apparatus for measuring reliability against jitter of an electronic device, including: a jitter tolerance estimator operable to estimate a jitter tolerance of the electronic device based on an output signal output from the electronic device according to an input signal input through a transmission line of which the transmission length is shorter than a predetermined length so that it does not generate a deterministic jitter; a jitter tolerance degradation quantity estimator operable to estimate a quantity of degradation of the jitter tolerance which deteriorates by the deterministic jitter caused in the input signal by transmission through the long transmission line when the input signal is input into the electronic device through the transmission line, of which the transmission length is longer than a predetermined length so that it may cause the deterministic jitter; a system jitter tolerance estimator operable to estimate a jitter tolerance of the electronic device and a jitter tolerance of a s

Abstract: A probability estimating apparatus and method for peak-to-peak clock skews for testing the clock skews among a plurality of clock signals distributed by a clock distributing circuit, and for estimating the generation probability of the peak-to-peak value or peak value of the clock skews. The probability estimating apparatus for peak-to-peak values in clock skews includes a clock skew estimator for estimating clock skew sequences among the plurality of clock signals under test and a probability estimator for determining a generation probability of the peak-to-peak values in the clock skews among the plurality of clock signals under test based on the clock skew sequences from the clock skew estimator by applying Rayleigh distribution. The generation probability of the peak-to-peak value is estimated based on RMS values of the clock signals and the Rayleigh distribution.

Abstract: An electronic device having a semiconductor circuit formed therein includes a semiconductor device in which the semiconductor circuit is formed; and a light emitting device, formed integrally with the semiconductor device, for emitting light indicating a reference position of the semiconductor device.

Abstract: There is provided a clock generator for generating a single-phase clock into which jitter has been injected, having a multi-phase clock generating section for generating a plurality of clock signals having an almost equal phase difference from each other and a jitter injecting section for injecting jitter into the respective clock signals.

Abstract: A signal under measurement is band-limited, and frequency components around a fundamental frequency of the signal under measurement are extracted. Waveform data (approximated zero-crossing data) close to zero-crossing timings of the band-limited signal are sampled, and phase error data between the approximated zero-crossing points and the corresponding zero-crossing points of the signal under measurement are calculated from the approximated zero-crossing data to obtain a zero-crossing phase error data sequence ?[k]. Then an instantaneous period sequence T(k) of the signal under measurement is obtained from the zero-crossing phase error data and sampling intervals Tk,k+1 of the approximated zero-crossing data sequence. Then a period jitter sequence is obtained from differences between the T(k) and a fundamental period T0 of the signal under measurement, and then the period jitter sequence is multiplied by T0/Tk,k+1 to correct the period jitter sequence.

Abstract: A processing apparatus for processing an electronic device having a light emitting unit, includes: a light receiving unit for receiving light emitted by the light emitting unit; a position detector for detecting the position of the electronic device; and a processing unit for processing the electronic device based on the position of the electronic device detected by the position detector.