Abstract: Timing jitter sequences ??j[n] and ??k[n] of respective clock signals under measurement xj(t) and xk(t) are estimated, and a timing difference sequence between those timing jitter sequences is calculated. In addition, initial phase angles ?0j and ?0k of linear instantaneous phases of the xj(t) and xk(t) are estimated, respectively. A sum of a difference between those initial angles and the timing difference sequence is calculated to obtain a clock skew sequence between the xj(t) and xk(t).

Abstract: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, including a pulse generating section having first pulse generating means for detecting edges of the data-signal-under-measurement to output a first pulse signal having a pulse width set in advance corresponding to the edge and second pulse generating means for detecting boundaries of data sections where data values do not change in the data-signal-under-measurement to output a second pulse signal having a pulse width set in advance over the edge timings of the boundaries of the detected data sections and a jitter calculating section for calculating timing jitter in the data-signal-under-measurement based on the first and second pulse signals.

Abstract: A testing apparatus for testing an electronic device, includes a deterministic jitter applying means for applying deterministic jitter to a given input signal without any amplitude variation component occurring and supplying the input signal applied with the deterministic jitter to the electronic device, a jitter amount controlling means for controlling magnitude of the deterministic jitter to be applied by the deterministic jitter applying means and a judging means for judging quality of the electronic device based on an output signal outputted by the electronic device in response to the input signal.

Abstract: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, having a signal converting section for calculating a spectrum of the signal-under-measurement, a bandwidth calculating section for calculating frequency where a saturation rate of a value of the integrated spectrum of the signal-under-measurement becomes almost equal to a saturation rate set in advance in a band-to-be-measured set in advance as upper cutoff frequency of the band-to-be-measured to calculate the jitter and a jitter calculating section for measuring the jitter in the signal-under-measurement based on the spectaum in the band-to-be-measured of the signal-under-measurement.

Abstract: Timing jitter sequences ??j[n] and ??k[n] of respective clock signals under measurement xj(t) and xk(t) are estimated, and a timing difference sequence between those timing jitter sequences is calculated. In addition, initial phase angles ?0j and ?0k of linear instantaneous phases of the xj(t) and xk(t) are estimated, respectively. A sum of a difference between those initial angles and the timing difference sequence is calculated to obtain a clock skew sequence between the xj(t) and xk(t).

Abstract: A testing apparatus for performing a testing on a device under test (DUT) is provided, wherein the testing apparatus includes a performance board on which the DUT is mounted; a main frame for generating a test signal for testing the DUT and determining pass/fail of the DUT on the basis of an output signal output by the DUT; a pin electronics which is provided between the main frame and the performance board and performs sending and receiving signals between the main frame and the DUT; a deterministic jitter injecting unit for receiving the output signal without passing through the pin electronics and inputting a loop signal, which is the received output signal into which a deterministic jitter is injected, to an input pin of the DUT without passing through the pin electronics; and a switching unit for determining whether the input pin of the DUT is provided with the test signal output by the pin electronics or the loop signal output by the deterministic jitter injecting unit.

Abstract: A jitter measuring apparatus for measuring timing jitter of a signal-under-test is provided, wherein the jitter measuring apparatus includes a pulse generator for outputting a pulse signal of a predetermined pulse width for an edge of the signal-under-test, whose timing jitter is under test; and a jitter measuring sub-unit for extracting the timing jitter on the basis of a duty ratio of each cycle of the signal output by the pulse generator.

Abstract: A measuring apparatus is provided that includes: a timing jitter calculator for calculating the first timing jitter sequence of the first signal and the second timing jitter sequence of the second signal; and a jitter transfer function estimator for calculating a jitter transfer function between the first and second signals based on frequency components of the first and second timing jitter sequences. The jitter transfer function estimator calculates the jitter transfer function, for a plurality of frequency component pairs each of which is formed by a frequency component of a timing jitter in the first timing jitter sequence and a frequency component of a timing jitter in the second timing jitter sequence which correspond to approximately equal frequencies, based on frequency component ratios of the timing jitters in the first and second timing jitter sequences.

Abstract: There is provided a phase difference detecting apparatus operable to detect the phase difference between a first input signal and a second input signal. The phase detecting apparatus includes: a first divider operable to generate a first divided signal, which is the first input signal divided by two, so that all rising edges of the first input signal correspond to a rising edge and a falling edge of the first divided signal; a second divider operable to generate a second divided signal, which is the second input signal divided by two, so that the first divided signal corresponds to edges; a first phase detector operable to detect a phase difference between a rising edge of the first divided signal and an edge corresponding to the rising edge in the second divided signal; and a second phase detector operable to detect a phase difference between a falling edge of the first divided signal and an edge corresponding to the falling edge in the second divided signal.

Abstract: A jitter measurement apparatus for measuring an intrinsic jitter of a circuit to be tested including a phase detector which outputs a signal according to a phase difference between a supplied first input signal and a supplied second input signal, includes: an input unit for supplying an identical signal to the phase detector as the first input signal and as the second input signal; and a jitter measurement unit for measuring the intrinsic jitter of the circuit to be tested by measuring a jitter of a signal which is generated in an inside of the circuit to be tested according to an signal output from the phase detector.

Abstract: There is provided a jitter estimating apparatus for calculating phase noise waveform of an input signal and for estimating a peak value, a peak-to-peak value and a worst value of jitter of the input signal, and probability to generate jitter based on the phase noise waveform. Timing jitter sequence, period jitter sequence, and cycle to cycle period jitter sequence of the input signal are calculated and the peak value and the peak to peak value for each jitter, as well as probability to generate jitter may be estimated.

Abstract: A wideband signal analyzing apparatus for analyzing an input signal includes frequency-shifting means for generating a plurality of intermediate frequency signals by shifting a frequency of the input signal as much as respectively different frequency-shifting amounts, so that if a frequency band of the input signal is divided into a plurality of frequency bands, each of the frequency bands can be shifted to a predetermined intermediate band, spectrum measuring means for outputting a complex spectrum of each of the intermediate frequency signals, and spectrum reconstructing means for merging the complex spectra.

Abstract: A measuring apparatus for measuring reliability against jitter of an electronic device, including: a jitter tolerance estimator operable to estimate a jitter tolerance of the electronic device based on an output signal output from the electronic device according to an input signal input through a transmission line of which the transmission length is shorter than a predetermined length so that it does not generate a deterministic jitter; a jitter tolerance degradation quantity estimator operable to estimate a quantity of degradation of the jitter tolerance which deteriorates by the deterministic jitter caused in the input signal by transmission through the long transmission line when the input signal is input into the electronic device through the transmission line, of which the transmission length is longer than a predetermined length so that it may cause the deterministic jitter; a system jitter tolerance estimator operable to estimate a jitter tolerance of the electronic device and a jitter tolerance of a s

Abstract: A jitter measurement apparatus for measuring the jitter of a signal-under-test includes a squarer for obtaining a squared signal which results from raising the signal-under-test to the 2N-th power (N is a positive integer) and a timing jitter estimator for obtaining a timing jitter sequence of the signal-under-test based on the squared signal.

Abstract: A signal under measurement x(t) is transformed into a complex analytic signal zc(t), and an instantaneous phase of the xc(t) is estimated using the zc(t). A linear phase is removed from the instantaneous phase to obtain a phase noise waveform ??(t) of the x(t), and the ??(t) is sampled at a timing close to a zero-crossing timing of the x(t) to obtain a timing jitter sequence. Then a difference sequence of the timing jitter sequence is calculated to obtain a period jitter sequence. The period jitter sequence is multiplied by a ratio T0/Tk,k+1 of the fundamental period T0 of the x(t) and the sampling time interval Tk,k+1 to make a correction of the period jitter sequence. A period jitter value of the x(t) is obtained from the corrected period jitter sequence.

Abstract: A testing apparatus for testing an electronic device, includes a deterministic jitter applying means for applying deterministic jitter to a given input signal without any amplitude variation component occurring and supplying the input signal applied with the deterministic jitter to the electronic device, a jitter amount controlling means for controlling magnitude of the deterministic jitter to be applied by the deterministic jitter applying means and a judging means for judging quality of the electronic device based on an output signal outputted by the electronic device in response to the input signal.

Abstract: A testing device for testing an electronic device is provided. The testing device includes: a deterministic jitter application unit for applying deterministic jitter to a given input signal without causing an amplitude modulation component and supplying the input signal with the deterministic jitter to the electronic device; a jitter amount controller for controlling the magnitude of the deterministic jitter generated by the deterministic jitter application unit; and a determination unit for determining whether or not the electronic device is defective based on an output signal output from the electronic device in accordance with the input signal.

Abstract: A charge-based frequency measurement BIST (CF-BIST) for clock circuits and oscillator circuits is described that requires no outside test stimulus and produces a digital test output. The CF-BIST technique performs structural and defect-oriented testing and uses existing blocks to save die area. The technique adds a multiplexer to the non-sensitive digital path. The system uses the existing VCO as the measuring device and divide-by-N as a frequency counter to reduce the area overhead. The described technique produces an efficient pass/fail evaluation, low-cost and practical implementation of on-chip BIST structure.

Abstract: A measuring apparatus including a timing jitter estimator which estimates an output timing jitter sequence which indicates the output timing jitter of an output signal based on an output signal output from a DUT in response to an input signal input to the DUT, and a jitter transfer function estimator which estimates a jitter transfer function in the DUT based on the output timing jitter sequence. The jitter transfer function estimator includes an instantaneous phase noise estimator which estimates an instant phase noise of the output signal based on an output signal, and a resampler which generates the output timing jitter sequence by resampling the instantaneous phase noise at predetermined timing.

Abstract: A signal under measurement is transformed into a complex analytic signal using a Hilbert transformer and an instantaneous phase of this analytic signal is estimated. A linear phase is subtracted from the instantaneous phase to obtain a phase noise waveform. The phase noise waveform is sampled in the proximity of a zero crossing point of a real part of the analytic signal. A differential waveform of the sample phase noise waveform is calculated to obtain a differential phase noise waveform. An RMS jitter is obtained from the phase noise waveform, and a peak-to-peak jitter is obtained from the phase noise waveform.