Patents by Inventor Manish

Manish has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11341187
    Abstract: A system, method and computer-readable medium for missing data identification, including identifying columns in tables of a database, generating categorical columns of categorical data by transforming data values in the columns into categorical data values, generating a co-occurrence matrix corresponding to a pair of categorical columns in the categorical columns, determining an expected frequency of co-occurrence corresponding to each unique pair of categorical data values based at least in part on a marginal totals corresponding to categorical data values in the co-occurrence matrix, and identifying one or more locations of missing data based at least in part on the count of co-occurrence of each unique pair of categorical data values and the expected frequency of co-occurrence corresponding to each unique pair of categorical data values.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: May 24, 2022
    Assignee: INFORMATICA LLC
    Inventors: Gregorio Convertino, Ranjeet Kumar Tayi, Swati Tomar, Manish Gupta, Chitresh Kakwani
  • Patent number: 11339292
    Abstract: Articles made from a moisture-curable, polymeric composition comprising in weight percent based on the weight of the composition: (A) 2 to less than 80 weight percent (wt %) of an ethylenic polymer with (1) a crystallinity at room temperature of 34% to 55%, or 65% to 80%, and (2) a melt index (I2) of 0.1 to 50 decigrams per minute (dg/min); (B) 3 to 30 wt % of a halogenated flame retardant; (C) 3 to 30 wt % an inorganic antimony flame retardant; and (D) 0 to 10 wt % of at least one of an inorganic flame retardant other than the inorganic antimony flame retardant, e.g., zinc oxide exhibit enhanced ACBD properties in comparison to articles alike in all respects except made from a composition comprising an ethylenic polymer without the requisite crystallinity at room temperature.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: May 24, 2022
    Assignee: Dow Global Technologies LLC
    Inventors: Peter C. Dreux, Vivek Tomer, Manish K. Mundra, Bharat I Chaudhary, Abhijit Ghosh-Dastidar, Rajen M. Patel, Kalyan Sehanobish
  • Patent number: 11340774
    Abstract: Techniques are disclosed for anomaly detection based on a predicted value. A search query can be executed over a period of time to produce values for a key performance indicator (KPI), the search query defining the KPI and deriving a value indicative of the performance of a service at a point in time or during a period of time, the value derived from machine data pertaining to one or more entities that provide the service. A graphical user interface (GUI) enabling a user to indicate a sensitivity setting can be displayed. A user input indicating the sensitivity setting can be received via the GUI. Zero or more of the values as anomalies can be identified in consideration of the sensitivity setting indicated by the user input.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: May 24, 2022
    Assignee: Splunk Inc.
    Inventors: Manish Sainani, Adam Jamison Oliner, Jacob Barton Leverich, Leonid Alekseyev, Sonal Maheshwari
  • Patent number: 11337979
    Abstract: The present disclosure is directed to pharmaceutical compositions comprising a PDE V inhibitor and one or more pharmaceutical excipients or additives wherein the pharmaceutical compositions are in the form of liquid pharmaceutical compositions. The pharmaceutical compositions of the present disclosure are useful for the treatment of diseases or conditions which are treatable by administration of PDE V inhibitor drug such as pulmonary arterial hypertension, erectile dysfunction, etc.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: May 24, 2022
    Assignee: LIQMEDS WORLDWIDE LIMITED
    Inventors: Jinal Pandya, Sandip P. Mehta, Manish Umrethia, Jayanta Kumar Mandal, Hiren Pansuriya
  • Patent number: 11341794
    Abstract: An automated screening system includes an access control reader with one or more computer devices for screening a pre-registered individual seeking admittance into a controlled area. The system has a facial recognition database that stores a facial record for the individual. A camera system captures a facial image of the individual and the one or more computer devices determine whether it matches the facial record that is stored in the facial recognition database. A skin temperature sensor is used for obtaining a skin temperature reading for the individual. The one or more computer devices are configured to generate an electronic signal to admit the individual into the controlled area if the captured facial image matches the facial record that is stored in the facial recognition database and if the skin temperature reading for the individual is within an acceptable pre-established skin temperature range.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: May 24, 2022
    Assignee: ZKTeco USA
    Inventors: Lawrence Reed, Manish Dalal
  • Patent number: 11340788
    Abstract: A method for execution by a storage unit of a dispersed storage network includes receiving a proxied data access request regarding an encoded data slice from another storage unit of the DSN, where the encoded data slice is stored in the storage unit according to a distributed agreement protocol. The method continues with determining whether the other storage unit is an authentic storage unit of the DSN. When the other storage unit is the authentic storage unit, the method continues with processing the proxied data access request to produce a data access response. The method continues with sending the data access response to the other storage unit.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: May 24, 2022
    Inventors: Manish Motwani, Jason K. Resch
  • Patent number: 11341085
    Abstract: Methods and apparatus for a low energy accelerator processor architecture with short parallel instruction word. An integrated circuit includes a system bus having a data width N, where N is a positive integer; a central processor unit coupled to the system bus and configured to execute instructions retrieved from a memory coupled to the system bus; and a low energy accelerator processor coupled to the system bus and configured to execute instruction words retrieved from a low energy accelerator code memory, the low energy accelerator processor having a plurality of execution units including a load store unit, a load coefficient unit, a multiply unit, and a butterfly/adder ALU unit, each of the execution units configured to perform operations responsive to op-codes decoded from the retrieved instruction words, wherein the width of the instruction words is equal to the data width N. Additional methods and apparatus are disclosed.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: May 24, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srinivas Lingam, Seok-Jun Lee, Johann Zipperer, Manish Goel
  • Patent number: 11341320
    Abstract: A method may include obtaining a knowledge graph including entities, and determining, for the knowledge graph, a first state including a first selectable entity subset of the entities that are selectable by a user. The first selectable entity subset may include an entity. The method may further include receiving, from the user and via a graphical user interface (GUI), a selection of the entity from the first selectable entity subset, and responsive to the selection, adding the entity to a report schema. The report schema may be used to populate a report. The method may further include, responsive to the selection, transitioning the knowledge graph to a second state including a second selectable entity subset of the entities that are selectable by the user.
    Type: Grant
    Filed: July 1, 2021
    Date of Patent: May 24, 2022
    Assignee: Intuit Inc.
    Inventors: Jayanth Saimani, Ashish Kumar Mishra, Manish Ramesh Shah
  • Publication number: 20220157039
    Abstract: Object parts (20, 21, 22, 23, 24) are detected in a picture using object detector(s) (3) and part location representations (40, 42, 43, 44) are generated for the detected object parts (20, 22, 23, 24). The size of an object (10) comprising object parts (20, 21, 22, 23, 24) is estimated based on a geometric model and the part location representations (40, 42, 43, 44). Search locations (51) in the picture for a search window (52) having a size based on the estimated size are determined based on the part location representations (40, 42, 43, 44). The search locations (51) are then processed by identifying any detected object part (20, 22, 23) that is within the search window (52) positioned at the search location (51). A homography is estimated by minimizing an error between mapped object part(s) from the geometric model and the identified detected object part(s) (20, 22, 23). If the error is smaller than a threshold value, an object location representation is determined for the object (10).
    Type: Application
    Filed: February 21, 2019
    Publication date: May 19, 2022
    Inventors: Alfredo Fanghella, Manish Sonal
  • Publication number: 20220153973
    Abstract: A moisture-curable polyethylene formulation comprising a (hydrolyzable silyl group)-functional polyethylene copolymer and a condensation cure catalyst. The formulation is designed to be rapidly moisture curable under ambient conditions. Also methods of making and using same; cured polymer products made therefrom; and articles containing or made from same.
    Type: Application
    Filed: February 11, 2020
    Publication date: May 19, 2022
    Applicant: Dow Global Technologies LLC
    Inventors: Bharat I. Chaudhary, Sarat Munjal, Rajesh P. Paradkar, Arkady L. Krasovskiy, Manish Talreja, Manish K. Mundra, Kevin P. Rogers, Bruce M. Hasch
  • Publication number: 20220156213
    Abstract: A reconfigurable data processor includes a plurality of configurable units, and a configuration controller. The configuration controller is configured to start execution of a first application graph in a first set of configurable units. Then, concurrently with the execution of the first application graph in the first set of configurable units, the configuration controllers receive a command to load a configuration file into a second set of configurable units and obtain the configuration file. The configuration file contains information to configure the second set of configurable units to execute a second application graph. The configuration file is then loaded into the second set of configurable units and execution of the second application graph is started in the second set of configurable units.
    Type: Application
    Filed: January 31, 2022
    Publication date: May 19, 2022
    Applicant: SambaNova Systems, Inc.
    Inventors: Gregory Frederick Grohoski, Sumti Jairath, Mark Luttrell, Raghu Prabhakar, Ram Sivaramakrishnan, Manish K. Shah
  • Publication number: 20220153762
    Abstract: Compounds and method of preparation of Si—X and Ge—X compounds (X?N, P, As and Sb) via dehydrogenative coupling between the corresponding unsubstituted silanes and amines (including ammonia) or phosphines catalyzed by metallic catalysts is described. This new approach is based on the catalytic dehydrogenative coupling of a Si—H and a X—H moiety to form a Si—X containing compound and hydrogen gas (X ?N, P, As and Sb). The process can be catalyzed by transition metal heterogenous catalysts such as Ru(0) on carbon, Pd(0) on MgO) as well as transition metal organometallic complexes that act as homogeneous catalysts. The —Si—X products produced by dehydrogenative coupling are inherently halogen free. Said compounds can be useful for the deposition of thin films by chemical vapor deposition or atomic layer deposition of Si-containing films.
    Type: Application
    Filed: February 4, 2022
    Publication date: May 19, 2022
    Inventors: Antonio SANCHEZ, Gennadiy Itov, Peng Zhang, Matthew Stephens, Manish Khandelwal
  • Publication number: 20220158674
    Abstract: Interface circuit. Example interface circuits may be used for data transfer in accordance with the USB protocol version 3.2 or higher. Example interface circuits are configured to enable cooperation with a sink device and/or a host device having a lower supply voltage than the interface circuit, and reducing or preventing voltage spikes herein after power-on reset (POR) events. Thereto, the detection circuit for detection of a sink device downstream of the interface circuit is provided with a signal path for use during a first period after the POR event and having a resistance larger than a resistance used during detection of the said sink device.
    Type: Application
    Filed: September 24, 2021
    Publication date: May 19, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Athar Ali KHAN P, Manish Kumar VISHWAKARMA
  • Patent number: 11336524
    Abstract: A system may include a database disposed within a remote network management platform, a server device disposed in the platform, and a client device. The database may contain representations of configuration items, such as computing devices and software applications associated with the managed network. The server device may provide a graphical user interface including a sequence of panes to the client device. The sequence of panes may include an identifier pane, an identification rules pane, and a reconciliation pane. Each pane may include data entry fields that are operable to define a new class of configuration item. The server device may receive, by way of the graphical user interface, a definition of the new class that uniquely identifies configuration items of a particular type using at least the attributes. The server may store, in the database, the definition of the new class.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: May 17, 2022
    Assignee: ServiceNow, Inc.
    Inventors: Vivian Tero, Chinna Polinati, Madhavi Puvvada, Purushottam Amradkar, Manish Gupta, Brandon Trudel, Guarav Yakhmi, Jesus Antonio Castro Cisneros, Viral Shah
  • Patent number: 11335598
    Abstract: Embodiments include an interconnect structure and methods of forming such an interconnect structure. In an embodiment, the interconnect structure comprises a first interlayer dielectric (ILD) and a first interconnect layer with a plurality of first conductive traces partially embedded in the first ILD. In an embodiment, an etch stop layer is formed over surfaces of the first ILD and sidewall surfaces of the first conductive traces. In an embodiment, the interconnect structure further comprises a second interconnect layer that includes a plurality of second conductive traces. In an embodiment, a via between the first interconnect layer and the second interconnect layer may be self-aligned with the first interconnect layer.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: May 17, 2022
    Assignee: Intel Corporation
    Inventors: Kevin Lin, Sudipto Naskar, Manish Chandhok, Miriam Reshotko, Rami Hourani
  • Patent number: 11334439
    Abstract: An example operation may include one or more of retrieving, into a new node to be instantiated in a blockchain network, a state database checkpoint of a state database created at a block number of a blockchain of the blockchain network, retrieving, into the new node, blocks of the blockchain from the checkpoint block number to a current block number, constructing an initial state database from the received state database checkpoint, and executing, at the new node, the transactions of the retrieved blocks on the initial state database to generate a current state database.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: May 17, 2022
    Assignee: International Business Machines Corporation
    Inventors: Senthilnathan Natarajan, Chander Govindarajan, Manish Sethi, Adarsh Saraf
  • Patent number: 11334139
    Abstract: Various embodiments of the present technology may provide methods and apparatus for an interface having a first bi-directional channel and a second bi-directional channel. The interface operates in one of a first operational state and a second operational state, and performs an exemplary power-saving scheme if it is operating in the second operational state. The interface may detect a plurality of power states and initiate the power-saving scheme based on the detected power state. The plurality of power states may comprise a first power state (low current mode), a second power state (high current mode), and a third power state (mid-current mode).
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: May 17, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Manish Kumar Vishwakarma, Athar Ali Khan P, Rajiv Pandey
  • Patent number: 11334566
    Abstract: Methods, systems, and computer programs are presented for reducing latency for providing a user feed containing one or more posts. One method includes operations for receiving a request to access the user feed and for performing a first query to search posts. The first query uses a first time horizon delimiting a creation time of posts and a first maximum number of posts selected for ranking. The posts from the first query are sent to the client device for presentation on a user interface. Further, a second query is performed to search posts, where the second query uses a second time horizon that is greater than the first time horizon and a second maximum number of posts for ranking that is greater than the first maximum number of posts. The posts from the first query and the second query are merged and sent to the client device for presentation.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: May 17, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Manish Swaminathan, Manas Haribhai Somaiya, Vivek Yogesh Tripathi, Strahinja Markovic, Ali Mohamed, Muhammad Hassan Khan, Xin Hu, Caitlin Marie O'Connor, Zeesha Currimbhoy, Shunlin Liang, Prateek Sachdev, Madhulekha Arunmozhi
  • Patent number: 11336647
    Abstract: Embodiments improve error detection and recovery in media access control security sessions. A MACsec session is torn down after three liveness time intervals elapse without receiving a MACsec key exchange protocol data unit (MKPDU) from a remote peer. This delay between a cessation of effective network communication over the MACsec session and the expiration of the three “liveness” intervals results in increased packet loss and an increased network convergence time as a network continues to route/forward data over the MACsec session for a period of time after the MACsec session has entered secure block mode. To solve this problem, embodiments define a new alarm, called a MACsec link alert, which is raised earlier than a MACsec session timeout generated by traditional embodiments. The MACsec link alert is raised, by at least some embodiments, after a failure to successfully receive an MKPDU from the remote peer after a single MACsec “liveness” timeout interval elapses.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 17, 2022
    Assignee: Juniper Networks, Inc.
    Inventors: Manish Talwar, Ajay Kachrani, Gert Grammel, Hao Wang, Tanweer Biswas
  • Patent number: 11333730
    Abstract: Systems and methods for mapping neuronal circuitry in accordance with embodiments of the invention are illustrated. One embodiment includes a method for generating a neuronal shape graph, including obtaining functional brain imaging data from an imaging device, where the functional brain imaging data includes a time-series of voxels describing neuronal activation over time in a patient's brain, lowering the dimensionality of the functional brain imaging data to a set of points, where each point represents the brain state at a particular time in the timeseries, binning the points into a plurality of bins, clustering the binned points, and generating a shape graph from the clustered points, where nodes in the shape graph represent a brain state and edges between the nodes represent transitions between brain states.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: May 17, 2022
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventor: Manish Saggar