Abstract: The phase-locked loop according to the invention comprises a frequency acquisition loop. The frequency acquisition loop comprises a counter that is operable to count the number of periods of an oscillator signal occurring during a predetermined period of time that is derived from a reference signal period of a reference signal. The oscillator signal has an oscillator signal frequency and an oscillator signal phase. The frequency acquisition loop also comprises a subtractor that is operable to compare the counted number of periods with a desired division factor, wherein N=fVCOlocked/fref and wherein fVCOlocked denotes a desired frequency of the oscillator signal in a locked state of the phase-locked loop and fref denotes the frequency of said reference signal. The comparison results in a subtractor output frequency value. The phase-locked loop further comprises a phase acquisition loop.

Abstract: A phase locked loop (PLL) which includes a phase frequency detector coupled with a time to digital converter capable of comparing a reference signal with an oscillator signal and generating a digital value representing the phase difference between the reference signal and the oscillator signal. The PLL further includes a state machine for phase acquisition that is capable of generating a control value depending on the digital value, and a controllable oscillator that is capable of generating the oscillator signal depending on the control value.

Abstract: The method for determining jitter of a signal in a serial link according to the invention comprising the following steps: First, a section of the signal transmitted via a transmission channel is sampled at different sampling times. The total number of edges in the section is determined. The neighboring sample values are analyzed and from that a statistical value is formed. From the statistical value and the total number of edges a figure of merit is determined. Finally, by means of a look-up table or a jitter-versus-figure of merit curve, the total jitter corresponding to the figure of merit is derived.

Abstract: Methods, systems and apparatus for adjusting parameters of a serial link is introduced. A bit pattern sequence that was transmitted via a transmission channel of the serial link is sampled at different sampling times. For the different sampling times, corresponding bit error rate values are determined. The bit error rate values result in a curve. Based on this curve, a quality value derived, that is used for adjusting parameters of an equalizer unit of the serial link.