Abstract: A query request identifying a query and a plurality of text portions for determining an answer to the query may be received. Relevance scores corresponding with respective ones of the text portions may be determined based on application of one or more machine learning models to the respective text portion and the query. A subset of the text portions may be selected based on the relevance scores. A response message to the query request including an answer to the query in natural language text generated by a large language model based on the first subset of text portions may be determined.

Abstract: A query request identifying a query and a plurality of text portions for determining an answer to the query may be received. Relevance scores corresponding with respective ones of the text portions may be determined based on application of one or more machine learning models to the respective text portion and the query. A subset of the text portions may be selected based on the relevance scores. A response message to the query request including an answer to the query in natural language text generated by a large language model based on the first subset of text portions may be determined.

Abstract: Aspects of the present technology are directed toward Integrated Circuits (IC) including a plurality of trenches disposed in a substrate about a set of silicide regions. The trenches can extend down into the substrate below the set of silicide regions. The silicide regions can be formed by implanting metal ions into portions of a substrate exposed by a mask layer with narrow pitch openings. The trenches can be formed by selectively etching the substrate utilizing the set of silicide regions as a trench mask. An semiconductor material with various degree of crystallinity can be grown from the silicide regions, in openings that extend through subsequently formed layers down to the silicide regions.

Abstract: A computing device receives first data on which to train an artificial neural network (ANN). Using magnetic random access memory (MRAM), the computing device trains the ANN by performing a first set of training iterations on the first data. Each of the first set of iterations includes writing values for a set of weights of the ANN to the MRAM using first write parameters corresponding to a first write error rate. After performing the first set of iterations, the computing device performs a second set of training iterations on the first data. Each of the second set of iterations includes writing values for the set of weights of the ANN to the MRAM using second write parameters corresponding to a second write error rate. The second write error rate is lower than the first write error rate. The computing device stores values for the trained ANN.

Abstract: A magnetic memory device includes a cylindrical core; a plurality of layers surrounding the cylindrical core; a first terminal connected to a first end of the cylindrical core; and a second terminal connected to a second end of the cylindrical core, opposite the first end, wherein the first terminal is configured to receive a first current flowing radially from the cylindrical core through the plurality of layers, the first current imparting a torque on, at least, a magnetization of an inner layer of the plurality of layers.

Abstract: A magnetic memory device comprises a cylindrical core and a plurality of layers surrounding the core. The plurality of layers include a metallic buffer layer, a ferromagnetic storage layer, a barrier layer, and a ferromagnetic reference layer. The cylindrical core, the metallic buffer layer, the ferromagnetic storage layer, the barrier layer, and the ferromagnetic reference layer collectively form a magnetic tunnel junction. A magnetization of the ferromagnetic layer storage parallels an interface between the metallic buffer layer and ferromagnetic storage layer.

Abstract: A web-based tool performs records matching in response to a freeform text input, to find highly contextually-related sentences in a corpus of records. Each sentence in the corpus is converted into a full-size vector representation, and each vector's angle within space is measured. Each full-size vector is compressed to a smaller vector and a loss function is used to preserve for each vector the angle within the lower-dimensional space that existed for the higher-dimensional vector. Full-size and reduced vector representations are generated from the freeform text input. The reduced-size vector of the input is compared to those of the corpus of text to identify, in real-time, a set of vector nearest neighbors that includes, with high accuracy, representations of all records in the corpus similar to the input. Full-size vectors for the nearest neighbors are in turn retrieved and compared to the input, and ranked results are generated.

Abstract: In accordance with one embodiment, a method includes forming a cleavable donor substrate, the substrate including monocrystalline Si, forming a dielectric layer above the substrate in a film thickness direction, and cleaving the substrate into an upper portion having the dielectric layer and a lower portion. In one embodiment, the cleavable substrate is formed using a sacrificial buffer layer above the substrate in the film thickness direction, and forming a strained Si layer above the sacrificial buffer layer in the film thickness direction, followed by etching away the sacrificial buffer layer to cleave the substrate. In another embodiment, the cleavable substrate is formed by implanting ions into the substrate to a peak implant position located below an upper surface of the substrate, annealing the substrate and dielectric layer in an inert environment to form blisters at the peak implant position, and cleaving the substrate using the blisters.

Abstract: Aspects of the present technology are directed toward Integrated Circuits (IC) including a plurality of trenches disposed in a substrate about a set of silicide regions. The trenches can extend down into the substrate below the set of silicide regions. The silicide regions can be formed by implanting metal ions into portions of a substrate exposed by a mask layer with narrow pitch openings. The trenches can be formed by selectively etching the substrate utilizing the set of silicide regions as a trench mask. An semiconductor material with various degree of crystallinity can be grown from the silicide regions, in openings that extend through subsequently formed layers down to the silicide regions.

Abstract: Aspects of the present technology are directed toward Integrated Circuits (IC) including a plurality of trenches disposed in a substrate about a set of silicide regions. The trenches can extend down into the substrate below the set of silicide regions. The silicide regions can be formed by implanting metal ions into portions of a substrate exposed by a mask layer with narrow pitch openings. The trenches can be formed by selectively etching the substrate utilizing the set of silicide regions as a trench mask. An semiconductor material with various degree of crystallinity can be grown from the silicide regions, in openings that extend through subsequently formed layers down to the silicide regions.

Abstract: A method is performed at an electronic device that includes magnetic random access memory (MRAM). The method includes loading the MRAM with data including main data, first error correcting data, and second error correcting data. The MRAM comprises a plurality of MRAM cells characterized by a first magnetic anisotropy corresponding to a first error rate at a predefined temperature that exceeds a threshold for correcting errors using only the first error correcting data. The method further includes, after loading the MRAM with the data, heating the MRAM to the predefined temperature and correcting errors in the main data using both the first error correcting data and the second error correcting data. The method further includes after correcting the errors in the main data, erasing, from the MRAM, the second error correcting data and maintaining, on the MRAM, the first error correcting data.

Abstract: An apparatus includes two or more magnetic tunnel junctions (MTJs), including a first MTJ having a first magnetic characteristic and a second MTJ having a second magnetic characteristic. The first magnetic characteristic is distinct from the second magnetic characteristic. The first magnetic characteristic is based on a first magnetic anisotropy and a first offset field on a first storage layer of the first MTJ. The second magnetic characteristic is based on a second magnetic anisotropy and a second offset field on a second storage layer of the second MTJ, The apparatus further includes a metallic separator coupling the first MTJ with the second MTJ, wherein the first MTJ and the second MTJ are arranged in series.

Abstract: A method for crystalized silicon structures from amorphous structures in a magnetic memory array, wherein the temperature needed to crystalize the amorphous silicon is lower than the temperature budget of the memory element so as to avoid damage to the memory element. An amorphous silicon is deposited, followed by a layer of Ti or Co. An annealing process is then performed which causes the Ti or Co to form TiSi2 or CoSi2 and also causes the underlying amorphous silicon to crystallize.

Abstract: The various implementations described herein include magnetic memory devices and systems, and methods for propagating defects in the devices and systems. In one aspect, a magnetic memory device comprises a non-magnetic cylindrical core configured to receive a current, a plurality of magnetic layers surrounding the core, and a plurality of non-magnetic layers also surrounding the core. The magnetic layers and the non-magnetic layers are arranged in a stack coaxial with the core. Respective magnetic layers of the plurality of magnetic layers are separated by respective non-magnetic layers of the plurality of non-magnetic layers. The device further comprises an input terminal coupled to a first end of the core and a current source coupled to the input terminal. The current source is configured to supply current imparting a Spin Hall Effect (SHE) around the circumference of the core, and the SHE contributes to a magnetization of the magnetic layers.

Abstract: A method for selectively writing to STT-MRAM using an AC current is provided. The method is performed in a memory device including two or more multilevel magnetic tunnel junctions (MTJs) arranged in series with respect to a single terminal of a transistor, where the two or more multilevel MTJs include a first MTJ having a first magnetic characteristic and first electrical characteristic and a second MTJ having a second magnetic characteristic that is distinct from the first magnetic characteristic and a second electrical characteristic. The method includes writing to an MTJ. The writing includes applying a DC current to the two or more MTJs and applying an AC current to the two or more MTJs, where the AC current is adjusted to a frequency that is tuned to a write assist frequency corresponding to the respective MTJ.

Abstract: The various implementations described herein include methods, devices, and systems for fabricating magnetic memory devices. In one aspect, a method of fabricating a magnetic memory device includes: (1) providing a dielectric substrate with a metallic core protruding from the dielectric substrate, where: (a) a first portion of the metallic core is surrounded by the dielectric substrate and a second portion of the metallic core protrudes away from a surface of the dielectric substrate; and (b) the second portion includes: (i) a surface offset from the surface of the dielectric substrate and (ii) sidewalls extending away from the surface of the dielectric substrate to the offset surface; (2) depositing a first ferromagnetic layer on exposed surfaces of the metallic core and the dielectric substrate; (3) depositing a spacer layer on exposed surfaces of the first ferromagnetic layer; and (4) depositing a second ferromagnetic layer on exposed surfaces of the spacer layer.

Abstract: A method is performed at an electronic device that includes magnetic random access memory (MRAM). The method includes loading the MRAM with data including main data, first error correcting data, and second error correcting data. The MRAM comprises a plurality of MRAM cells characterized by a first magnetic anisotropy corresponding to a first error rate at a predefined temperature that exceeds a threshold for correcting errors using only the first error correcting data. The method further includes, after loading the MRAM with the data, heating the MRAM to the predefined temperature and correcting errors in the main data using both the first error correcting data and the second error correcting data. The method further includes after correcting the errors in the main data, erasing, from the MRAM, the second error correcting data and maintaining, on the MRAM, the first error correcting data.

Abstract: According to one embodiment, a method includes forming, at a low temperature, a thin film transistor structure above a flexible substrate in a film thickness direction. The low temperature is less than about 200° C., and the thin film transistor structure includes a contact pad on a lower or upper surface thereof. The method also includes forming, at a high temperature, a perpendicular magnetic tunnel junction (pMTJ) structure above a rigid substrate. The high temperature is greater than about 200° C. The method also includes removing the rigid substrate from below the pMTJ structure and bonding, at the low temperature, the pMTJ structure to the thin film transistor structure using an adhesion layer. Other methods of forming flexible substrates for mounting pMTJs and systems thereof are described in accordance with more embodiments.

Abstract: A magnetic memory device comprises a cylindrical core and a plurality of layers surrounding the core. The plurality of layers include a metallic buffer layer, a ferromagnetic storage layer, a barrier layer, and a ferromagnetic reference layer. The cylindrical core, the metallic buffer layer, the ferromagnetic storage layer, the barrier layer, and the ferromagnetic reference layer collectively form a magnetic tunnel junction. A magnetization of the ferromagnetic layer storage parallels an interface between the metallic buffer layer and ferromagnetic storage layer.

Abstract: Aspects of the present technology are directed toward Integrated Circuits (IC) including a plurality of trenches disposed in a substrate about a set of silicide regions. The trenches can extend down into the substrate below the set of silicide regions. The silicide regions can be formed by implanting metal ions into portions of a substrate exposed by a mask layer with narrow pitch openings. The trenches can be formed by selectively etching the substrate utilizing the set of silicide regions as a trench mask. An semiconductor material with various degree of crystallinity can be grown from the silicide regions, in openings that extend through subsequently formed layers down to the silicide regions.