Patents by Inventor Marco Kraemer

Marco Kraemer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190158536
    Abstract: An aspect includes a computer system with a network encryption device and a trusted container within firmware or hardware and/or within a virtual machine running on the computer system. The network encryption device includes a key store for storing secret encryption keys and a network traffic encryption engine for negotiating and/or storing encryption keys in the key store and/or for encrypting and/or decrypting network traffic using the encryption keys from the key store. The trusted container includes a flow analyzer for analyzing network traffic received from the network encryption device.
    Type: Application
    Filed: November 20, 2017
    Publication date: May 23, 2019
    Inventors: Marco Kraemer, Hoang-Nam Nguyen, Carsten Otte, Christoph Raisch
  • Publication number: 20190146928
    Abstract: A computer program product for optimizing page table manipulations is provided and includes a computer readable storage medium having program instructions that are readable and executable by a processing circuit to cause the processing circuit to create and maintain a translation table with a translation look-aside buffer (TLB) disposed to cache priority translations, update the translation table upon de-registration of a DMA address, allocate entries in the translation table from low to high memory addresses during memory registration, maintain a cursor for identifying where to search for available entries upon performance of a new registration, advance the cursor from entry-to-entry in the translation table and wrap the cursor from an end of the translation table to a beginning of the translation table and issue a synchronous TLB invalidation instruction to invalidate the TLB upon at least one wrapping and an entry being identified and updated.
    Type: Application
    Filed: January 17, 2019
    Publication date: May 16, 2019
    Inventors: Deborah A. Furman, Marco Kraemer, Dale F. Riedy, Anthony T. Sofia
  • Patent number: 10282311
    Abstract: Provided is a method for configuring the functional capabilities of a computer system. The computer system may include a persistent memory and a replaceable functional unit. The method may include transferring, in response to a repair action for the functional unit, enablement data that is stored on the functional unit to the persistent memory. The enablement data may specify one or more functional capabilities of the functional unit that are enabled. The method may further include erasing the enablement data from the functional unit after it has been transferred to the persistent storage. The method may further include obtaining a second unique identification item from a replacement unit. The method may further include obtaining new enablement data. The new enablement data may be transferred to the replacement unit.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: May 7, 2019
    Assignee: International Business Machines Corporation
    Inventors: Christine Axnix, Franz Hardt, Marco Kraemer, Jakob C. Lang
  • Patent number: 10223127
    Abstract: Securely removing system capabilities, being available to at least one logical partition, from that partition, the partition being hosted by a computer system running an operating system. The system capabilities are available to a boot loader of the computer system, wherein the boot loader is started in the logical partition. The logical partition remains activated while removing the system capabilities. A removal request is initiated by the boot loader; and a deconfigure command is performed by the boot loader.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: March 5, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gerd Bayer, Robert Kieninger, Marco Kraemer, Jakob C. Lang, Angel Nunez Mencias, Stefan Roscher, Stefan Usenbinz
  • Patent number: 10216643
    Abstract: A computer program product for optimizing page table manipulations is provided and includes a computer readable storage medium having program instructions that are readable and executable by a processing circuit to cause the processing circuit to create and maintain a translation table with a translation look-aside buffer (TLB) disposed to cache priority translations, update the translation table upon de-registration of a DMA address, allocate entries in the translation table from low to high memory addresses during memory registration, maintain a cursor for identifying where to search for available entries upon performance of a new registration, advance the cursor from entry-to-entry in the translation table and wrap the cursor from an end of the translation table to a beginning of the translation table and issue a synchronous TLB invalidation instruction to invalidate the TLB upon at least one wrapping and an entry being identified and updated.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: February 26, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Deborah A. Furman, Marco Kraemer, Dale F. Riedy, Anthony T. Sofia
  • Patent number: 10169252
    Abstract: Provided is a method for configuring the functional capabilities of a computer system. The computer system may include a persistent memory and a replaceable functional unit. The method may include transferring, in response to a repair action for the functional unit, enablement data that is stored on the functional unit to the persistent memory. The enablement data may specify one or more functional capabilities of the functional unit that are enabled. The method may further include erasing the enablement data from the functional unit after it has been transferred to the persistent storage. The method may further include obtaining a second unique identification item from a replacement unit. The method may further include obtaining new enablement data. The new enablement data may be transferred to the replacement unit.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Christine Axnix, Franz Hardt, Marco Kraemer, Jakob C. Lang
  • Patent number: 10131866
    Abstract: The present technology relates to novel mycotoxin binder and the use in animal feed. The present disclosure relates also to the use of enzymes for improving the mycotoxin binding ability of by-products derived from a fermentative production process and to compositions comprising enzymes capable of degrading components in the fermented mash in the fermentation process.
    Type: Grant
    Filed: March 20, 2013
    Date of Patent: November 20, 2018
    Assignees: Direvo Industrial Biotechnology GmbH, BASF Enzymes, LLC
    Inventors: Christian Elend, Marco Krämer
  • Publication number: 20180312879
    Abstract: The present technology relates to improved processes of producing fermentation products from starch-containing material using fermenting microorganisms comprising a pentose (i.e., C5 sugar) fermenting yeast cell, suitable for fermentation of a sugar composition comprising C5 sugar(s) in combination with an enzyme composition.
    Type: Application
    Filed: September 6, 2016
    Publication date: November 1, 2018
    Inventors: Marco Kraemer, Vitaly Svetlichny, Eva Eilert
  • Publication number: 20180203804
    Abstract: A method is provided for providing access to a data block in a device of a processing system. The device is connected to a processor of the processing system via an extension bus, and the processing system includes a memory connected to the processor via a memory bus, an operating system and hardware and/or firmware components for controlling access to the device. The method includes adding by the operating system for the data block a first entry in a page table of the processing system. The added entry represents the data block. A memory management unit (MMU) of the processing system may receive a request of the data block. Upon receiving the request, the MMU may instruct one of the hardware or firmware components to provide access to the data block using the added entry.
    Type: Application
    Filed: January 17, 2017
    Publication date: July 19, 2018
    Inventors: Marco KRAEMER, Carsten OTTE, Christoph RAISCH
  • Patent number: 10009423
    Abstract: Aspects include for performing an initialization sequence by a first device to execute synchronous input/output (I/O) commands across a synchronous I/O link. The initialization sequence includes posting, by the first device, a first acknowledgement in response to a register area corresponding to a second device being updated with first information according to a first synchronization sequence, the first information comprising a worldwide node name of the second device and posting, by the first device, a second acknowledgement in response the register area being updated with second information according to a second synchronization sequence, the second information comprising mailbox information. The initialization sequence also includes performing, by the first device, a third synchronization sequence to provide a worldwide node name of the first device; and performing, by the first device, a fourth synchronization sequence to provide a status area address.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: June 26, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David F. Craddock, Beth A. Glendening, Marco Kraemer, Juan J. Ruiz
  • Patent number: 10009424
    Abstract: Aspects include for performing an initialization sequence by a first device to execute synchronous input/output (I/O) commands across a synchronous I/O link. The initialization sequence includes posting, by the first device, a first acknowledgement in response to a register area corresponding to a second device being updated with first information according to a first synchronization sequence, the first information comprising a worldwide node name of the second device and posting, by the first device, a second acknowledgement in response the register area being updated with second information according to a second synchronization sequence, the second information comprising mailbox information. The initialization sequence also includes performing, by the first device, a third synchronization sequence to provide a worldwide node name of the first device; and performing, by the first device, a fourth synchronization sequence to provide a status area address.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: June 26, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David F. Craddock, Beth A. Glendening, Marco Kraemer, Juan J. Ruiz
  • Patent number: 9928000
    Abstract: In an approach for determining a physical address for object access in an object-based storage device (OSD) system, a processor divides a first data object into one or more partitions, including at least a first partition, and providing each partition for storage as individual stored objects in an OSD system. A processor adds a first entry in a page table, the first entry representing the first partition without an indication of a physical address. A memory management unit (MMU) of the OSD system receives a first request of the first partition. Responsive to receiving the first request of the first partition, a MMU identifies that the first entry of the page table represents the first partition. A MMU obtains a physical address of the first partition from one of a hardware component and a firmware component.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: March 27, 2018
    Assignee: International Business Machines Corporation
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch
  • Publication number: 20180018180
    Abstract: Provided is a method for configuring the functional capabilities of a computer system. The computer system may include a persistent memory and a replaceable functional unit. The method may include transferring, in response to a repair action for the functional unit, enablement data that is stored on the functional unit to the persistent memory. The enablement data may specify one or more functional capabilities of the functional unit that are enabled. The method may further include erasing the enablement data from the functional unit after it has been transferred to the persistent storage. The method may further include obtaining a second unique identification item from a replacement unit. The method may further include obtaining new enablement data. The new enablement data may be transferred to the replacement unit.
    Type: Application
    Filed: July 15, 2016
    Publication date: January 18, 2018
    Inventors: Christine Axnix, Franz Hardt, Marco Kraemer, Jakob C. Lang
  • Publication number: 20180018286
    Abstract: Provided is a method for configuring the functional capabilities of a computer system. The computer system may include a persistent memory and a replaceable functional unit. The method may include transferring, in response to a repair action for the functional unit, enablement data that is stored on the functional unit to the persistent memory. The enablement data may specify one or more functional capabilities of the functional unit that are enabled. The method may further include erasing the enablement data from the functional unit after it has been transferred to the persistent storage. The method may further include obtaining a second unique identification item from a replacement unit. The method may further include obtaining new enablement data. The new enablement data may be transferred to the replacement unit.
    Type: Application
    Filed: September 14, 2016
    Publication date: January 18, 2018
    Inventors: Christine Axnix, Franz Hardt, Marco Kraemer, Jakob C. Lang
  • Patent number: 9870322
    Abstract: In an approach for determining a physical address for object access in an object-based storage device (OSD) system, a processor divides a first data object into one or more partitions, including at least a first partition, and providing each partition for storage as individual stored objects in an OSD system. A processor adds a first entry in a page table, the first entry representing the first partition without an indication of a physical address. A memory management unit (MMU) of the OSD system receives a first request of the first partition. Responsive to receiving the first request of the first partition, a MMU identifies that the first entry of the page table represents the first partition. A MMU obtains a physical address of the first partition from one of a hardware component and a firmware component.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: January 16, 2018
    Assignee: International Business Machines Corporation
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch
  • Publication number: 20170249157
    Abstract: Securely removing system capabilities, being available to at least one logical partition, from that partition, the partition being hosted by a computer system running an operating system. The system capabilities are available to a boot loader of the computer system, wherein the boot loader is started in the logical partition. The logical partition remains activated while removing the system capabilities. A removal request is initiated by the boot loader; and a deconfigure command is performed by the boot loader.
    Type: Application
    Filed: September 14, 2016
    Publication date: August 31, 2017
    Inventors: Gerd Bayer, Robert Kieninger, Marco Kraemer, Jakob C. Lang, Angel Nunez Mencias, Stefan Roscher, Stefan Usenbinz
  • Publication number: 20170233768
    Abstract: The present technology relates to methods of reducing the batch time in a fermentation process, wherein the fermentation medium is subjected before, during and/or after the fermentation process to an enzyme composition comprising at least a xylanase and a pectinase.
    Type: Application
    Filed: August 5, 2015
    Publication date: August 17, 2017
    Inventors: Marco Kraemer, Vitaly Svetlitchnyi
  • Publication number: 20170233769
    Abstract: The present technology provide a method of dewatering whole stillage. The addition of a xylanase in combination with a pectinase results in a wet cake with a higher dry mass. The advantage here is less energy consumption while drying.
    Type: Application
    Filed: June 23, 2015
    Publication date: August 17, 2017
    Inventors: Marco Kraemer, Vitaly Svetlitchnyi
  • Patent number: 9734089
    Abstract: A method for accessing data blocks stored in a computer system. The method may include hardware components for controlling access to a memory unit of the computer system. The memory unit includes a page table and an operating system, where each data block of the data blocks is accessed via a virtual address. The method further includes: adding an entry in the page table for each data block of a first set of the data blocks, the page table represents the virtual address; checking that a first entry of the added entries represents a first virtual address, in response to receiving a request of a first data block via the first virtual address by a memory management unit of the computer system; and obtaining a first physical address of the first data block from the hardware components, and the added entry is provided without indication of the first physical address.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: August 15, 2017
    Assignee: International Business Machines Corporation
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch
  • Patent number: 9734088
    Abstract: A method for accessing data blocks stored in a computer system. The method may include hardware components for controlling access to a memory unit of the computer system. The memory unit includes a page table and an operating system, where each data block of the data blocks is accessed via a virtual address. The method further includes: adding an entry in the page table for each data block of a first set of the data blocks, the page table represents the virtual address; checking that a first entry of the added entries represents a first virtual address, in response to receiving a request of a first data block via the first virtual address by a memory management unit of the computer system; and obtaining a first physical address of the first data block from the hardware components, and the added entry is provided without indication of the first physical address.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: August 15, 2017
    Assignee: International Business Machines Corporation
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch