Patents by Inventor Mariko Shimizu

Mariko Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230083263
    Abstract: According to one embodiment, a light detector includes a plurality of elements, a plurality of insulating parts, and an intermediate part. The plurality of elements are arranged along a first direction and a second direction. The first direction and the second direction cross each other. Each of the plurality of elements includes a first semiconductor region and a second semiconductor region. The first semiconductor region is of a first conductivity type. The second semiconductor region is located around the first semiconductor region in a first plane. The first plane is along the first and second directions. The second semiconductor region is of a second conductivity type. The plurality of insulating parts are located respectively around the plurality of elements in the first plane. The intermediate part is located around the plurality of insulating parts in the first plane. The intermediate part includes a semiconductor.
    Type: Application
    Filed: February 28, 2022
    Publication date: March 16, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ikuo FUJIWARA, Mariko SHIMIZU, Honam KWON, Kazuhiro SUZUKI
  • Publication number: 20230063540
    Abstract: According to one embodiment, a light detector includes a first region, a second region, and a lens group. The first region includes a plurality of elements arranged along a first direction and a second direction. The first direction and the second direction cross each other. Each of the elements includes a first semiconductor region of a first conductivity type, and a second semiconductor region located on the first semiconductor region. The second semiconductor region is of a second conductivity type. The second region is adjacent to the first region in the second direction. The second region has a different structure from the first region. The lens group is positioned on the first and second regions. The lens group includes a plurality of lenses located to correspond respectively to the elements. The first region, the second region, and the lens group are repeatedly provided in the second direction.
    Type: Application
    Filed: February 24, 2022
    Publication date: March 2, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Honam KWON, Mariko SHIMIZU, Kazuhiro SUZUKI
  • Publication number: 20220352219
    Abstract: According to one embodiment, a light detector includes a plurality of elements, a plurality of separation parts, a fourth semiconductor region, a fifth semiconductor region, a first interconnect, a first quenching part, and a second interconnect. The elements are located in a cell region and arranged. Each of the elements includes first, second, and third semiconductor regions. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on the second semiconductor region. The separation parts are located respectively around the elements. The fourth semiconductor region is located around each of the separation parts. The fifth semiconductor region is located on the fourth semiconductor region. The first interconnect is electrically connected to the third semiconductor regions. The first quenching part is electrically connected to the first interconnect. The second interconnect is electrically connected to the fifth semiconductor region.
    Type: Application
    Filed: February 24, 2022
    Publication date: November 3, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mariko SHIMIZU, Ikuo FUJIWARA, Keita SASAKI, Kazuaki OKAMOTO, Honam KWON, Kazuhiro SUZUKI
  • Publication number: 20220223631
    Abstract: According to one embodiment, a light detector includes a plurality of elements. Each of the elements includes a first semiconductor region, a second semiconductor region, and a third semiconductor region. The second semiconductor region is located on the first semiconductor region and has a higher first-conductivity-type impurity concentration than the first semiconductor region. The third semiconductor region is located on the second semiconductor region. The elements are arranged at a first period in a second direction crossing a first direction. The first direction is from the first semiconductor region toward the second semiconductor region. A quenching part is electrically connected with the third semiconductor region. Multiple lenses are located respectively on the elements. One of the lenses is positioned on one of the elements. A refracting layer is located between the elements and the lenses. The refracting layer has a first thickness.
    Type: Application
    Filed: August 20, 2021
    Publication date: July 14, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuaki OKAMOTO, Honam KWON, Mariko SHIMIZU, Kazuhiro SUZUKI, Keita SASAKI, Ikuo FUJIWARA
  • Publication number: 20220223749
    Abstract: According to one embodiment, a light detector includes a junction region, a first insulating portion, and a quenching part. The junction region includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type. The second semiconductor region is provided on the first semiconductor region and forms a p-n junction surface with the first semiconductor region. The first insulating portion has an inclined surface inclined with respect to a first direction perpendicular to the p-n junction surface and includes void. The inclined surface is provided at a same height as at least a portion of the junction region and crosses the second direction from the junction region toward the first insulating portion.
    Type: Application
    Filed: August 31, 2021
    Publication date: July 14, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Honam KWON, Mariko SHIMIZU, Kazuaki OKAMOTO, Kazuhiro SUZUKI
  • Publication number: 20220221811
    Abstract: An image forming apparatus includes: a main casing; a photosensitive drum rotatable about an axis extending in a first direction; a developing cartridge; a transfer unit; a solvent cartridge accommodating solvent for dissolving toner; an applicator applying the solvent to the toner on a sheet; and a cover movable between an open position and a closed position. The developing cartridge and the solvent cartridge are detachably attachable to the main casing independently of each other. The developing cartridge and the solvent cartridge are positioned between the applicator and the cover in a second direction crossing the first direction, and the solvent cartridge is positioned closer to the applicator than the developing cartridge is to the applicator in a state where the developing cartridge and the solvent cartridge are attached to the main casing and the cover is at the closed position.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 14, 2022
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Yutaka KAKIGAHARA, Satoshi MURATA, Masataka KAMIYA, Masaaki FURUKAWA, Yasuo FUKAMACHI, Kazutoshi NAKAMURA, Hideshi NISHIYAMA, Keita SHIMIZU, Keita HIRONAKA, Mariko MOGI, Naoya KAMIMURA, Kazuma HINOUE, Kouichi SUGIMOTO, Shinya KUSUDA, Shunji YOSHIMOTO
  • Publication number: 20220059710
    Abstract: According to one embodiment, a light detector includes a first semiconductor layer of a first conductivity type, a first region, a quenching part, a second region, and a first layer. The first region is located on a portion of the first semiconductor layer, includes a first-conductivity-type first semiconductor region that has a higher first-conductivity-type impurity concentration than the first semiconductor layer, and includes a second semiconductor region of a second conductivity type provided on the first semiconductor region. The quenching part is electrically connected to the second semiconductor region. The second region is located on another portion of the first semiconductor layer, includes a second-conductivity-type third semiconductor region, and includes a first-conductivity-type fourth semiconductor region provided on a portion of the third semiconductor region. The first layer is located on the second region and includes a resin that absorbs or reflects light.
    Type: Application
    Filed: February 24, 2021
    Publication date: February 24, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Honam KWON, Kazuhiro Suzuki, Keita Sasaki, Mariko Shimizu
  • Publication number: 20210293967
    Abstract: According to one embodiment, a light detector includes an element, and a structure body. The element includes a first semiconductor region, a second semiconductor region, and a third semiconductor region. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided on the second semiconductor region. The structure body is provided around the element. The structure body includes first and second insulating portions and a metal-including portion. The metal-including portion is provided above the first insulating portion. A position in the first direction of a portion of the metal-including portion is same as a position in the first direction of the third semiconductor region. The second insulating portion is positioned between the metal-including portion and the element in the first plane. A thickness of the first insulating portion is greater than a thickness of the second insulating portion in the first plane.
    Type: Application
    Filed: September 9, 2020
    Publication date: September 23, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ikuo FUJIWARA, Honam KWON, Keita SASAKI, Kazuhiro SUZUKI, Masaki ATSUTA, Mariko SHIMIZU, Kazuaki OKAMOTO
  • Publication number: 20210293937
    Abstract: According to one embodiment, a light detector includes a first semiconductor region of a first conductivity type, a first element, a second element, an insulating body, a first interconnect, and a second interconnect. The second semiconductor region of the first element is provided on the first semiconductor region. The third semiconductor region of the first element is provided on the second semiconductor region. The fourth semiconductor region of the second element is provided on the first semiconductor region, and has an impurity concentration of a first conductivity type less than in the second semiconductor region. The fifth semiconductor region of the second element is provided on the fourth semiconductor region. The insulating body is provided between the first element and the second element. The first interconnect is electrically connected to the third semiconductor region. The second interconnect is electrically connected to the fifth semiconductor region.
    Type: Application
    Filed: September 9, 2020
    Publication date: September 23, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ikuo FUJIWARA, Honam KWON, Keita SASAKI, Kazuhiro SUZUKI, Masaki ATSUTA, Mariko SHIMIZU, Kazuaki OKAMOTO
  • Patent number: 11127895
    Abstract: According to one embodiment, a magnetic memory device includes a first insulating region, a first counter insulating region, a first conductive member, and a first magnetic element. The first conductive member is provided between the first insulating region and the first counter insulating region. The first conductive member extends in a first direction crossing a second direction. The second direction is from the first insulating region toward the first counter insulating region. The first magnetic element is provided between the first insulating region and the first counter insulating region. A third direction from the first conductive member toward the first magnetic element crosses a plane including the first and second directions. A portion of a first insulating side surface of the first insulating region opposes the first conductive member. A portion of a first counter insulating side surface of the first counter insulating region opposes the first conductive member.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: September 21, 2021
    Assignee: KABUSHIKl KAISHA TOSHIBA
    Inventors: Satoshi Shirotori, Yuichi Ohsawa, Hideyuki Sugiyama, Altansargai Buyandalai, Mariko Shimizu, Hiroaki Yoda
  • Patent number: 10811067
    Abstract: According to one embodiment, a magnetic memory device includes a conductive layer, a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer. The conductive layer includes first and second regions, and a third region between the first region and the second region. The second magnetic layer is provided between the third region and the first magnetic layer in a first direction crossing a second direction. The second direction is from the first region toward the second region. The first nonmagnetic layer is provided between the first and second magnetic layers. The second region includes first to third conductive portions. A direction from the first conductive portion toward the second conductive portion is aligned with a third direction. The third direction crosses a plane including the first and second directions. The third conductive portion is between the first and second conductive portions in the third direction.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: October 20, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Altansargai Buyandalai, Satoshi Shirotori, Yuichi Ohsawa, Hideyuki Sugiyama, Mariko Shimizu, Hiroaki Yoda, Katsuhiko Koui
  • Patent number: 10797229
    Abstract: According to one embodiment, a magnetic memory device includes a conductive layer, first to fourth magnetic layers, first and second intermediate layers, and a controller. The conductive layer includes first, to fifth portions. The first magnetic layer is separated from the third portion. The second magnetic layer is provided between the third portion and the first magnetic layer. The first intermediate layer is provided between the first and second magnetic layers. The third magnetic layer is separated from the fourth portion. The fourth magnetic layer is provided between the fourth portion and the third magnetic layer. The second intermediate layer is provided between the third and fourth magnetic layers. The controller is electrically connected to the first and second portions. The controller implements a first operation of supplying a first current to the conductive layer, and a second operation of supplying a second current to the conductive layer.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: October 6, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Altansargai Buyandalai, Satoshi Shirotori, Yuichi Ohsawa, Hideyuki Sugiyama, Mariko Shimizu, Hiroaki Yoda, Tomoaki Inokuchi
  • Publication number: 20200161536
    Abstract: According to one embodiment, a magnetic memory device includes a first insulating region, a first counter insulating region, a first conductive member, and a first magnetic element. The first conductive member is provided between the first insulating region and the first counter insulating region. The first conductive member extends in a first direction crossing a second direction. The second direction is from the first insulating region toward the first counter insulating region. The first magnetic element is provided between the first insulating region and the first counter insulating region. A third direction from the first conductive member toward the first magnetic element crosses a plane including the first and second directions. A portion of a first insulating side surface of the first insulating region opposes the first conductive member. A portion of a first counter insulating side surface of the first counter insulating region opposes the first conductive member.
    Type: Application
    Filed: November 15, 2019
    Publication date: May 21, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi SHIROTORI, Yuichi OHSAWA, Hideyuki SUGIYAMA, Altansargai BUYANDALAI, Mariko SHIMIZU, Hiroaki YODA
  • Patent number: 10580472
    Abstract: According to one embodiment, a magnetic memory device includes a conductive layer, a first magnetic layer, a second magnetic layer, a first nonmagnetic layer, and a controller. The conductive layer includes a first portion, a second portion, and a third portion. The first magnetic layer is separated from the third portion. The first nonmagnetic layer is provided between the first magnetic layer and the second magnetic layer that is electrically connected with the third portion. The first nonmagnetic layer is curved. The controller is electrically connected to the first portion and the second portion. The controller implements a first operation and a second operation. The controller in the first operation supplies a first current to the conductive layer from the first portion toward the second portion. The controller in the second operation supplies a second current to the conductive layer from the second portion toward the first portion.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: March 3, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuichi Ohsawa, Hiroaki Yoda, Altansargai Buyandalai, Satoshi Shirotori, Mariko Shimizu, Hideyuki Sugiyama, Yushi Kato
  • Patent number: 10529399
    Abstract: According to one embodiment, a magnetic memory device includes a conductive layer, a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer. The conductive layer includes a first region, a second region, and a third region between the first region and the second region. The second magnetic layer is provided between the third region and the first magnetic layer in a first direction crossing a second direction. The second direction is from the first region toward the second region. The first nonmagnetic layer is provided between the first magnetic layer and the second magnetic layer. The third region includes first and second end portions. The first end portion includes a first protrusion. The second end portion includes a second protrusion. A first position along the second direction of the first protrusion is different from a second position along the second direction of the second protrusion.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: January 7, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuichi Ohsawa, Mariko Shimizu, Satoshi Shirotori, Hideyuki Sugiyama, Altansargai Buyandalai, Hiroaki Yoda, Katsuhiko Koui, Tomoaki Inokuchi, Naoharu Shimomura
  • Patent number: 10510949
    Abstract: According to one embodiment, a magnetic memory device includes a metal-containing layer, a first magnetic layer, a second magnetic layer, a first intermediate layer, a third magnetic layer, a fourth magnetic layer, a second intermediate layer, and a controller. The metal-containing layer includes first, second, third, fourth, and fifth portions. The first magnetic layer is separated from the third portion. The second magnetic layer is provided between the first magnetic layer and a portion of the third portion. The first intermediate layer includes a portion provided between the first and second magnetic layers. The third magnetic layer is separated from the fourth portion. The fourth magnetic layer is provided between the third magnetic layer and a portion of the fourth portion. The second intermediate layer includes a portion provided between the third and fourth magnetic layers. The controller is electrically connected with the first portion and the second portion.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: December 17, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mariko Shimizu, Yuichi Ohsawa, Hiroaki Yoda, Hideyuki Sugiyama, Satoshi Shirotori, Altansargai Buyandalai
  • Patent number: 10504574
    Abstract: According to one embodiment, a magnetic memory device includes a metal-containing layer including a metallic element, a first magnetic layer, a second magnetic layer, and a first intermediate layer. The second magnetic layer is provided between the first magnetic layer and a portion of the metal-containing layer. The first intermediate layer includes a portion provided between the first magnetic layer and the second magnetic layer. The first intermediate layer is nonmagnetic. The first intermediate layer is convex toward the metal-containing layer.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: December 10, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Shirotori, Hiroaki Yoda, Yuichi Ohsawa, Hideyuki Sugiyama, Mariko Shimizu, Altansargai Buyandalai, Naoharu Shimomura
  • Patent number: 10490730
    Abstract: According to one embodiment, a magnetic memory device includes a conductive layer, first and second magnetic layers, a first nonmagnetic layer and a controller. The conductive layer includes first and second portions, and a third portion between the first and second portions. The first magnetic layer is separated from the third portion in a first direction crossing a second direction being from the first portion toward the second portion. The second magnetic layer is provided between the first magnetic layer and at least a portion of the third portion. The first nonmagnetic layer includes first and second regions. The first region is provided between the first and second magnetic layers. The second region is continuous with the first region. The second region overlaps at least a portion of the second magnetic layer in the second direction. The controller is electrically connected to the first and second portions.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: November 26, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mariko Shimizu, Yuichi Ohsawa, Hideyuki Sugiyama, Satoshi Shirotori, Altansargai Buyandalai, Hiroaki Yoda
  • Patent number: 10483459
    Abstract: A magnetic memory according to an embodiment includes: a first conductive layer including a first to third regions arranged along a first direction, the second region being disposed between the first region and the third region; a second conductive layer including a fourth to sixth regions arranged along the first direction, the fifth region being disposed between the fourth and sixth regions; a third conductive layer electrically connected to the third and fourth regions; a first magnetoresistance device disposed to correspond to the second region, including a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer; a second magnetoresistance device to correspond to the fifth region, including a third magnetic layer, a fourth magnetic layer, and a second nonmagnetic layer, a direction from the first region to the third region differing from a direction from the fourth region to the sixth region.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: November 19, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hideyuki Sugiyama, Yuichi Ohsawa, Satoshi Shirotori, Mariko Shimizu, Altansargai Buyandalai, Hiroaki Yoda
  • Patent number: 10438616
    Abstract: According to one embodiment, a magnetic recording head includes a magnetic pole, a stacked body, and a first non-magnetic layer. The stacked body includes a first magnetic layer, a second magnetic layer provided between the first magnetic layer and the magnetic pole, and a non-magnetic intermediate layer provided between the first magnetic layer and the second magnetic layer. The first non-magnetic layer is provided between the second magnetic layer and the magnetic pole, and contacts the magnetic pole and the second magnetic layer. The first magnetic layer has a first thickness and a first saturation magnetic flux density. The second magnetic layer has a second thickness and a second saturation magnetic flux density. A second product of the second thickness and the second saturation magnetic flux density is larger than a first product of the first thickness and the first saturation magnetic flux density.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: October 8, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichiro Yamada, Shuichi Murakami, Naoyuki Narita, Katsuhiko Koui, Akihiko Takeo, Mariko Shimizu, Hitoshi Iwasaki