Patents by Inventor Mariko Suzuki

Mariko Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240094349
    Abstract: A light detector according to one embodiment, includes a substrate. The substrate includes a first semiconductor layer, an insulating layer, and a second semiconductor layer. The insulating layer is located on the first semiconductor layer. The second semiconductor layer is located on the insulating layer. The second semiconductor layer includes a photoelectric conversion part. The photoelectric conversion part includes a first semiconductor region and a second semiconductor region. The substrate includes a void and a trench. The void is positioned below the photoelectric conversion part and between the first semiconductor layer and the second semiconductor layer. The trench surrounds the photoelectric conversion part. A lower end of the trench is positioned in the second semiconductor layer. The photoelectric conversion part is electrically connected with an upper surface side of the substrate via a portion below the trench.
    Type: Application
    Filed: February 15, 2023
    Publication date: March 21, 2024
    Inventors: Keita SASAKI, Mariko SHIMIZU, Kazuhiro SUZUKI
  • Publication number: 20240072191
    Abstract: A light detector includes a semiconductor layer and a light-receiving element. The semiconductor layer is of a first conductivity type. The light-receiving element includes a first semiconductor region, a second semiconductor region, a third semiconductor region, and a fourth semiconductor region. The first semiconductor region is of a second conductivity type. The second semiconductor region is located between the first semiconductor region and the semiconductor layer. The second semiconductor region is of the first conductivity type and contacts the first semiconductor region. The third semiconductor region is located between the second semiconductor region and the semiconductor layer. The third semiconductor region is of the second conductivity type. The fourth semiconductor region is located between the third semiconductor region and the semiconductor layer.
    Type: Application
    Filed: February 24, 2023
    Publication date: February 29, 2024
    Inventors: Mariko SHIMIZU, Kazuhiro SUZUKI, Ikuo FUJIWARA, Ryoma KANEKO, Keita SASAKI
  • Patent number: 10181515
    Abstract: Provided is a semiconductor device according to an embodiment including an i-type or first-conductivity-type first diamond semiconductor layer having a first side surface, a second-conductivity-type second diamond semiconductor layer provided on the first diamond semiconductor layer and having a second side surface, a third diamond semiconductor layer being in contact with the first side surface and the second side surface, the third diamond semiconductor containing nitrogen, a first electrode electrically connected to the first diamond semiconductor layer, and a second electrode electrically connected to the second diamond semiconductor layer.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: January 15, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mariko Suzuki, Tadashi Sakai
  • Patent number: 10170561
    Abstract: In one embodiment, a diamond semiconductor device includes a first diamond semiconductor layer of a first conductivity type which has a main surface, a second diamond semiconductor layer of an i-type or a second conductivity type which is provided on the main surface of the first diamond semiconductor layer, and has a first side surface with a plane orientation of a {111} plane, a third diamond semiconductor layer of the first conductivity type which is provided on the first side surface, and a fourth diamond semiconductor layer of the second conductivity type which is provided on the main surface of the first diamond semiconductor layer and on a side surface of the second diamond semiconductor layer at a side opposite to a side of the third diamond semiconductor layer.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: January 1, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mariko Suzuki, Tadashi Sakai
  • Patent number: 10079282
    Abstract: A semiconductor device according to an embodiment includes an i-type or a p-type first diamond semiconductor layer, an n-type second diamond semiconductor layer provided on the first diamond semiconductor layer, a mesa structure and an n-type first diamond semiconductor region provided on the side surface. The mesa structure includes the first diamond semiconductor layer, the second diamond semiconductor layer, a top surface with a plane orientation of ±10 degrees or less from a {100} plane, and a side surface inclined by 20 to 90 degrees with respect to a direction of <011>±20 degrees from the {100} plane. The first diamond semiconductor region is in contact with the second diamond semiconductor layer and has an n-type impurity concentration lower than an n-type impurity concentration of the second diamond semiconductor layer.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: September 18, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mariko Suzuki, Tadashi Sakai, Chiharu Ota, Kazuto Takao, Takashi Shinohe
  • Publication number: 20170345899
    Abstract: Provided is a semiconductor device according to an embodiment including an i-type or first-conductivity-type first diamond semiconductor layer having a first side surface, a second-conductivity-type second diamond semiconductor layer provided on the first diamond semiconductor layer and having a second side surface, a third diamond semiconductor layer being in contact with the first side surface and the second side surface, the third diamond semiconductor containing nitrogen, a first electrode electrically connected to the first diamond semiconductor layer, and a second electrode electrically connected to the second diamond semiconductor layer.
    Type: Application
    Filed: February 17, 2017
    Publication date: November 30, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mariko SUZUKI, Tadashi SAKAI
  • Patent number: 9786881
    Abstract: A battery pack comprises a battery unit containing a plurality of batteries connected in series or in parallel; a lower frame housing a portion of a side of a bottom of the battery unit and mounted on an shelf plate top surface; a upper frame housing a portion on the side of a top surface of the battery unit as a surface opposed to the bottom and holding the battery unit by being connected to the lower frame; and a bracket mounted on the lower frame and fixed to the shelf plate top surface.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: October 10, 2017
    Assignee: YAZAKI ENERGY SYSTEM CORPORATION
    Inventors: Kazutoshi Tazawa, Mariko Suzuki
  • Patent number: 9564491
    Abstract: According to one embodiment, a semiconductor device includes an n-type semiconductor layer, a first electrode, and a nitride semiconductor layer. The n-type semiconductor layer includes diamond. The nitride semiconductor layer is provided between the n-type semiconductor layer and the first electrode. The nitride semiconductor layer includes AlxGa1?xN (0?x?1) and is of n-type.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: February 7, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mariko Suzuki, Tadashi Sakai
  • Patent number: 9379060
    Abstract: A graphene wiring has a substrate, a catalyst layer on the substrate, a graphene layer on the catalyst layer, and a dopant layer on a side surface of the graphene layer. An atomic or molecular species is intercalated in the graphene layer or disposed on the graphene layer.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: June 28, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisao Miyazaki, Tadashi Sakai, Masayuki Katagiri, Yuichi Yamazaki, Naoshi Sakuma, Mariko Suzuki
  • Publication number: 20160172449
    Abstract: According to one embodiment, a semiconductor device includes an n-type semiconductor layer, a first electrode, and a nitride semiconductor layer. The n-type semiconductor layer includes diamond. The nitride semiconductor layer is provided between the n-type semiconductor layer and the first electrode. The nitride semiconductor layer includes AlxGa1-xN (0?x?1) and is of n-type.
    Type: Application
    Filed: December 9, 2015
    Publication date: June 16, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mariko SUZUKI, Tadashi SAKAI
  • Patent number: 9355900
    Abstract: A semiconductor device of an embodiment includes: a substrate on which a semiconductor circuit is formed; an interlayer insulating film in which a contact hole is formed on the substrate; a catalyst metal film on a side wall of the contact hole; catalyst metal particles on a bottom of the contact hole; graphene on the catalyst metal film; and carbon nanotubes, which penetrates the contact hole, on the catalyst metal particles.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: May 31, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Katagiri, Yuichi Yamazaki, Tadashi Sakai, Naoshi Sakuma, Mariko Suzuki
  • Patent number: 9349800
    Abstract: A semiconductor device according to an embodiment includes: a first diamond semiconductor layer of a first conductivity type including a main surface having a first plane orientation; a trench structure formed in the first diamond semiconductor layer; a second diamond semiconductor layer formed on the first diamond semiconductor layer in the trench structure and having a lower dopant concentration than the first diamond semiconductor layer; a third diamond semiconductor layer of a second conductivity type formed on the second diamond semiconductor layer and having a higher dopant concentration than the second diamond semiconductor layer; a first electrode electrically connected to the first diamond semiconductor layer; and a second electrode electrically connected to the third diamond semiconductor layer.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: May 24, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mariko Suzuki, Tadashi Sakai, Naoshi Sakuma, Masayuki Katagiri, Yuichi Yamazaki
  • Patent number: 9331150
    Abstract: A semiconductor device of an embodiment includes a p-type first diamond semiconductor layer, a p-type second diamond semiconductor layer disposed on the first diamond semiconductor layer, a plurality of n-type third diamond semiconductor layers disposed on the second diamond semiconductor layer, and a first electrode disposed on the second diamond semiconductor and the third diamond semiconductor layers. The p-type second diamond semiconductor layer has a p-type impurity concentration lower than a p-type impurity concentration of the first diamond semiconductor layer and has oxygen-terminated surfaces. Each of the third diamond semiconductor layers has an oxygen-terminated surface. The first electrode forms first junctions between the first electrode and the second diamond semiconductor. The first electrode forms second junctions between the first electrode and the third diamond semiconductor layers. The first junctions and the second junctions are Schottky junctions.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: May 3, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mariko Suzuki, Tadashi Sakai
  • Patent number: 9313634
    Abstract: An information processing device includes a collecting unit which collects user's biological information. The information processing device includes a determining unit which determines an emotion of the user by using the biological information collected by the collecting unit. The information processing device includes an output unit which outputs in association with information representing the user and the emotion of the user determined by the determining unit to terminal devices which are used by other users.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: April 12, 2016
    Assignee: YAHOO JAPAN CORPORATION
    Inventors: Mariko Suzuki, Hiroko Ota, Chiemi Taki, Yuki Uchida, Hiroshi Machida
  • Patent number: 9235263
    Abstract: An information processing device includes a collecting unit that collects biological information of a first user and a second user. The information processing device includes a specifying unit that specifies an emotion of the first user toward the second user and an emotion of the second user toward the first user using the biological information acquired by the collecting unit. The information processing device includes a determining unit that determines whether or not to provide information on the second user to the first user based on respective emotions specified by the specifying unit.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: January 12, 2016
    Assignee: YAHOO JAPAN CORPORATION
    Inventors: Mariko Suzuki, Ayaka Hirano, Chika Watanabe, Yuichi Kitajima, Hiroki Sasakido
  • Publication number: 20150349060
    Abstract: A semiconductor device according to an embodiment includes: a first diamond semiconductor layer of a first conductivity type including a main surface having a first plane orientation; a trench structure formed in the first diamond semiconductor layer; a second diamond semiconductor layer formed on the first diamond semiconductor layer in the trench structure and having a lower dopant concentration than the first diamond semiconductor layer; a third diamond semiconductor layer of a second conductivity type formed on the second diamond semiconductor layer and having a higher dopant concentration than the second diamond semiconductor layer; a first electrode electrically connected to the first diamond semiconductor layer; and a second electrode electrically connected to the third diamond semiconductor layer.
    Type: Application
    Filed: August 13, 2015
    Publication date: December 3, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mariko SUZUKI, Tadashi SAKAI, Naoshi SAKUMA, Masayuki KATAGIRI, Yuichi YAMAZAKI
  • Publication number: 20150325476
    Abstract: A semiconductor device of an embodiment includes: a substrate on which a semiconductor circuit is formed; an interlayer insulating film in which a contact hole is formed on the substrate; a catalyst metal film on a side wall of the contact hole; catalyst metal particles on a bottom of the contact hole; graphene on the catalyst metal film; and carbon nanotubes, which penetrates the contact hole, on the catalyst metal particles.
    Type: Application
    Filed: July 20, 2015
    Publication date: November 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masayuki KATAGIRI, Yuichi YAMAZAKI, Tadashi SAKAI, Naoshi SAKUMA, Mariko SUZUKI
  • Publication number: 20150303421
    Abstract: A battery pack comprises a battery unit containing a plurality of batteries connected in series or in parallel; a lower frame housing a portion of a side of a bottom of the battery unit and mounted on an shelf plate top surface; a upper frame housing a portion on the side of a top surface of the battery unit as a surface opposed to the bottom and holding the battery unit by being connected to the lower frame; and a bracket mounted on the lower frame and fixed to the shelf plate top surface.
    Type: Application
    Filed: April 15, 2015
    Publication date: October 22, 2015
    Applicant: YAZAKI ENERGY SYSTEM CORPORATION
    Inventors: Kazutoshi TAZAWA, Mariko SUZUKI
  • Patent number: 9142618
    Abstract: A semiconductor device according to an embodiment includes: a first diamond semiconductor layer of a first conductivity type including a main surface having a first plane orientation; a trench structure formed in the first diamond semiconductor layer; a second diamond semiconductor layer formed on the first diamond semiconductor layer in the trench structure and having a lower dopant concentration than the first diamond semiconductor layer; a third diamond semiconductor layer of a second conductivity type formed on the second diamond semiconductor layer and having a higher dopant concentration than the second diamond semiconductor layer; a first electrode electrically connected to the first diamond semiconductor layer; and a second electrode electrically connected to the third diamond semiconductor layer.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: September 22, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mariko Suzuki, Tadashi Sakai, Naoshi Sakuma, Masayuki Katagiri, Yuichi Yamazaki
  • Patent number: 9123720
    Abstract: A semiconductor device of an embodiment includes: a substrate on which a semiconductor circuit is formed; an interlayer insulating film in which a contact hole is formed on the substrate; a catalyst metal film on a side wall of the contact hole; catalyst metal particles on a bottom of the contact hole; graphene on the catalyst metal film; and carbon nanotubes, which penetrates the contact hole, on the catalyst metal particles.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: September 1, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Katagiri, Yuichi Yamazaki, Tadashi Sakai, Naoshi Sakuma, Mariko Suzuki