Abstract: A temperature sensor is fabricated in an integrated circuit in combination with another device such as a microprocessor using a fabrication technology that is suitable for fabricating the device. Operation of the temperature sensor is based on the bandgap physics of semiconductors using a bandgap reference circuit and an amplifier that generate two measurement voltages, a voltage that is temperature-dependent and a voltage that is temperature-independent. The temperature sensor includes a bandgap power supply circuit that supplies a power supply voltage that is very stable to drive the temperature sensor so that the temperature sensor generates an output signal that is essentially independent of the power supply voltage.

Abstract: Delay-locked loop circuitry for generating a predetermined phase relationship between a pair of clocks. A first delay-locked loop includes a set of delay-producing elements arranged in a chain, the chain receiving an input clock and generating, from each delay element, a set of phase vectors, each shifted a unit delay from the adjacent vector. The first delay-locked loop adjusts the unit delays in the delay chain using a delay adjustment signal so that the phase vectors span a predetermined phase shift of the input clock. A second delay-locked loop selects, from the first delay-locked loop, a pair of phase vectors which brackets the phase of an input clock. A phase interpolator receives the selected pair of vectors and generates an output clock and a delayed output clock, the amount of the delay being controlled by the delay adjustment signal of the first delay-locked loop circuitry.

Abstract: A pulse generating circuit that includes an unbalanced latch and a feedback circuit. The unbalanced latch is configured to generate a latch signal having a predetermined state in response to application of power to the circuit. The feedback circuit is coupled in a negative feedback arrangement with the unbalanced latch and generates a pulse signal for a predetermined period of time in response to the latch signal.

Abstract: An electronic system such as a processor or computer system includes a phase-locked loop (PLL) having a PLL parameter modification circuit. In one embodiment, the PLL parameter modification circuit may be programmed to provide one of several current control signals to a charge pump. Additionally, the PLL parameter modification circuit may be programmed to alter a loop filter transfer function by selectively changing resistance and/or capacitance values of the loop filter. Each current control signal modifies the charge pump output control voltage to a VCO differently, and, thus, modifying the current control signals to the charge pump effectively modifies the bandwidth of the PLL. In one embodiment, the PLL parameter modification circuit modifies current control signals to the charge pump by selectively inserting and removing, in accordance with programmable register bit(s) states, diode configured transistors in a current mirror configuration. Thus, a ratio of the output current of the current mirror i.e.

Abstract: A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus masking steps needed for contacts. Maximum use of self alignment techniques minimizes photolithographic limitations. In one embodiment the peripheral circuits are formed in a silicon substrate and an N level array is fabricated above the substrate.

Abstract: A temperature sensor includes a bandgap reference circuit for providing a temperature-independent reference voltage, a biasing circuit that mirrors a current in the bandgap reference circuit for providing a temperature-dependent biasing voltage, and an amplifier responsive to the reference voltage and the biasing voltage for providing a temperature-dependent output voltage. Preferably, the temperature sensor is integral with a microprocessor and implemented in CMOS technology. The temperature sensor can be used, for instance, to reduce the clock speed of the microprocessor when the microprocessor temperature exceeds a predetermined temperature, or to store temperature-indicating data in non-volatile memory of the microprocessor to provide a thermal history of the microprocessor.

Abstract: A delay locked loop (DLL) is described in which a phase detector compares the phase of the output of the DLL with that of a reference input. The output of the phase comparator drives a differential charge pump which functions to integrate the phase comparator output signal over time. The charge pump output controls a phase shifter with unlimited range that adjusts the phase of the DLL output so that the output of the phase comparator is high 50% of the time on average. Because the DLL adjusts the phase shifter until the output of the phase detector is high 50% of the time, on average, the relationship of the DLL output clock to the input reference clock depends only on the type of phase detector used.

Abstract: A comparator circuit comprising a transconductance stage that senses a first and a second input voltage and a transresistance stage that senses the current output of the transconductance stage while limiting a voltage swing at the output of the transconductance stage. The transresistance stage generates an output voltage at an output node that indicates whether the first or the second input voltage has a greater magnitude.

Abstract: A differential circuit is provided that generates a differential output voltage .DELTA.V that does not vary when the power supply voltage changes and/or when the field effect transistor conductance changes. The bias circuit connected to the differential amplifier stabilizes the output voltage swing .DELTA.V to be insensitive to change in supply voltage and/or transconductance. A feedback loop is provided to drive the voltage to a predetermined voltage dependent upon the threshold voltage of the transistors used (e.g., the threshold voltage of a PMOS transistor). The voltage stabilizes the current source of the differential amplifier via a current mirror coupled to the feedback loop. Therefore, the resultant differential output voltage .DELTA.V is equal to the transistor threshold voltage. As the transistor threshold voltage is independent of the power supply voltage and device transconductance, the differential amplifier output .DELTA.

Abstract: A fused decoder for selecting one or more elements of an array, such as a row of memory, is provided. The corresponding row of memory can be permanently deselected by blowing the fuse of the decoder. Array components such as a redundant row of memory, can be substituted for the deselected component. The decoder includes a gate formed exclusively from NMOS transistors so that the decoder can provide a select signal in response to an address without an PMOS transistor responding to the address- By eliminating PMOS transistors from the gate portion of the decoder, the load presented to the address lines is reduced.

Abstract: A system for synchronizing the operation of a CPU and coprocessor operating from a common clock signal includes a first voltage controlled delay line connected to receive the clock signal and delay it by a fixed time interval before supplying it to one of the CPU or coprocessor. A second voltage controlled delay line is connected to receive the clock signal and delay it by an adjustable time interval before supplying it to the other of the CPU or coprocessor. The time interval of the second delay line is determined by the potential of a control signal generated from a phase locked loop circuit coupled to the output terminals of the CPU and coprocessor.

Abstract: A decoder circuit for disabling a defective element in a circuit having redundant replacement elements employs a fuse on a signal path through the decoder circuit from a selection device to a low-impedance output device and a weak default circuit, such as a pull-up transistor, for forcing the state of the output circuit to a low-impedance default state when the fuse is blown.

Abstract: A circuit for precharging the gates of pass transistor that will be subsequently bootstrapped employs a precharge circuit that generates a precharge pulse having magnitude greater than Vcc and distributes the pulse to a number of gate control circuits that raise the pass transistor gate voltages from a quiescent voltage level of Vcc-Vt to Vcc at a time before the bootstrapping signals arrive at the pass transistor.

Abstract: A MOSFET sense amplifier applies both input signals to both input transistors of a common-gate sense amplifier; each input signal being applied to the source of one input transistor and the gate of the other, thereby effectively doubling the applied input signal.