Patents by Inventor Mark H. Somervell

Mark H. Somervell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160300756
    Abstract: A method for partially filling an open feature on a substrate includes receiving a substrate having a layer with at least one open feature formed therein, wherein the open feature penetrates into the layer from an upper surface and includes sidewalls extending to a bottom of the open feature. The open feature is overfilled with an organic coating that covers the upper surface of the layer and extends to the bottom of the open feature. The method further includes removing a portion of the organic coating to expose the upper surface of the layer and recessing the organic coating to a pre-determined depth from the upper surface to create an organic coating plug of pre-determined thickness at the bottom of the open feature, and converting the chemical composition of the organic coating plug to create an inorganic plug.
    Type: Application
    Filed: April 12, 2016
    Publication date: October 13, 2016
    Inventors: Mark H. Somervell, Benjamen M. Rathsack
  • Publication number: 20160300711
    Abstract: A method for treating a microelectronic substrate to form a chemical template includes patterning the substrate to form a trench structure with a plurality of trenches of a defined trench width and depositing a photoactive material on the substrate to overfill the trench structure to form a fill portion in the plurality of trenches and an overfill portion above the trench structure. The method further includes exposing the photoactive material to electromagnetic radiation comprising a wavelength that is at least four times greater than the defined trench width such that the overfill portion is modified by the exposure while the electromagnetic radiation fails to penetrate into the plurality of trenches leaving the fill portion unmodified and removing the modified overfill portion of the photoactive material to form a planarized filled trench structure for use as a chemical template for selective reactive ion etching, selective deposition, or directed self-assembly.
    Type: Application
    Filed: April 7, 2016
    Publication date: October 13, 2016
    Inventors: Benjamen M. Rathsack, Mark H. Somervell
  • Patent number: 9454081
    Abstract: Disclosed is a method and apparatus for mitigation of photoresist line pattern collapse in a photolithography process by applying a gap-fill material treatment after the post-development line pattern rinse step. The gap-fill material dries into a solid layer filling the inter-line spaces of the line pattern, thereby preventing line pattern collapse due to capillary forces during the post-rinse line pattern drying step. Once dried, the gap-fill material is depolymerized, volatilized, and removed from the line pattern by heating, illumination with ultraviolet light, by application of a catalyst chemistry, or by plasma etching.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: September 27, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Mark H Somervell, Benjamen M Rathsack, Ian J Brown, Steven Scheer, Joshua S Hooge
  • Publication number: 20160268132
    Abstract: A method is provided for forming a patterned topography on a substrate. The substrate is provided with features formed atop that constitute an existing topography, and a template for directed self-assembly (DSA) surrounds the exposed topography. Further to the method, the template is filled with a block copolymer (BCP) to cover the exposed topography, and then the BCP is annealed within the template to drive self-assembly in alignment with the topography. Developing the annealed BCP exposes a DSA pattern immediately overlying the topography.
    Type: Application
    Filed: May 23, 2016
    Publication date: September 15, 2016
    Inventors: Benjamen M. Rathsack, Mark H. Somervell
  • Patent number: 9418860
    Abstract: A method is provided for forming a patterned topography on a substrate. The substrate is provided with features formed atop that constitute an existing topography, and a template for directed self-assembly (DSA) is formed surrounding the exposed topography. Further to the method, the exposed template surfaces are chemically treated. In one embodiment, the surfaces are treated with a hydrogen-containing reducing chemistry to alter the surfaces to a less oxidized state. In another embodiment, the surfaces are coated with a first phase of a block copolymer (BCP) to render the surfaces more attractive to the first phase than prior to the coating. The template is then filled with the BCP to cover the exposed topography, and then the BCP is annealed within the template to drive self-assembly in alignment with the topography. Developing the annealed BCP exposes a DSA pattern immediately overlying the topography.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: August 16, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Mark H. Somervell, Makoto Muramatsu, Benjamen M. Rathsack, Tadatoshi Tomita, Hisashi Genjima, Hidetami Yaegashi, Kenichi Oyama
  • Patent number: 9412611
    Abstract: A method for forming a patterned topography on a substrate is provided. The substrate is initially provided with an exposed plurality of lines formed atop. An embodiment of the method includes aligning and preparing a first directed self-assembly pattern (DSA) pattern immediately overlying the plurality of lines, and transferring the first DSA pattern to form a first set of cuts in the plurality of lines. The embodiment further includes aligning and preparing a second DSA pattern immediately overlying the plurality of lines having the first set of cuts formed therein, and transferring the second DSA pattern to form a second set of cuts in the plurality of lines. The first and second DSA patterns each comprise a block copolymer having a hexagonal close-packed (HCP) morphology and a characteristic dimension Lo that is between 0.9 and 1.1 times the spacing between individual lines of the plurality of lines.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: August 9, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Mark H. Somervell, Benjamen M. Rathsack
  • Patent number: 9349604
    Abstract: A method is provided for forming a patterned topography on a substrate. The substrate is provided with features formed atop that constitute an existing topography, and a template for directed self-assembly (DSA) surrounds the exposed topography. Further to the method, the template is filled with a block copolymer (BCP) to cover the exposed topography, and then the BCP is annealed within the template to drive self-assembly in alignment with the topography. Developing the annealed BCP exposes a DSA pattern immediately overlying the topography.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: May 24, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Benjamen M. Rathsack, Mark H. Somervell
  • Publication number: 20160013052
    Abstract: A method of patterning a layered substrate is provided that includes forming a layer of a block copolymer on a substrate, annealing the layer of the block copolymer to affect microphase segregation such that self-assembled domains are formed, and annealing the layer of the block copolymer a second time to refine or modify the microphase segregation, where one of the annealing steps uses an absorption based heating method.
    Type: Application
    Filed: September 18, 2015
    Publication date: January 14, 2016
    Inventors: Michael A. Carcasi, Mark H. Somervell, Benjamen M. Rathsack
  • Patent number: 9147574
    Abstract: A method is provided for patterning a layered substrate that includes loading a substrate into a coater-developer processing system; coating the substrate with a photoresist material layer; patterning the photoresist material layer to form a photoresist pattern; transferring the substrate to a deposition processing system; and depositing a neutral layer over the photoresist pattern and exposed portions of the substrate. The neutral layer can deposited using a gas cluster ion beam (GCIB) process, or an atomic layer deposition (ALD) process, which has minimal topography. The method may further include lifting off a portion of the neutral layer deposited over the photoresist pattern to expose a neutral layer template for subsequent directed self-assembly (DSA) patterning; depositing a DSA material layer over the neutral layer template; baking the DSA material layer to form a DSA pattern; and developing the DSA material layer to expose the final DSA pattern for subsequent feature etching.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: September 29, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Mark H. Somervell, Benjamen M. Rathsack
  • Publication number: 20150241793
    Abstract: Methods for measuring photosensitizer concentrations in a photo-sensitized chemically-amplified resist (PS-CAR) patterning process are described. Measured photosensitizer concentrations can be used in feedback and feedforward control of the patterning process and subsequent processing steps. Also described is a metrology target formed using PS-CAR resist, and a substrate including a plurality of such metrology targets to facilitate patterning process control.
    Type: Application
    Filed: February 23, 2015
    Publication date: August 27, 2015
    Inventors: Michael A. CARCASI, Mark H. SOMERVELL, Joshua S. HOOGE, Benjamen M. RATHSACK, Seiji NAGAHARA
  • Publication number: 20150241781
    Abstract: A method for mitigating shot noise in extreme ultraviolet (EUV) lithography and patterning of photo-sensitized chemically-amplified resist (PS-CAR) is described. The method includes a first EUV patterned exposure to generate a photosensitizer and a second flood exposure at a wavelength different than the wavelength of the first EUV patterned exposure, to generate acid in regions exposed during the first EUV patterned exposure, wherein the photosensitizer acts to amplify acid generation and improve contrast. The resist may be exposed to heat, liquid solvent, solvent atmosphere, or a vacuum to mitigate the effects of EUV shot noise on photosensitizer concentration which may accrue during the first EUV patterned exposure.
    Type: Application
    Filed: February 23, 2015
    Publication date: August 27, 2015
    Inventors: Michael A. CARCASI, Mark H. SOMERVELL
  • Publication number: 20150241782
    Abstract: The disclosure herein describes methods for Photosensitized Chemically Amplified Resist Chemicals (PS-CAR) to pattern light sensitive films (e.g., photoresist on anti-reflective coatings) on a semiconductor substrate. In one embodiment, a two-step exposure process may generate higher acid concentration regions within a photoresist layer. The PS-CAR chemicals may include photoacid generators (PAGs) and photosensitizer elements that enhance the decomposition of the PAGs into acid. The first exposure may be a patterned EUV or UV exposure that generates an initial amount of acid and photosensitizer. The second exposure may be a non-EUV flood exposure that excites the photosensitizer which increases the acid generation rate where the photosensitizer is located in the film stack. The distribution of energy during the exposures may be optimized by using certain characteristics (e.g., thickness, index of refraction, doping) of the photoresist layer, an underlying layer, and/or an overlying layer.
    Type: Application
    Filed: February 24, 2015
    Publication date: August 27, 2015
    Inventors: Steven SCHEER, Michael A. CARCASI, Benjamen M. RATHSACK, Mark H. SOMERVELL, Joshua S. HOOGE
  • Publication number: 20150125791
    Abstract: Disclosed is a method and apparatus for mitigation of photoresist line pattern collapse in a photolithography process by applying a gap-fill material treatment after the post-development line pattern rinse step. The gap-fill material dries into a solid layer filling the inter-line spaces of the line pattern, thereby preventing line pattern collapse due to capillary forces during the post-rinse line pattern drying step. Once dried, the gap-fill material is depolymerized, volatilized, and removed from the line pattern by heating, illumination with ultraviolet light, by application of a catalyst chemistry, or by plasma etching.
    Type: Application
    Filed: July 3, 2014
    Publication date: May 7, 2015
    Inventors: Mark H. SOMERVELL, Benjamen M. RATHSACK, Ian J. BROWN, Steven SCHEER, Joshua S. HOOGE
  • Publication number: 20150108087
    Abstract: A method for forming a patterned topography on a substrate is provided. The substrate is initially provided with an exposed plurality of lines formed atop. An embodiment of the method includes aligning and preparing a first directed self-assembly pattern (DSA) pattern immediately overlying the plurality of lines, and transferring the first DSA pattern to form a first set of cuts in the plurality of lines. The embodiment further includes aligning and preparing a second DSA pattern immediately overlying the plurality of lines having the first set of cuts formed therein, and transferring the second DSA pattern to form a second set of cuts in the plurality of lines. The first and second DSA patterns each comprise a block copolymer having a hexagonal close-packed (HCP) morphology and a characteristic dimension Lo that is between 0.9 and 1.1 times the spacing between individual lines of the plurality of lines.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 23, 2015
    Inventors: Mark H. Somervell, Benjamen M. Rathsack
  • Publication number: 20150111387
    Abstract: A method is provided for forming a patterned topography on a substrate. The substrate is provided with features formed atop that constitute an existing topography, and a template for directed self-assembly (DSA) is formed surrounding the exposed topography. Further to the method, the exposed template surfaces are chemically treated. In one embodiment, the surfaces are treated with a hydrogen-containing reducing chemistry to alter the surfaces to a less oxidized state. In another embodiment, the surfaces are coated with a first phase of a block copolymer (BCP) to render the surfaces more attractive to the first phase than prior to the coating. The template is then filled with the BCP to cover the exposed topography, and then the BCP is annealed within the template to drive self-assembly in alignment with the topography. Developing the annealed BCP exposes a DSA pattern immediately overlying the topography.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 23, 2015
    Inventors: Mark H. Somervell, Makoto Muramatsu, Benjamen M. Rathsack, Tadatoshi Tomita, Hisashi Genjima, Hidetami Yaegashi, Kenichi Oyama
  • Publication number: 20150111386
    Abstract: A method is provided for forming a patterned topography on a substrate. The substrate is provided with features formed atop that constitute an existing topography, and a template for directed self-assembly (DSA) surrounds the exposed topography. Further to the method, the template is filled with a block copolymer (BCP) to cover the exposed topography, and then the BCP is annealed within the template to drive self-assembly in alignment with the topography. Developing the annealed BCP exposes a DSA pattern immediately overlying the topography.
    Type: Application
    Filed: October 17, 2014
    Publication date: April 23, 2015
    Inventors: Benjamen M. Rathsack, Mark H. Somervell
  • Patent number: 9005877
    Abstract: A method for patterning a layered structure is provided that includes performing photolithography to provide a developed prepattern layer on a horizontal surface of an underlying substrate, modifying the prepattern layer to form spaced apart inorganic material guides, casting and annealing a layer of a self-assembling block copolymer to form laterally-spaced cylindrical features, forming a pattern by selectively removing at least a portion of one block of the self-assembling block copolymer, and transferring the pattern to the underlying substrate. The method is suitable for making sub-50 nm patterned layered structures.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: April 14, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Benjamen M. Rathsack, Mark H. Somervell, Meenakshisundaram Gandhi
  • Patent number: 8980538
    Abstract: A method of forming a layered substrate comprising a self-assembled material is provided. The method includes forming a first layer of material on a substrate, forming a layer of a radiation sensitive material on the first layer of material, imaging the layer of the radiation sensitive material with patterned light, heating the layer of the radiation sensitive material to a temperature at or above the cross-linking reaction temperature, developing the imaged layer, and forming the block copolymer pattern. The radiation sensitive material comprises at least one photo-sensitive component selected from (a) a photo-decomposable cross-linking agent, (b) a photo-base generator, or (c) a photo-decomposable base; and a cross-linkable polymer, wherein imaging by the patterned light provides a pattern defined by a first region having substantial portions of a decomposed photo-sensitive component surrounded by regions having substantial portions of intact photo-sensitive component.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 17, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Mark H. Somervell, Michael A. Carcasi
  • Patent number: 8975009
    Abstract: A method is provided for preparing a prepatterned substrate for use in DSA integration. In one example, the method includes removing a radiation-sensitive material pattern overlying a patterned cross-linked polystyrene copolymer layer by a) exposure to a solvent vapor, b) exposure to a liquid solvent, and c) repeating steps a)-b) until the radiation-sensitive material pattern is completely removed. In another example, the method includes removing a neutral layer by affecting removal of an underlying patterned radiation-sensitive material layer, which includes swelling the neutral layer; and removing the radiation-sensitive material pattern and the swollen neutral layer in portions by exposing the swollen layer and pattern to a developer solution. Swelling the neutral layer includes a) exposure to a solvent vapor; b) exposure to a liquid solvent; and c) repeating steps a)-b) until the neutral layer is sufficiently swollen to allow penetration of the developing solution through the swollen neutral layer.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: March 10, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Mark H. Somervell, David Hetzer, Lior Huli
  • Publication number: 20140291878
    Abstract: A method for treating a layered substrate including a layer of a block copolymer is provided. The method includes identifying a non-uniformity in the layer of the block copolymer; controlling a process variable correlated to the non-uniformity in the layer of the block copolymer; and annealing the layer of the block copolymer under a process condition affected by the process variable to compensate for at least a portion of the non-uniformity in the layer of the block copolymer to form a pattern comprising a plurality of domains having improved uniformity therein. The method further provides a way for reducing a non-uniformity in a layered substrate comprising a layer of a block copolymer on a pre-patterned substrate.
    Type: Application
    Filed: March 29, 2013
    Publication date: October 2, 2014
    Applicant: Tokyo Electron Limited
    Inventor: Mark H. Somervell