Abstract: Fine pitch area array packaging is achieved using a via-in-pad design within the area array attach portion of a printed circuit board (PCB). The limitation of the design is the wicking action, whereby solder applied to the capture pad contact surface is depleted by capillary action into the via hole when reflowed, causing insufficient solder to be present at the contact surface to effect reliable and repeatable electrical connections. In one implementation, an initial application of solder is applied to plug the via hole with a material having a higher final melting temperature than eutectic solder, thereby providing a stable plug. This plug is formed by the initial solder application that may be either a eutectic solder containing a third metal that forms intermetallic compounds, when reflowed, that elevate the liquidus temperature or a solder having a different formulation with an inherent higher melting temperature.

Abstract: A flex cable pad on pad terminal structure is shown having raised connector pads formed using a rigid stiffener with raised features or bumps formed integral with the stiffener; aligned with the connector pad surfaces; and laminated to the flex cable surface opposite the surface presenting the exposed connector pad surfaces, to create raised contact pads that are not subject to relaxation over time when subjected to high contact normal forces. The use of a metal stiffener which has been coined to produce the raised features aligned with the contact pad locations and lamination using a film or layer of thermocuring adhesive affords an economical process and assembly technique that also effects hot deformation of the flex cable at the contact pad locations.

Abstract: A method of forming a bond structure for use with integrated circuits and semiconductor electronics and carrier assemblies is disclosed. Metallurgical paste is screen printed through a stencil and the stencil is left in place during the reflow process. The melting point of the bond structure and the metallurgical paste is lower than the melting point of interconnects on the electronic components and less than the decomposition temperature of the carrier assemblies to which the electronic components are bonded.

Abstract: A method of forming a bond structure for use with integrated circuits and semiconductor electronics and carrier assemblies is disclosed. Metallurgical paste is screen printed through a stencil and the stencil is left in place during the reflow process. The melting point of the bond structure and the metallurgical paste is lower than the melting point of interconnects on the electronic components and less than the decomposition temperature of the carrier assemblies to which the electronic components are bonded.

Abstract: The present invention may be characterized as an improved integrated circuit die testing system which includes a number of components which cooperate together. An integrated circuit carrier is provided for holding the integrated circuit die. Attached to the integrated circuit carrier is a chip site. Proximate to this chip site exists a plurality of contact pads. These contact pads are electrically coupled to a plurality of test points. Also provided is an integrated circuit die. Finally, a pattern of electrically conductive paste is provided. This electrically conductive paste electrically couples the integrated circuit die and the contact pads thereby allowing the integrated circuit die to be tested from the test points.

Abstract: A configuration of surface-mounted circuit assembly has four layers, namely, an integrated circuit device, an adhesive layer, a solder layer and the carrier board. The integrated circuit device is attached to the solder layer which sets on top of the carrier board, with the adhesive layer between the integrated circuit device and the solder layer. The carrier board has at least one via located beneath where the integrated circuit is located. The via is filled with solder such that the solder layer at which the integrated circuit device is situated is thermo-conductively connected to the back side of the carrier board. This configuration allows the integrated circuit device to be easily removed from the carrier board by the application of heat to the back side of the carrier board.

Abstract: A package for containing a high speed electronic assembly has a small physical size, shielding, pluggability, and is capable of operating at multigigabit transmission rates. The package includes a module and a cover which covers at least the top of the module. An optical assembly and a circuit packaging are inserted into the module. The package, with an appropriate cover, can be removed and inserted without disturbing other packages secured on the board. The circuit packaging is electrically connected to the board through bump connectors, while the circuit packaging itself supplies a normal force for insuring the bump connectors are in contact with the board. The package is attached to the board using an attachment member which is separate from the bump connectors. The bump connectors facilitate high speed transmission.

Abstract: A direct chip attach to heatsink structure is shown and described which implements rework when the chip must be removed and replaced. A laminated heatsink includes a metal heatsink with a foil layer adhered to the chip attachment surface with the assembly secured to a carrier at a cutout opening therein that defines the chip attach site. The adhesive, either a dry film adhesive or a pressure sensitive adhesive, secures foil layer to heatsink and provides the interface of separation when a chip must be removed and replaced. By peeling the foil away from the heatsink, the foil, chip and non-reworkable die attach adhesive are removed as a unit, leaving no chip attach adhesive residue at the attachment site to be scraped or abraded away. The replacement chip can be installed either by directly installing with new die attach adhesive or by first restoring the foil layer prior to chip installation.