Patents by Inventor Martin Gruber

Martin Gruber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220200578
    Abstract: An attenuator circuit is provided. The attenuator circuit includes a first input node and a second input node each configured to receive a respective one of a first input signal and a second input signal forming a differential input signal pair. Further, the attenuator circuit includes a first plurality of resistive elements coupled in series between the first input node and a first output node for outputting a first output signal. The attenuator circuit additionally includes a second plurality of resistive elements coupled in series between the second input node and a second output node for outputting a second output signal. In addition, the attenuator circuit includes a shunt path coupled to a first intermediate node and a second intermediate node. The first intermedia node is arranged between two resistive elements of the first plurality of resistive elements. The second intermedia node is arranged between two resistive elements of the second plurality of resistive elements.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Inventors: Daniel GRUBER, Mark L. ELZINGA, Martin CLARA, Giacomo CASCIO
  • Publication number: 20220200613
    Abstract: An input buffer circuit for an analog-to-digital converter is provided. The input buffer circuit includes a buffer amplifier. The buffer amplifier includes a first input node and a second input node each configured to receive a respective one of a first input signal and a second input signal forming a differential input signal pair for the analog-to-digital converter. The buffer amplifier further includes a first output node and a second output node each configured to output a respective one of a first buffered signal and a second buffered signal. In addition, the input buffer circuit includes feedback circuitry. The feedback circuitry is configured to generate, based on the first buffered signal and the second buffered signal, a first feedback signal and a second feedback signal for mitigating a respective unwanted signal component at the first input node and the second input node related to a limited reverse isolation of the amplifier buffer.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Inventors: Daniel GRUBER, Matteo CAMPONESCHI, Christian LINDHOLM, Martin CLARA, Giacomo CASCIO
  • Publication number: 20220197844
    Abstract: A bootstrapping circuit for a semiconductor switch is provided. The bootstrapping circuit includes a capacitor, a first node for coupling to an input node of the semiconductor switch, and a second node for coupling to a control node of the semiconductor switch. Further, the bootstrapping circuit includes a switch circuit configured to selectively couple the capacitor to a charge source while the semiconductor switch is open and to selectively close a conductive path between the first node and the second node for closing the semiconductor switch. The conductive path includes the capacitor. The bootstrapping circuit additionally includes charge injection circuitry configured to inject charge into the conductive path before, while or after the conductive path is closed by the switch circuit.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Inventors: Christian LINDHOLM, Giacomo CASCIO, Martin CLARA, Daniel GRUBER
  • Publication number: 20220200617
    Abstract: A segmented digital-to-analog converter (DAC) includes DAC segments, an overrange DAC, and a dither control circuit. Each DAC segment includes a plurality of DAC cells for generating an analog output signal based on input data to each DAC segment. The overrange DAC generates an analog output signal based on a control signal. The dither control circuit adds a dither to first input data supplied to a higher-order DAC segment, subtract a portion of the dither from second input data supplied to a lower-order DAC segment, and generate the control signal for subtracting a remaining portion of the dither from an output of the segmented DAC in an analog domain. The dither added to the first input data may be one of +1, 0, and ?1 and the portion of the dither subtracted from the second input data may be a half of the dither added to the first input data.
    Type: Application
    Filed: November 17, 2021
    Publication date: June 23, 2022
    Inventors: Martin CLARA, Daniel GRUBER, Kameran AZADET
  • Publication number: 20220200615
    Abstract: A reference buffer circuit for an analog-to-digital converter is provided. The reference buffer circuit includes a first input node configured to receive a first bias signal of a first polarity from a first signal line. Further, the reference buffer circuit includes a second input node configured to receive a second bias signal of a second polarity from a second signal line. Additionally, the reference buffer circuit includes a first output node configured to output a first reference signal of the first polarity. A first buffer amplifier is coupled between the first input node and the first output node. The reference buffer circuit includes in addition a second output node configured to output a second reference signal of the second polarity. A second buffer amplifier is coupled between the second input node and the second output node. Further, the reference buffer circuit includes a first coupling path comprising a first capacitive element.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Inventors: Daniel GRUBER, Christian LINDHOLM, Martin CLARA, Giacomo CASCIO
  • Publication number: 20220200583
    Abstract: An inverter circuit is provided. The inverter circuit includes a first node for coupling to a first electrical potential and a second node for coupling to a second electrical potential different from the first electrical potential. Further, the inverter circuit includes a third node configured to output an output signal of the inverter circuit. The inverter circuit includes a plurality of transistors of a first conductivity type coupled in series between the first node and the third node. Additionally, the inverter circuit includes a plurality of transistors of a second conductivity type coupled in series between the third node and the second node. The second conductivity type is different from the first conductivity type. The inverter circuit further includes at least one coupling path comprising a capacitive element.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Inventors: Daniel GRUBER, Martin CLARA, Alessandra CANGIANIELLO
  • Patent number: 11367683
    Abstract: A silicon carbide device includes a silicon carbide substrate, a contact layer including nickel, silicon and aluminum, a barrier layer structure including titanium and tungsten, and a metallization layer including copper. The contact layer is located on the silicon carbide substrate. The contact layer is located between the silicon carbide substrate and at least a part of the barrier layer structure. The barrier layer structure is located between the silicon carbide substrate and the metallization layer.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: June 21, 2022
    Assignee: Infineon Technologies AG
    Inventors: Edward Fuergut, Ravi Keshav Joshi, Ralf Siemieniec, Thomas Basler, Martin Gruber, Jochen Hilsenbeck, Dethard Peters, Roland Rupp, Wolfgang Scholz
  • Publication number: 20220165687
    Abstract: A package is disclosed. In one example, the package comprises a carrier, an electronic component mounted on the carrier, an encapsulant encapsulating at least part of the electronic component and at least part of the carrier and having a bottom side at a first vertical level. At least one lead is electrically coupled with the electronic component and comprising a first lead portion being encapsulated in the encapsulant and a second lead portion extending out of the encapsulant at the bottom side of the encapsulant. A functional structure at the bottom side extends up to a second vertical level different from the first vertical level.
    Type: Application
    Filed: October 15, 2021
    Publication date: May 26, 2022
    Applicant: Infineon Technologies AG
    Inventors: Thorsten MEYER, Thomas BEMMERL, Martin GRUBER, Martin Richard NIESSNER
  • Patent number: 11338237
    Abstract: A hollow filter element for insertion into an openable filter housing has a filter medium body configured as a hollow body surrounding an inwardly positioned flow space. At least one end disk is connected to the filter medium body and covers an axial end face of the filter medium body. A positioning element is arranged at the at least one end disk and interacts with a housing-associated blade of the filter housing. The positioning element receives the housing-associated blade with form fit in two different transverse directions relative to the longitudinal axis of the filter medium body. The positioning element has a positioning recess.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: May 24, 2022
    Assignee: MANN+HUMMEL GmbH
    Inventors: Christoph Wittmers, Nadine Donauer, Andreas Franz, Marcel Holzwarth, Pedro Miguel Pereira Madeira, Joachim-Paul Krieger, Martin Gruber, Manfred Winter, Torsten Fritzsching
  • Patent number: 11342859
    Abstract: An apparatus for supplying power to a high-capacity load includes a three-to-two phase transformer including an input side three-phase transformer terminal for connection to a three-phase supply grid and output side first and second output-side single-phase transformer terminals. A converter arrangement has a first partial converter including a first input-side, single-phase AC voltage terminal for the first output-side transformer terminal and a first single-phase output terminal. A second partial converter has a second input-side single-phase AC voltage terminal for the second output-side transformer terminal and a second single-phase output connector. The partial converters are mutually connectable by the output terminals in an output-side series and/or parallel circuit and form a single-phase load terminal for the high-capacity load. A method for supplying power to a high-capacity load is also provided.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: May 24, 2022
    Assignee: Siemens Energy Global GmbH & Co. KG
    Inventors: Rainer Gruber, Martin Pieschel
  • Publication number: 20220157774
    Abstract: A semiconductor package is disclosed. In one example, the package includes a non-power chip including a first electrical contact arranged at a first main surface of the non-power chip. The semiconductor package further includes a power chip comprising a second electrical contact arranged at a second main surface of the power chip. A first electrical redistribution layer coupled to the first electrical contact and a second electrical redistribution layer coupled to the second electrical contact. When measured in a first direction vertical to at least one of the first main surface or the second main surface, a maximum thickness of at least a section of the first electrical redistribution layer is smaller than a maximum thickness of the second electrical redistribution layer.
    Type: Application
    Filed: October 15, 2021
    Publication date: May 19, 2022
    Applicant: Infineon Technologies AG
    Inventors: Thorsten MEYER, Martin GRUBER, Thorsten SCHARF
  • Patent number: 11325676
    Abstract: In an electric drive device for a bicycle, there is an electric motor with an output shaft and an angular gear by which the output shaft is connectable to a wheel of the bicycle in a drive-effective manner, and a fastening device is provided, carrying the electric motor and configured to fasten the electric motor to a rotation axle of the wheel.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: May 10, 2022
    Assignee: ALPINE DRIVE GMBH
    Inventors: Martin Gruber, Reinhold Gruber
  • Publication number: 20220112575
    Abstract: A cold rolled steel strip or sheet has a composition consisting of (in wt. %): C 0.15-0.25; Si 0.5-1.6; Mn 2.2-3.2; Cr?0.8; Mo?0.2; Al 0.03-1.0; Nb?0.04; V?0.04; Ti 0.01-0.04; B 0.001-0.010; TUB 5-30; Cu?0.15; Ni?0.15; Ca?0.01; balance Fe apart from impurities, where the cold rolled steel has a multiphase microstructure comprising a matrix mainly composed of tempered martensite and has a tensile strength (Rm) of at least 1380 MPa.
    Type: Application
    Filed: November 28, 2019
    Publication date: April 14, 2022
    Inventors: Johannes REHRL, Martin GRUBER, Florian WINKELHOFER, Thomas HEBESBERGER
  • Publication number: 20220112586
    Abstract: The invention relates to a cold rolled steel sheet having a composition consisting of (in wt. %): C 0.15-0.25; Si 0.5-1.6; Mn 2.2-2.8; Cr?0.8; Mo?0.2; Al 0.03-1.0; Nb?0.04; V?0.04; Ti 0.02-0.04; B 0.001-0.005; balance Fe apart from impurities, wherein the impurity contents of Cu and Ni are limited to ?0.15, the cold rolled steel has a multiphase microstructure comprising a matrix of bainitic ferrite and ?10 vol. % polygonal ferrite and the tensile strength (Rm) is 980-1500 MPa.
    Type: Application
    Filed: November 28, 2019
    Publication date: April 14, 2022
    Inventors: Florian WINKELHOFER, Thomas HEBESBERGER, Martin GRUBER, Johannes REHRL
  • Publication number: 20220102311
    Abstract: A semiconductor device module includes a package carrier having an opening, wherein in the opening there is disposed a semiconductor package including a semiconductor die, an encapsulant, and first vertical contacts, wherein the encapsulant at least partially covers the semiconductor die, and the first vertical contacts are connected to the semiconductor die and extend at least partially through the encapsulant, and a first outer metallic contact layer electrically connected to the first vertical contacts.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 31, 2022
    Inventors: Edward Fuergut, Martin Gruber, Petteri Palm, Bernd Schmoelzer, Wolfgang Scholz, Mark Thomas
  • Publication number: 20220102301
    Abstract: A device for controlling trapped ions includes a first semiconductor substrate. A second semiconductor substrate is disposed over the first semiconductor substrate. At least one ion trap is configured to trap ions in a space between the first semiconductor substrate and the second semiconductor substrate. A spacer is disposed between the first semiconductor substrate and the second semiconductor substrate, the spacer including an electrical interconnect which electrically connects a first metal layer structure of the first semiconductor substrate to a second metal layer structure of the second semiconductor substrate.
    Type: Application
    Filed: September 29, 2021
    Publication date: March 31, 2022
    Inventors: Clemens Roessler, Silke Auchter, Martin Gruber, Johanna Elisabeth Roessler
  • Patent number: 11264356
    Abstract: A method of manufacturing packages is disclosed. In one example, the method comprises providing an electrically conductive sheet being continuous at least in a mounting region, mounting first main surfaces of a plurality of electronic components on the continuous mounting region of the sheet and forming interconnect structures for electrically coupling second main surfaces of the electronic components with the sheet. The second main surfaces oppose the first main surfaces. After the forming, structuring the sheet.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: March 1, 2022
    Assignee: Infineon Technologies AG
    Inventors: Thorsten Meyer, Thomas Behrens, Andreas Grassmann, Martin Gruber, Thorsten Scharf
  • Publication number: 20220010827
    Abstract: A resistance spot welded joint of at least two steel sheets and a method of producing a resistance spot welded joint of at least two steel sheets, wherein at least one of the steel sheets is provided with a Zn containing layer, the steel sheet has a tensile strength of at least 980 MPa, a multiphase microstructure comprising bainite, bainitic ferrite and tempered martensite in a total amount of at least of 75 volume % and retained austenite in an amount of 3-20 volume % and wherein the steel sheet provided with the Zn containing layer has a composition consisting of (in wt. %): C 0.1-0.3; Si 0.2-3.0; Mn 1.0-3.0; Cr?2.0; Mo?0.5; Al?2.0; Nb?0.2; V?0.2; Ti 0.01-0.15; B 0.0005-0.01; and balance Fe apart from impurities, wherein the heat affected zone in the spot welded joint is free from cracks having a length of more than 500 ?m.
    Type: Application
    Filed: November 28, 2019
    Publication date: January 13, 2022
    Inventors: Florian WINKELHOFER, Thomas HEBESBERGER, Martin GRUBER
  • Publication number: 20220005755
    Abstract: The semiconductor device package comprises a die carrier, at least one semiconductor die disposed on the carrier, the semiconductor die comprising at least one contact pad on a main face remote from the carrier, an encapsulant disposed above the semiconductor die, an electrical connector electrically connected with the contact pad, a drilling screw screwed through the encapsulant and connected with the electrical connector.
    Type: Application
    Filed: June 28, 2021
    Publication date: January 6, 2022
    Inventors: Thorsten Scharf, Thomas Bemmerl, Martin Gruber, Thorsten Meyer, Frank Singer
  • Publication number: 20210384111
    Abstract: A semiconductor package includes a die pad comprising a die attach surface, a first lead extending away from the die pad, one or more semiconductor dies mounted on the die attach surface, the one or more semiconductor dies comprising first and second bond pads that each face away from the die attach surface, and a distribution element that provides a first transmission path for a first electrical signal between the first lead and the first bond pad of the one or more semiconductor dies and a second transmission path for the first electrical signal between the first lead and the second bond pad of the one or more semiconductor dies. The distribution element comprises at least one integrally formed circuit element that creates a difference in transmission characteristics between the first and second transmission paths.
    Type: Application
    Filed: June 4, 2020
    Publication date: December 9, 2021
    Inventors: Stephan Voss, Edward Fuergut, Martin Gruber, Andreas Huerner, Anton Mauder