Abstract: A semiconductor device package includes a lead frame, a first power semiconductor device mounted on a first part of the lead frame and a second power semiconductor device mounted on a second part of the lead frame. The first power semiconductor device is encapsulated by a first mold compound. The second power semiconductor device is encapsulated by a second mold compound. The first mold compound and the second mold compound are substantially separate from each other. The lead frame includes an intermediate part arranged between the first part and the second part. The intermediate part is not covered by the first mold compound or by the second mold compound.

Abstract: A semiconductor chip assembly includes first and second semiconductor dies that each include opposite facing upper and lower sides and an outer edge side, and an electrical interposer having opposite facing first and second conductive surfaces and a conductive connection between the conductive surfaces. The second semiconductor die is mounted on top of the first semiconductor die and the interposer such that the lower side of the second semiconductor die faces the first semiconductor die and the interposer, a first lateral section of the second semiconductor die at least partially covers the upper side of the first semiconductor die, and a second lateral section of the second semiconductor die extends past the outer edge side of the first semiconductor die. The first conductive surface is electrically connected to a first terminal that is disposed on a lower side of the second semiconductor die.

Abstract: A silicon carbide device includes a silicon carbide substrate, a contact layer including nickel, silicon and aluminum, a barrier layer structure including titanium and tungsten, and a metallization layer including copper. The contact layer is located on the silicon carbide substrate. The contact layer is located between the silicon carbide substrate and at least a part of the barrier layer structure. The barrier layer structure is located between the silicon carbide substrate and the metallization layer.

Abstract: A heat dissipation device includes a first part having a first material and a surface portion, and a second part on the surface portion. The second part has a second material and a porosity.

Abstract: A current sensor and a current sensing method are disclosed. The current sensor includes a sensor chip having a first chip surface, a second chip surface and at least one sensor element, and a housing having a first housing surface adjoining the second chip surface and a second housing surface spaced apart from the first housing surface and separated from the first housing surface by a spacer section of the housing. The second housing surface is configured to be mounted on a conductor and is electrically insulating.

Abstract: A semiconductor device is disclosed. In one example, the semiconductor device comprises a first semiconductor die comprising a first surface, a second surface opposite to the first surface, and a contact pad disposed on the first surface, a further contact pad spaced apart from the semiconductor die, a clip comprising a first layer of a first metallic material and a second layer of a second metallic material different from the first metallic material, wherein the first layer of the clip is connected with the contact pad, and the second layer of the clip is connected with the further contact pad.

Abstract: A semiconductor package system comprises a semiconductor package and a cap. The semiconductor package comprises a die pad, a chip mounted or arranged to a first main face of the die pad and an encapsulation body encapsulating the chip and the die pad. The cap covers at least partly an exposed second main face of the die pad. The cap comprises a cap body of an electrically insulating and thermally conductive material and a fastening system fastening the cap to the semiconductor package. The fastening system extends from the cap body towards the encapsulation body or along a side surface of the semiconductor package.

Abstract: An electronic module includes a first insulation layer, at least one carrier having a first main surface, a second main surface situated opposite the first main surface, and side surfaces connecting the first and second main surfaces to one another, at least one semiconductor chip arranged on the second main surface of the carrier, wherein the semiconductor chip has contact elements, and a second insulation layer, which is arranged on the carrier and the semiconductor chip.

Abstract: A semiconductor device includes a first lead frame, a second lead frame, a first semiconductor chip, and an encapsulation material. The first lead frame includes a first die pad having a first surface and a second surface opposite to the first surface. The second lead frame includes a second die pad having a first surface and a second surface opposite to the first surface. The first surface of the second die pad faces the first surface of the first die pad. The first semiconductor chip is attached to the first surface of the first die pad. The encapsulation material encapsulates the first semiconductor chip and portions of the first lead frame and the second lead frame. The encapsulation material has a first surface aligned with the second surface of the first die pad and a second surface aligned with the second surface of the second die pad.

Abstract: A semiconductor device package includes a lead frame, a first power semiconductor device mounted on a first part of the lead frame and a second power semiconductor device mounted on a second part of the lead frame. The first power semiconductor device is encapsulated by a first mold compound. The second power semiconductor device is encapsulated by a second mold compound. The first mold compound and the second mold compound are substantially separate from each other. The lead frame includes an intermediate part arranged between the first part and the second part. The intermediate part is not covered by the first mold compound or by the second mold compound.

Abstract: The method comprises providing a plurality of electronic devices, embedding the electronic devices in an encapsulation layer, forming vias into the encapsulation layer, the vias extending from a main face of the encapsulation layer to the electronic devices, and depositing a metallic layer onto the encapsulation layer including the vias by galvanic plating, the method further comprising providing a current distribution layer for effecting a distributed growth of the metallic material during the galvanic plating.

Abstract: A filter element has a filter medium body enclosing an inwardly positioned flow space and having a center axis. A support frame is arranged at an inner side of the filter medium body. At least one circumferentially extending sealing ring lip is arranged at the filter medium body and projects axially in an axial direction relative to the center axis past an end face of the filter medium body. The sealing ring lip is designed to seal relative to a housing component of a receiving filter housing. A support ring is arranged at the end face of the filter medium body at a radial distance to the sealing ring lip in a radial direction relative to the center axis. The support ring is supported in the radial direction at the support frame and is formed as one piece together with the support frame.

Abstract: An annular filter element has a filter medium body configured to be flowed through by a fluid to be purified in a radial direction. A sealing element is arranged at the end face of the filter medium body and extends circumferentially around the end face. The sealing element has at least one first sealing section comprising a massive and large cross-sectional area and one or more second sealing sections with a cross-sectional area that is at least partially reduced in comparison to the large cross-sectional area. The one or more second sealing sections include a second sealing section with a groove-type recess, wherein the groove-type recess extends at least approximately across a length of the second sealing section with the groove-type recess or across a portion of said length.

Abstract: A hollow filter element for insertion into an openable filter housing has a filter medium body configured as a hollow body surrounding an inwardly positioned flow space. At least one end disk is connected to the filter medium body and covers an axial end face of the filter medium body. A positioning element is arranged at the at least one end disk and interacts with a housing-associated blade of the filter housing. The positioning element receives the housing-associated blade with form fit in two different transverse directions relative to the longitudinal axis of the filter medium body. The positioning element has a positioning recess.

Abstract: An interconnect module includes a metal clip having a first end section, a second end section and a middle section extending between the first and the second end sections. The first end section is configured for external attachment to a bare semiconductor die or packaged semiconductor die attached to a carrier or to a metal region of the carrier. The second end section is configured for external attachment to a different metal region of the carrier or to a different semiconductor die or packaged semiconductor die attached to the carrier. The module further includes a magnetic field sensor secured to the metal clip. The magnetic field sensor is operable to sense a magnetic field produced by current flowing through the metal clip. The interconnect module can be used to form a direct electrical connection between components and/or metal regions of a carrier to which the module is attached.

Abstract: A device is provided that includes a switch within a package. A first electrical connection is provided between a load terminal of the switch and first pin of the package, and a second electrical connection at least partially different from the first electrical connection is provided between the switch and a second pin of the package. The second pin is different from the first pin.

Abstract: In order to produce a power semiconductor module, a circuit carrier is populated with a semiconductor chip and with an electrically conductive contact element. After populating, the semiconductor chip and the contact element are embedded into a dielectric embedding compound, and the contact element is exposed. In addition, an electrically conductive base layer is produced which electrically contacts the exposed contact element and which bears on the embedding compound and the exposed contact element. A prefabricated metal film is applied to the base layer by means of an electrically conductive connection layer.

Abstract: A semiconductor chip package is disclosed. The package includes a carrier, a plurality of semiconductor chips disposed on the carrier, a first encapsulation layer disposed above the semiconductor chips. A metallization layer is disposed above the first encapsulation layer, the metallization layer including a plurality of first metallic areas forming electrical connections between selected ones of the semiconductor chips. A second encapsulation layer is disposed above the solder resist layer. A plurality of external connectors are provided, each one of the external connectors being connected with one of the first metallic areas and extending outwardly through a surface of the second encapsulation layer.

Abstract: A semiconductor module includes a circuit board and a power semiconductor chip embedded in the circuit board. The power semiconductor chip has a first load electrode. The semiconductor module further includes a power terminal connector electrically connected to the first load electrode. The embedded power semiconductor chip is positioned laterally within a footprint zone of the power terminal connector.

Abstract: A device is provided that includes a switch within a package. A first electrical connection is provided between a load terminal of the switch and first pin of the package, and a second electrical connection at least partially different from the first electrical connection is provided between the switch and a second pin of the package. The second pin is different from the first pin.