Abstract: A resistive random access memory (RRAM), includes a base oxide, and a multivalent oxide provided on the base oxide. The multivalent oxide switches between at least two oxidative states.

Abstract: A resistive random access memory (RRAM), including a first electrode, a base oxide being connected to the first electrode, and a multivalent oxide being connected to the base oxide layer. The multivalent oxide switches oxidative states.

Abstract: Photodetector structures and methods of manufacture are provided. The method includes forming undercuts about detector material formed on a substrate. The method further includes encapsulating the detector to form airgaps from the undercuts. The method further includes annealing the detector material causing expansion of the detector material into the airgaps.

Abstract: A cross bar array device includes first electrodes arranged adjacent to each other and extending in a first direction, the first electrodes including a main electrode layer and a scalable electrode layer. Second electrodes are arranged transversely to the first electrodes, the second electrodes including a main electrode layer and a scalable electrode layer. An electrolyte layer is disposed between the scalable electrode layers of the first electrodes and the second electrodes. A scalable electrode is formed from a scalable electrode layer and includes an undercut having a side laterally recessed from a width of a corresponding main electrode.

Abstract: A resistive random access memory (RRAM) includes a first electrode, a second electrode, a base oxide provided between the first electrode and the second electrode, and a multivalent oxide provided between the first electrode and the second electrode. The multivalent oxide switches between at least two oxidative states.

Abstract: Disclosed are a method of forming a photodetector and a photodetector structure. In the method, a polycrystalline or amorphous light-absorbing layer is formed on a dielectric layer such that it is in contact with a monocrystalline semiconductor core of an optical waveguide. The light-absorbing layer is then encapsulated in one or more strain-relief layers and a rapid melting growth (RMG) process is performed to crystallize the light-absorbing layer. The strain-relief layer(s) are tuned for controlled strain relief so that, during the RMG process, the light-absorbing layer remains crack-free. The strain-relief layer(s) are then removed and an encapsulation layer is formed over the light-absorbing layer (e.g., filling in surface pits that developed during the RMG process). Subsequently, dopants are implanted through the encapsulation layer to form diffusion regions for PIN diode(s). Since the encapsulation layer is relatively thin, desired dopant profiles can be achieved within the diffusion regions.

Abstract: Embodiments are directed to a method of forming an optical coupler system. The method includes forming at least one waveguide over a substrate, and forming a sacrificial optical coupler in a first region over the substrate. The method further includes configuring the sacrificial optical coupler to couple optical signals to or from the at least one waveguide, and forming a v-groove in the first region over the substrate, wherein forming the v-groove includes removing the sacrificial optical coupler from the first region.

Abstract: Embodiments are directed to a method of forming an optical coupler system. The method includes forming at least one waveguide over a substrate, and forming gratings in a first region over the substrate. The method further includes configuring the gratings to couple optical signals to or from the at least one waveguide, and forming a v-groove in the first region over the substrate, wherein forming the v-groove includes removing the gratings from the first region.

Abstract: Various particular embodiments include a method for forming a photodetector, including: forming a structure including a barrier layer disposed between a layer of doped silicon (Si) and a layer of germanium (Ge), the barrier layer including a crystallization window; and annealing the structure to convert, via the crystallization window, the Ge to a first composition of silicon germanium (SiGe) and the doped Si to a second composition of SiGe.

Abstract: Approaches for silicon photonics integration are provided. A method includes: forming at least one encapsulating layer over and around a photodetector; thermally crystallizing the photodetector material after the forming the at least one encapsulating layer; and after the thermally crystallizing the photodetector material, forming a conformal sealing layer on the at least one encapsulating layer and over at least one device. The conformal sealing layer is configured to seal a crack in the at least one encapsulating layer. The photodetector and the at least one device are on a same substrate. The at least one device includes a complementary metal oxide semiconductor device or a passive photonics device.

Abstract: Photodetector structures and methods of manufacture are provided. The method includes forming undercuts about detector material formed on a substrate. The method further includes encapsulating the detector to form airgaps from the undercuts. The method further includes annealing the detector material causing expansion of the detector material into the airgaps.

Abstract: Device structure and fabrication methods for a bipolar junction transistor. A trench isolation region is formed that bounds an active device region along a sidewall. A dielectric region is formed that extends laterally from the sidewall of the active device region into the active device region. The dielectric region is located beneath a top surface of the active device region such that a section of the active device region is located between the top surface and the dielectric region.

Abstract: Approaches for silicon photonics integration are provided. A method includes: forming at least one encapsulating layer over and around a photodetector; thermally crystallizing the photodetector material after the forming the at least one encapsulating layer; and after the thermally crystallizing the photodetector material, forming a conformal sealing layer on the at least one encapsulating layer and over at least one device. The conformal sealing layer is configured to seal a crack in the at least one encapsulating layer. The photodetector and the at least one device are on a same substrate. The at least one device includes a complementary metal oxide semiconductor device or a passive photonics device.

Abstract: Photodetector structures and methods of manufacture are provided. The method includes forming undercuts about detector material formed on a substrate. The method further includes encapsulating the detector to form airgaps from the undercuts. The method further includes annealing the detector material causing expansion of the detector material into the airgaps.

Abstract: Various particular embodiments include a method for forming a photodetector, including: forming a structure including a barrier layer disposed between a layer of doped silicon (Si) and a layer of germanium (Ge), the barrier layer including a crystallization window; and annealing the structure to convert, via the crystallization window, the Ge to a first composition of silicon germanium (SiGe) and the doped Si to a second composition of SiGe.

Abstract: Device structures, fabrication methods, and design structures for a bipolar junction transistor. A trench isolation region is formed in a substrate. The trench isolation region is coextensive with a collector in the substrate. A base layer is formed on the collector and on a first portion of the trench isolation region. A dielectric layer is formed on the base layer and on a second portion of the trench isolation region peripheral to the base layer. After the dielectric layer is formed, the trench isolation region is at least partially removed to define an air gap beneath the dielectric layer and the base layer.

Abstract: Various particular embodiments include a method for forming a photodetector, including: forming a structure including a barrier layer disposed between a layer of doped silicon (Si) and a layer of germanium (Ge), the barrier layer including a crystallization window; and annealing the structure to convert, via the crystallization window, the Ge to a first composition of silicon germanium (SiGe) and the doped Si to a second composition of SiGe.

Abstract: A cross bar array device includes first electrodes arranged adjacent to each other and extending in a first direction, the first electrodes including a main electrode layer and a scalable electrode layer. Second electrodes are arranged transversely to the first electrodes, the second electrodes including a main electrode layer and a scalable electrode layer. An electrolyte layer is disposed between the scalable electrode layers of the first electrodes and the second electrodes. A scalable electrode is formed from a scalable electrode layer and includes an undercut having a side laterally recessed from a width of a corresponding main electrode.

Abstract: A method of protecting a CMOS device within an integrated photonic semiconductor structure is provided. The method may include depositing a conformal layer of germanium over the CMOS device and an adjacent area to the CMOS device, depositing a conformal layer of dielectric hardmask over the germanium, and forming, using a mask level, a patterned layer of photoresist for covering the CMOS device and a photonic device formation region within the adjacent area. Openings are etched into areas of the deposited layer of silicon nitride not covered by the patterned photoresist, such that the areas are adjacent to the photonic device formation region. The germanium material is then etched from the conformal layer of germanium at a location underlying the etched openings for forming the photonic device at the photonic device formation region. The conformal layer of germanium deposited over the CMOS device protects the CMOS device.

Abstract: Disclosed are a method of forming a photodetector and a photodetector structure. In the method, a polycrystalline or amorphous light-absorbing layer is formed on a dielectric layer such that it is in contact with a monocrystalline semiconductor core of an optical waveguide. The light-absorbing layer is then encapsulated in one or more strain-relief layers and a rapid melting growth (RMG) process is performed to crystallize the light-absorbing layer. The strain-relief layer(s) are tuned for controlled strain relief so that, during the RMG process, the light-absorbing layer remains crack-free. The strain-relief layer(s) are then removed and an encapsulation layer is formed over the light-absorbing layer (e.g., filling in surface pits that developed during the RMG process). Subsequently, dopants are implanted through the encapsulation layer to form diffusion regions for PIN diode(s). Since the encapsulation layer is relatively thin, desired dopant profiles can be achieved within the diffusion regions.