Patents by Inventor Masaaki Niwa

Masaaki Niwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190363245
    Abstract: A structure used in the formation of a spintronics element, the spintronics element to include a plurality of laminated layers, includes a substrate, a plurality of laminated layers formed on the substrate, an uppermost layer of the plurality of laminated layers being a non-magnetic layer containing oxygen, and a protection layer directly formed on the uppermost layer, the protection layer preventing alteration of characteristics of the uppermost layer while exposed in an atmosphere including H2O, a partial pressure of H2O in the atmosphere being equal to or larger than 10?4 Pa, no other layer being directly formed on the protection layer.
    Type: Application
    Filed: July 16, 2019
    Publication date: November 28, 2019
    Applicant: TOHOKU UNIVERSITY
    Inventors: Soshi SATO, Masaaki NIWA, Hiroaki HONJO, Shoji IKEDA, Hideo OHNO, Tetsuo ENDO
  • Patent number: 10485785
    Abstract: Disclosed is a method for producing a fine powder. Two or more kinds of original materials are suspended and liquefied inert gas to form two or more kinds of slurries wherein each slurry contains at least one or more different kinds of original materials. Granular dry ice grinding medium is put into the slurries. The slurries are individually stirred and the original materials are pulverized into submicron-sized or nano-sized particles in the liquefied inert gas. The slurries are thereafter mixed. The liquefied inert gas is vaporized and the granular dry ice is sublimated. A mixture of the particles of the two or more kinds of original materials is recovered.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: November 26, 2019
    Assignee: Moriroku Chemicals Company, Ltd.
    Inventors: Toshiyuki Niwa, Shohei Sugimoto, Kazumi Danjo, Masaaki Nishio, Yasuo Nakanishi, Sakiko Kawamura
  • Publication number: 20190304741
    Abstract: An evaluation method for an electronic device provided with an insulating film between a pair of electrode layers includes preparing a sample that has a tunnel barrier insulating film as the insulating film; irradiating the sample with electron beams from a plurality of angles to acquire a plurality of images; and performing image processing using the plurality of images to reconstruct a stereoscopic image and generate a cross-sectional image of the sample from the stereoscopic image.
    Type: Application
    Filed: March 21, 2019
    Publication date: October 3, 2019
    Inventors: Masaaki Niwa, Tetsuo Endoh, Shoji Ikeda, Kosuke Kimura
  • Patent number: 10424725
    Abstract: A spintronics element including a ferromagnetic layer containing boron, and a diffusion stopper film covering a side face of the ferromagnetic layer partially or entirely, the side face in direct contact with diffusion stopper film, so as to prevent out-diffusion of the boron contained in the ferromagnetic layer. The diffusion stopper film contains boron at a concentration higher than a concentration of the boron in a portion of the ferromagnetic layer where the ferromagnetic layer contacts the diffusion stopper film.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: September 24, 2019
    Assignee: TOHOKU UNIVERSITY
    Inventors: Soshi Sato, Masaaki Niwa, Hiroaki Honjo, Shoji Ikeda, Hideo Sato, Hideo Ohno, Tetsuo Endoh
  • Patent number: 10396274
    Abstract: A method of manufacturing a spintronics element from laminated layers. The method includes (a) forming a plurality of laminated layers in manufacturing equipment, (b) forming a wafer in the manufacturing equipment, including applying a protection layer directly on a non-magnetic uppermost layer of the laminated layers so that the protection layer prevents alteration of characteristics of the uppermost layer, and (c) exposing the wafer, outside of the manufacturing equipment, to an atmosphere that includes H2O having a partial pressure in the atmosphere equal to or larger than 10?4 Pa.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: August 27, 2019
    Assignee: TOHOKU UNIVERSITY
    Inventors: Soshi Sato, Masaaki Niwa, Hiroaki Honjo, Shoji Ikeda, Hideo Ohno, Tetsuo Endo
  • Publication number: 20190198755
    Abstract: A method for producing a magnetic memory includes: forming a magnetic film having a non-magnetic layer between a first magnetic layer and a second magnetic layer on a substrate having an electrode layer; performing annealing treatment at a first treatment temperature in a state where a magnetic field is applied in a direction perpendicular to a film surface of the first or the second magnetic layer in vacuum; forming a magnetic tunnel junction element; forming a protective film protecting the magnetic tunnel junction element; a formation accompanied by thermal history, in which a constituent element of a magnetic memory is formed after the protective film formation on the substrate; and implementing annealing treatment at a second treatment temperature lower than the first treatment temperature on the substrate in an annealing treatment chamber, in vacuum or inert gas wherein no magnetic field is applied.
    Type: Application
    Filed: August 28, 2017
    Publication date: June 27, 2019
    Inventors: Kenchi ITO, Tetsuo ENDOH, Shoji IKEDA, Hideo SATO, Hideo OHNO, Sadahiko MIURA, Masaaki NIWA, Hiroaki HONJO
  • Publication number: 20190074433
    Abstract: A magnetoresistance effect element includes first and second magnetic layers having a perpendicular magnetization direction, and a first non-magnetic layer disposed adjacent to the first magnetic layer and on a side opposite to a side on which the second magnetic layer is disposed. An interfacial perpendicular magnetic anisotropy exists at an interface between the first magnetic layer and the first non-magnetic layer, and the anisotropy causes the first magnetic layer to have a magnetization direction perpendicular to the surface of the layers. An atomic fraction of all magnetic elements to all magnetic and non-magnetic elements included in the second magnetic layer is smaller than that of the first magnetic layer.
    Type: Application
    Filed: November 2, 2018
    Publication date: March 7, 2019
    Applicant: TOHOKU UNIVERSITY
    Inventors: Hideo SATO, Shoji IKEDA, Mathias BERSWEILER, Hiroaki HONJO, Kyota WATANABE, Shunsuke FUKAMI, Fumihiro MATSUKURA, Kenchi ITO, Masaaki NIWA, Tetsuo ENDOH, Hideo OHNO
  • Patent number: 10164174
    Abstract: A magnetoresistance effect element includes first and second magnetic layers having a perpendicular magnetization direction, and a first non-magnetic layer disposed adjacent to the first magnetic layer and on a side opposite to a side on which the second magnetic layer is disposed. An interfacial perpendicular magnetic anisotropy exists at an interface between the first magnetic layer and the first non-magnetic layer, and the anisotropy causes the first magnetic layer to have a magnetization direction perpendicular to the surface if the layers. The second magnetic layer has a saturation magnetization lower than that of the first magnetic layer, and an interfacial magnetic anisotropy energy density (Ki) at the interface between the first magnetic layer and the first non-magnetic layer is greater than that of an interface between the first non-magnetic layer and second magnetic layers if being disposed adjacent each other.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: December 25, 2018
    Assignee: TOHOKU UNIVERSITY
    Inventors: Hideo Sato, Shoji Ikeda, Mathias Bersweiler, Hiroaki Honjo, Kyota Watanabe, Shunsuke Fukami, Fumihiro Matsukura, Kenchi Ito, Masaaki Niwa, Tetsuo Endoh, Hideo Ohno
  • Publication number: 20180301621
    Abstract: A spintronics element including a ferromagnetic layer containing boron, and a diffusion stopper film covering a side face of the ferromagnetic layer partially or entirely, the side face in direct contact with diffusion stopper film, so as to prevent out-diffusion of the boron contained in the ferromagnetic layer. The diffusion stopper film contains boron at a concentration higher than a concentration of the boron in a portion of the ferromagnetic layer where the ferromagnetic layer contacts the diffusion stopper film.
    Type: Application
    Filed: June 20, 2018
    Publication date: October 18, 2018
    Applicant: TOHOKU UNIVERSITY
    Inventors: Soshi SATO, Masaaki NIWA, Hiroaki HONJO, Shoji IKEDA, Hideo SATO, Hideo OHNO, Tetsuo ENDOH
  • Publication number: 20180175286
    Abstract: A magnetoresistance effect element includes first and second magnetic layers having a perpendicular magnetization direction, and a first non-magnetic layer disposed adjacent to the first magnetic layer and on a side opposite to a side on which the second magnetic layer is disposed. An interfacial perpendicular magnetic anisotropy exists at an interface between the first magnetic layer and the first non-magnetic layer, and the anisotropy causes the first magnetic layer to have a magnetization direction perpendicular to the surface if the layers. The second magnetic layer has a saturation magnetization lower than that of the first magnetic layer, and an interfacial magnetic anisotropy energy density (Ki) at the interface between the first magnetic layer and the first non-magnetic layer is greater than that of an interface between the first non-magnetic layer and second magnetic layers if being disposed adjacent each other.
    Type: Application
    Filed: January 16, 2018
    Publication date: June 21, 2018
    Applicant: TOHOKU UNIVERSITY
    Inventors: Hideo SATO, Shoji IKEDA, Mathias BERSWEILER, Hiroaki HONJO, Kyota WATANABE, Shunsuke FUKAMI, Fumihiro MATSUKURA, Kenchi ITO, Masaaki NIWA, Tetsuo ENDOH, Hideo OHNO
  • Publication number: 20170263854
    Abstract: A method of manufacturing a spintronics element from laminated layers. The method includes (a) forming a plurality of laminated layers in manufacturing equipment, (b) forming a wafer in the manufacturing equipment, including applying a protection layer directly on a non-magnetic uppermost layer of the laminated layers so that the protection layer prevents alteration of characteristics of the uppermost layer, and (c) exposing the wafer, outside of the manufacturing equipment, to an atmosphere that includes H2O having a partial pressure in the atmosphere equal to or larger than 10?4 Pa.
    Type: Application
    Filed: March 8, 2016
    Publication date: September 14, 2017
    Applicant: TOHOKU UNIVERSITY
    Inventors: Soshi SATO, Masaaki NIWA, Hiroaki HONJO, Shoji IKEDA, Hideo OHNO, Tetsuo ENDO
  • Patent number: 9199536
    Abstract: An on-vehicle display device 1 displays a video around a vehicle and travel information of the vehicle on a single display unit 20. The on-vehicle display device 1 includes video display enable/disable input units 11, 12, 13, and 14 inputting display enable/disable of the video around the vehicle, display modification units 30 and 40 modifying the display size of each of a video display section and a travel information display section on the basis of the input video display enable/disable, and an input prediction unit 30 predicting input of display enable/disable of the video around the vehicle. Even when video display disable is input from a video display enable/disable input unit, if the input prediction unit 30 predicts input of video display enable, the display modification units 30 and 40 do not modify the display size of each of the video display section and the travel information display section.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: December 1, 2015
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Takahiko Murano, Kunihiko Toyofuku, Takeshi Tottori, Makoto Inomata, Masaaki Niwa, Naoyuki Aoki
  • Patent number: 8450882
    Abstract: An energization control apparatus includes a control portion, a disconnection detecting portion, and a prohibiting portion. The control portion controls energization to a plurality of loads coupled in parallel. The disconnection detecting portion repeatedly or continuously determines whether a supply current to the plurality of loads is less than a threshold value when the control portion energizes the plurality of loads, and the disconnection detecting portion detects a disconnection of a part of the plurality of loads when the supply current is less than the threshold value. The prohibiting portion prohibits a disconnection detection by the disconnection detecting portion for a predetermined period since the control portion starts to energize the plurality of loads, and the prohibiting portion enables the disconnection detection by the disconnection detecting portion after the predetermined period elapses.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: May 28, 2013
    Assignee: Denso Corporation
    Inventors: Teruyuki Anjima, Masaaki Niwa, Hiroaki Ikenaga, Takashi Mizutani
  • Patent number: 8400099
    Abstract: A meter system includes: an indicator including a pointer, a step motor, a stopper mechanism and a driving controller; and a flasher function unit including a flasher switch, a flasher and a flasher controller. The driving controller has: a stopper position detection operation executing element for executing a pointer moving away operation when a stopper position detection operation executing condition is satisfied and for executing a voltage detection type zero point stopper position detection operation when the executing condition is satisfied, and the flasher switch does not turn on and off, and a zero point return enforcement type zero point stopper position detection operation when the executing condition is satisfied, and the flasher switch turns on and off; a zero point setting element; and an applying element for applying the driving signal having the zero point.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: March 19, 2013
    Assignee: Denso Corporation
    Inventors: Hideyuki Nakane, Masaaki Niwa, Takashi Mizutani, Hironori Watarai, Teruyuki Anjima
  • Publication number: 20110215653
    Abstract: An energization control apparatus includes a control portion, a disconnection detecting portion, and a prohibiting portion. The control portion controls energization to a plurality of loads coupled in parallel. The disconnection detecting portion repeatedly or continuously determines whether a supply current to the plurality of loads is less than a threshold value when the control portion energizes the plurality of loads, and the disconnection detecting portion detects a disconnection of a part of the plurality of loads when the supply current is less than the threshold value. The prohibiting portion prohibits a disconnection detection by the disconnection detecting portion for a predetermined period since the control portion starts to energize the plurality of loads, and the prohibiting portion enables the disconnection detection by the disconnection detecting portion after the predetermined period elapses.
    Type: Application
    Filed: February 24, 2011
    Publication date: September 8, 2011
    Applicant: DENSO CORPORATION
    Inventors: Teruyuki Anjima, Masaaki Niwa, Hiroaki Ikenaga, Takashi Mizutani
  • Patent number: 7956413
    Abstract: In a method for manufacturing a semiconductor device having an N-channel field effect transistor, the N-channel field effect transistor is formed by a process including the steps of forming a high dielectric constant gate insulating film on a substrate, forming a gate electrode on the high dielectric constant gate insulating film, forming an extension region by introducing N-type impurities into the substrate by using at least the gate electrode as a mask, and forming a pocket region by introducing P-type impurities under the extension region in the substrate by using at least the gate electrode as a mask. An amount of arsenic (As) that is introduced as the N-type impurities is in a range that is equal to or lower than a prescribed value that is determined based on a thickness of the high dielectric constant gate insulating film.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: June 7, 2011
    Assignee: Panasonic Corporation
    Inventors: Yoshinao Harada, Shigenori Hayashi, Masaaki Niwa
  • Publication number: 20110100290
    Abstract: A meter system includes: an indicator including a pointer, a step motor, a stopper mechanism and a driving controller; and a flasher function unit including a flasher switch, a flasher and a flasher controller. The driving controller has: a stopper position detection operation executing element for executing a pointer moving away operation when a stopper position detection operation executing condition is satisfied and for executing a voltage detection type zero point stopper position detection operation when the executing condition is satisfied, and the flasher switch does not turn on and off, and a zero point return enforcement type zero point stopper position detection operation when the executing condition is satisfied, and the flasher switch turns on and off; a zero point setting element; and an applying element for applying the driving signal having the zero point.
    Type: Application
    Filed: October 27, 2010
    Publication date: May 5, 2011
    Applicant: DENSO CORPORATION
    Inventors: Hideyuki Nakane, Masaaki Niwa, Takashi Mizutani, Hironori Watarai, Teruyuki Anjima
  • Patent number: 7851297
    Abstract: A dual workfunction semiconductor device which comprises a first and second control electrode comprising a metal-semiconductor compound, e.g. a silicide or a germanide, and a dual workfunction semiconductor device thus obtained are disclosed. In one aspect, the method comprises forming a blocking region for preventing diffusion of metal from the metal-semiconductor compound of the first control electrode to the metal-semiconductor compound of the second control electrode, the blocking region being formed at a location where an interface between the first and second control electrodes is to be formed or is formed. By preventing metal to diffuse from the one to the other control electrode the constitution of the metal-semiconductor compounds of the first and second control electrodes may remain substantially unchanged during e.g. thermal steps in further processing of the device.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: December 14, 2010
    Assignee: IMEC
    Inventors: Stefan Jakschik, Jorge Adrian Kittl, Marcus Johannes Henricus van Dal, Anne Lauwers, Masaaki Niwa
  • Publication number: 20100208072
    Abstract: An on-vehicle display device 1 displays a video around a vehicle and travel information of the vehicle on a single display unit 20. The on-vehicle display device 1 includes video display enable/disable input units 11, 12, 13, and 14 inputting display enable/disable of the video around the vehicle, display modification units 30 and 40 modifying the display size of each of a video display section and a travel information display section on the basis of the input video display enable/disable, and an input prediction unit 30 predicting input of display enable/disable of the video around the vehicle. Even when video display disable is input from a video display enable/disable input unit, if the input prediction unit 30 predicts input of video display enable, the display modification units 30 and 40 do not modify the display size of each of the video display section and the travel information display section.
    Type: Application
    Filed: August 28, 2008
    Publication date: August 19, 2010
    Applicants: Toyota Jidosha Kabushiki Kaisha, Denso Corporation
    Inventors: Takahiko Murano, Kunihiko Toyofuku, Takeshi Tottori, Makoto Inomata, Masaaki Niwa, Naoyuki Aoki
  • Publication number: 20090242983
    Abstract: In a method for manufacturing a semiconductor device having an N-channel field effect transistor, the N-channel field effect transistor is formed by a process including the steps of forming a high dielectric constant gate insulating film on a substrate, forming a gate electrode on the high dielectric constant gate insulating film, forming an extension region by introducing N-type impurities into the substrate by using at least the gate electrode as a mask, and forming a pocket region by introducing P-type impurities under the extension region in the substrate by using at least the gate electrode as a mask. An amount of arsenic (As) that is introduced as the N-type impurities is in a range that is equal to or lower than a prescribed value that is determined based on a thickness of the high dielectric constant gate insulating film.
    Type: Application
    Filed: June 4, 2009
    Publication date: October 1, 2009
    Applicant: Panasonic Corporation
    Inventors: Yoshinao HARADA, Shigenori Hayashi, Masaaki Niwa