Patents by Inventor Masaaki Niwa
Masaaki Niwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5886389Abstract: A field-effect transistor includes a semiconductor substrate including a source region, a drain region and a channel region located between the source and drain regions; a gate insulating film formed on at least the channel region of the semiconductor substrate; and a gate electrode formed on the gate insulating film. The surface the semiconductor substrate includes a plural of terraces having crystallographically smooth planes and at least one step located in a boundary portion of the plurality of terraces. The step extends substantially along a channel length direction.Type: GrantFiled: May 30, 1996Date of Patent: March 23, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Masaaki Niwa
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Patent number: 5739544Abstract: By etching, a first groove and a second groove are formed in a silicon substrate. Surfaces of the side walls of these grooves have a surface orientation of (111). The first and second grooves sandwich a silicon thin plate therebetween, which is formed as a part of the silicon substrate. The silicon thin plate is sufficiently thin so as to act as a quantum well. Further, a pair of silicon oxide films acting as tunneling barriers are formed on the surfaces of the side walls of the silicon thin plate, thus forming a double barrier structure. In addition, a pair of polysilicon electrodes are formed and sandwich the double barrier structure. As a result, the structure of a resonance tunneling diode, which utilizes the resonance tunneling effect, is provided. Adding a third electrode to the above structure provides a resonance tunneling transistor.Type: GrantFiled: December 12, 1995Date of Patent: April 14, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Koichiro Yuki, Yoshihiko Hirai, Kiyoshi Morimoto, Masaaki Niwa, Juro Yasui, Kenji Okada, Masaharu Udagawa, Kiyoyuki Morita
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Patent number: 5562802Abstract: A quantum device including a plate-like conductor part having a necking portion and a method of producing the same are disclosed.Type: GrantFiled: April 10, 1995Date of Patent: October 8, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kenji Okada, Kiyoshi Morimoto, Masaharu Udagawa, Koichiro Yuki, Masaaki Niwa, Yoshihiko Hirai, Juro Yasui
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Patent number: 5543351Abstract: A silicon substrate comprises at least two surfaces extending substantially along respective crystal faces of (111) crystal orientation of the silicon, the crystal faces of (111) crystal orientation crossing with each other, an electrically insulating layer formed by oxidizing the silicon substrate from the surfaces, and an electrically conductive portion insulated electrically by the electrically insulating layer from an outside of the silicon substrate.Type: GrantFiled: October 31, 1994Date of Patent: August 6, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihiko Hirai, Kiyoshi Morimoto, Yasuaki Terui, Masaaki Niwa, Juro Yasui, Kenji Okada, Masaharu Udagawa, Koichiro Yuki
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Patent number: 5514614Abstract: By etching, a first groove and a second groove are formed in a silicon substrate. Surfaces of the side walls of these grooves have a surface orientation of (111). The first and second grooves sandwich a silicon thin plate therebetween, which is formed as a part of the silicon substrate. The silicon thin plate is sufficiently thin so as to act as a quantum well. Further, a pair of silicon oxide films acting as tunneling barriers are formed on the surfaces of the side walls of the silicon thin plate, thus forming a double barrier structure. In addition, a pair of polysilicon electrodes are formed and sandwich the double barrier structure. As a result, the structure of a resonance tunneling diode, which utilizes the resonance tunneling effect, is provided. Adding a third electrode to the above structure provides a hot electron transistor.Type: GrantFiled: April 13, 1995Date of Patent: May 7, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Koichiro Yuki, Yoshihiko Hirai, Koyoshi Morimoto, Masaaki Niwa, Juro Yasui, Kenji Okada, Masaharu Udagawa
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Patent number: 5486706Abstract: By etching, a first groove and a second groove are formed in a silicon substrate. Surfaces of the side walls of these grooves have a surface orientation of (111). The first and second grooves sandwich a silicon thin plate therebetween, which is formed as a part of the silicon substrate. The silicon thin plate is sufficiently thin so as to act as a quantum well. Further, a pair of silicon oxide films acting as tunneling barriers are formed on the surfaces of the side walls of the silicon thin plate, thus forming a double barrier structure. In addition, a pair of polysilicon electrodes are formed and sandwich the double barrier structure. As a result, the structure of a resonance tunneling diode, which utilizes the resonance tunneling effect, is provided. Adding a third electrode to the above structure provides a hot electron transistor.Type: GrantFiled: May 26, 1994Date of Patent: January 23, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Koichiro Yuki, Yoshihiko Hirai, Kiyoshi Morimoto, Masaaki Niwa, Juro Yasui, Kenji Okada, Masaharu Udagawa
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Patent number: 5480492Abstract: For removing an unnecessary substance on a silicon substrate surface, a temperature of the unnecessary substance on the silicon substrate surface is not less than 750.degree. C. when the unnecessary substance is exposed to a gas including ozone.Type: GrantFiled: October 15, 1993Date of Patent: January 2, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masaharu Udagawa, Juro Yasui, Masaaki Niwa, Yoshihiko Hirai, Kenji Okada, Kiyoshi Morimoto, Koichiro Yuki
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Patent number: 5444267Abstract: A quantum device including a plate-like conductor part having a necking portion made by forming a first mask layer having a first strip portion on a conductor substrate; forming a second mask layer having a second strip portion on the conductor substrate; etching a region of the conductor substrate which is not covered with the first and second mask layers, by using the first and second mask layers as an etching mask, to form a plurality of first recess portions on a surface of the conductor substrate; selectively covering side faces of the plurality of first recess portions, and side faces of the first and second mask layers with a side wall film; selectively removing only the second mask layer; etching another region of the conductor substrate which is not covered with the first mask layer and the side wall film, by using the first mask layer and the side wall film as an etching mask, to form a plurality of second recess portions on the surface of the conductor substrate; selectively removing part of anotheType: GrantFiled: October 28, 1994Date of Patent: August 22, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kenji Okada, Kiyoshi Morimoto, Masaharu Udagawa, Koichiro Yuki, Masaaki Niwa, Yoshihiko Hirai, Juro Yasui
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Patent number: 5422306Abstract: A method is disclosed of forming semiconductor hetero interfaces that will contribute to the performance improvement of devices having semiconductor hetero interfaces such as MOS transistors, quantum devices, capacitors and the like. The method comprises the steps of making the surface of a semiconductor substrate clean and flat in terms of atomic level by heating said semiconductor substrate in vacuum to a temperature at which reconstruction of the surface atoms of said semiconductor substrate takes place, then forming a structural buffer layer such as a native oxide layer and the like on said semiconductor substrate surface after the temperature of said semiconductor substrate was lowered to room temperature and finally subjecting the semiconductor substrate with said structural buffer layer formed on its surface to a thermal treatment performed in certain specified temperature and atmosphere.Type: GrantFiled: December 15, 1992Date of Patent: June 6, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masaaki Niwa, Masaharu Udagawa, Yoshihiko Hirai, Juurou Yasui
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Patent number: 5405454Abstract: A silicon substrate comprises, at least two surfaces extending substantially along respective crystal faces of (111) crystal orientation of the silicon, the crystal faces of (111) crystal orientation crossing with each other, an electrically insulating layer formed by oxidizing the silicon substrate from the surfaces, and an electrically conductive portion insulated electrically by the electrically insulating layer from an outside of the silicon substrate.Type: GrantFiled: March 12, 1993Date of Patent: April 11, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihiko Hirai, Kiyoshi Morimoto, Yasuaki Terui, Masaaki Niwa, Juro Yasui, Kenji Okada, Masaharu Udagawa, Koichiro Yuki
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Patent number: 5347140Abstract: A resonant electron transfer device includes a plurality of units each of which has of at least one one-dimensional quantum wire having a quantum well elongated in a direction, a zero-dimensional quantum dot having a base quantization level higher than that of the one-dimensional quantum wire an electrode for controlling respective internal levels of the quantum wire and dot wherein the quantum wire and dot forming one unit is connected via a potential barrier capable of exhibiting a tunnel effect therebetween.Type: GrantFiled: August 27, 1992Date of Patent: September 13, 1994Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihiko Hirai, Kiyoshi Morimoto, Yasuaki Terui, Atsuo Wada, Kenji Okada, Juro Yasui, Masaaki Niwa
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Patent number: 5296719Abstract: A quantum wire is formed at the top of triangular protrusion of silicon substrate. A quantum wire is isolated from the substrate by silicon oxide layers. A quantum wire is isolated from the substrate by impurity layers of a conduction type different from that of the substrate. An insulator film and a gate electrode are formed at the edge of triangular protrusion of a silicon substrate, and a quantum wire is induced by applying a voltage to the gate electrode. A quantum wire structure is fabricated by forming saw-tooth-like protrusions having (111) side planes by performing anisotropic crystalline etching and by oxidizing the silicon substrate with use of the oxide protection film to remain only around the top of the protrusions unoxidized. In another method, an oxide film is formed except around the top of the protrusions whereby a quantum wire is formed at the unoxidized region. In a different method, impurity layers are formed except around the top of the protrusions by ion implantation.Type: GrantFiled: July 20, 1992Date of Patent: March 22, 1994Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihiko Hirai, Juro Yasui, Yasuaki Terui, Kiyoshi Morimoto, Atsuo Wada, Kenji Okada, Shin Hashimoto, Shinji Odanaka, Masaaki Niwa, Kaoru Inoue
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Patent number: 5244828Abstract: The method of fabricating a quantum device of the invention includes the steps of: forming a quantum dot having side faces on a first insulating layer; forming a second insulating layer which can function as a tunnel film, on at least the side faces of the quantum dot; depositing a non-crystal semiconductor layer on the first insulating layer so as to cover the quantum dot; removing at least a portion of the non-crystal semiconductor layer which is positioned above the quantum dot; single-crystallizing a predetermined portion of the non-crystal semiconductor layer which is in contact with the second insulating layer; and forming a quantum wire which includes the single-crystallized semiconductor portion and the quantum dot, on the first insulating layer.Type: GrantFiled: August 25, 1992Date of Patent: September 14, 1993Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kenji Okada, Yasuaki Terui, Juro Yasui, Yoshihiko Hirai, Masaaki Niwa, Atsuo Wada, Kiyoshi Morimoto
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Patent number: 5182452Abstract: There is provided a method for determining the presence of an insulating film on the surface of an electrically conductive material. In this method, an electrically conductive probe is brought into contact with the surface of a specimen, and a voltage is applied between the probe and the surface of the specimen. A tunneling current which flows through the probe is detected and amplified, while controlling the distance between the probe and the surface of the specimen to ensure a substantially constant tunneling current.Type: GrantFiled: October 15, 1991Date of Patent: January 26, 1993Assignee: Matsushita Electric Industrial Co. Ltd.Inventors: Masaaki Niwa, Shozo Okada