Patents by Inventor Masahiko Hayakawa

Masahiko Hayakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200194593
    Abstract: When a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, and an oxide semiconductor film are stacked and a source and drain electrode layers are provided in contact with the oxide semiconductor film is manufactured, after the formation of the gate electrode layer or the source and drain electrode layers by an etching step, a step of removing a residue remaining by the etching step and existing on a surface of the gate electrode layer or a surface of the oxide semiconductor film and in the vicinity of the surface is performed. The surface density of the residue on the surface of the oxide semiconductor film or the gate electrode layer can be 1×1013 atoms/cm2 or lower.
    Type: Application
    Filed: December 31, 2019
    Publication date: June 18, 2020
    Inventors: Shunpei YAMAZAKI, Masahiko HAYAKAWA, Tatsuya HONDA
  • Patent number: 10680049
    Abstract: The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds times longer than that of the existing one, and thereby allowing turning to an on-state at a gate voltage particularly higher than the existing one and driving, and allowing having a low channel conductance gd. According to the present invention, not only the simple dispersion of on-current but also the normalized dispersion thereof can be reduced, and other than the reduction of the dispersion between the individual TFTs, the dispersion of the OLEDs themselves and the dispersion due to the deterioration of the OLED can be reduced.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: June 9, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Makoto Udagawa, Masahiko Hayakawa, Jun Koyama, Mitsuaki Osame, Aya Anzai
  • Publication number: 20200135770
    Abstract: A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.
    Type: Application
    Filed: December 23, 2019
    Publication date: April 30, 2020
    Inventors: Atsuo ISOBE, Shunpei YAMAZAKI, Koji DAIRIKI, Hiroshi SHIBATA, Chiho KOKUBO, Tatsuya ARAO, Masahiko HAYAKAWA, Hidekazu MIYAIRI, Akihisa SHIMOMURA, Koichiro TANAKA, Mai AKIBA
  • Patent number: 10599068
    Abstract: A developing device includes a developer cartridge and a developing unit. The developer cartridge, in some instances, may include a shutter. This shutter may have a wall for closing a developer supply hole, and be movable, with respect to a developer cartridge casing, between an open position where the supply hole is opened by the wall and a closed position where the supply hole is closed by the wall. The shutter may further include a protrusion that is movable with respect to the wall of the shutter between a first position and a second position in an axial direction. The protrusion, in the first position, is engageable with a developing unit and, in the second position, would be disengaged from the developing unit.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: March 24, 2020
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Masahiko Hayakawa, Masashi Imai, Shougo Sato
  • Patent number: 10580373
    Abstract: To reduce power consumption of a display device with the use of a simple structure and a simple operation. The display device includes an input device. Input of an image signal to a driver circuit is controlled in accordance with an image operation signal output from the input device. Specifically, input of image signals at the time when the input device is not operated is less frequent than that at the time when the input device is operated. Accordingly, display degradation (deterioration of display quality) caused when the display device is used can be prevented and power consumed when the display device is not used can be reduced.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: March 3, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenichi Wakimoto, Masahiko Hayakawa
  • Patent number: 10546759
    Abstract: To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: January 28, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Toshimitsu Obonai, Junichi Koezuka, Yukinori Shima, Masahiko Hayakawa, Takashi Hamochi, Suzunosuke Hiraishi
  • Patent number: 10535776
    Abstract: When a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, and an oxide semiconductor film are stacked and a source and drain electrode layers are provided in contact with the oxide semiconductor film is manufactured, after the formation of the gate electrode layer or the source and drain electrode layers by an etching step, a step of removing a residue remaining by the etching step and existing on a surface of the gate electrode layer or a surface of the oxide semiconductor film and in the vicinity of the surface is performed. The surface density of the residue on the surface of the oxide semiconductor film or the gate electrode layer can be 1×1013 atoms/cm2 or lower.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: January 14, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Tatsuya Honda
  • Patent number: 10515983
    Abstract: A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: December 24, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Shunpei Yamazaki, Koji Dairiki, Hiroshi Shibata, Chiho Kokubo, Tatsuya Arao, Masahiko Hayakawa, Hidekazu Miyairi, Akihisa Shimomura, Koichiro Tanaka, Mai Akiba
  • Publication number: 20190378861
    Abstract: A display device including a semiconductor element is provided.
    Type: Application
    Filed: June 19, 2019
    Publication date: December 12, 2019
    Inventors: Satoshi MURAKAMI, Masahiko HAYAKAWA, Shunpei YAMAZAKI
  • Publication number: 20190355591
    Abstract: To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.
    Type: Application
    Filed: July 29, 2019
    Publication date: November 21, 2019
    Inventors: Shunpei YAMAZAKI, Yasuharu HOSAKA, Toshimitsu OBONAI, Junichi KOEZUKA, Yukinori SHIMA, Masahiko HAYAKAWA, Takashi HAMOCHI, Suzunosuke HIRAISHI
  • Patent number: 10475819
    Abstract: A semiconductor device which includes an oxide semiconductor and in which formation of a parasitic channel due to a gate BT stress is suppressed is provided. Further, a semiconductor device including a transistor having excellent electrical characteristics is provided. The semiconductor device includes a transistor having a dual-gate structure in which an oxide semiconductor film is provided between a first gate electrode and a second gate electrode; gate insulating films are provided between the oxide semiconductor film and the first gate electrode and between the oxide semiconductor film and the second gate electrode; and in the channel width direction of the transistor, the first or second gate electrode faces a side surface of the oxide semiconductor film with the gate insulating film between the oxide semiconductor film and the first or second gate electrode.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: November 12, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroyuki Miyake, Kenichi Okazaki, Masahiko Hayakawa, Shinpei Matsuda
  • Publication number: 20190341404
    Abstract: A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.
    Type: Application
    Filed: July 18, 2019
    Publication date: November 7, 2019
    Inventors: Atsuo ISOBE, Shunpei YAMAZAKI, Koji DAIRIKI, Hiroshi SHIBATA, Chiho KOKUBO, Tatsuya ARAO, Masahiko HAYAKAWA, Hidekazu MIYAIRI, Akihisa SHIMOMURA, Koichiro TANAKA, Mai AKIBA
  • Patent number: 10461140
    Abstract: The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds times longer than that of the existing one, and thereby allowing turning to an on-state at a gate voltage particularly higher than the existing one and driving, and allowing having a low channel conductance gd. According to the present invention, not only the simple dispersion of on-current but also the normalized dispersion thereof can be reduced, and other than the reduction of the dispersion between the individual TFTs, the dispersion of the OLEDs themselves and the dispersion due to the deterioration of the OLED can be reduced.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: October 29, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Makoto Udagawa, Masahiko Hayakawa, Jun Koyama, Mitsuaki Osame, Aya Anzai
  • Patent number: 10365514
    Abstract: An active matrix liquid crystal display device including a counter substrate and an element substrate firmly attached with each other with a sealant, and a liquid crystal layer between the counter substrate and the element substrate is provided. The counter substrate is provided with at least a resin layer. An outer end portion of the resin layer is not exposed to the outside atmosphere. The resin layer and the sealant at least partly overlap with each other when seen from a cross section of the liquid crystal display device. A moisture impermeable layer is formed between the resin layer and the sealant.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: July 30, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Kubota, Yoshiharu Hirakata, Masahiko Hayakawa
  • Patent number: 10361222
    Abstract: A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formulation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: July 23, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Shunpei Yamazaki, Koji Dairiki, Hiroshi Shibata, Chiho Kokubo, Tatsuya Arao, Masahiko Hayakawa, Hidekazu Miyairi, Akihisa Shimomura, Koichiro Tanaka, Mai Akiba
  • Publication number: 20190221628
    Abstract: The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds times longer than that of the existing one, and thereby allowing turning to an on-state at a gate voltage particularly higher than the existing one and driving, and allowing having a low channel conductance gd. According to the present invention, not only the simple dispersion of on-current but also the normalized dispersion thereof can be reduced, and other than the reduction of the dispersion between the individual TFTs, the dispersion of the OLEDs themselves and the dispersion due to the deterioration of the OLED can be reduced.
    Type: Application
    Filed: March 20, 2019
    Publication date: July 18, 2019
    Inventors: Makoto Udagawa, Masahiko Hayakawa, Jun Koyama, Mitsuaki Osame, Aya Anzai
  • Publication number: 20190221627
    Abstract: The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds times longer than that of the existing one, and thereby allowing turning to an on-state at a gate voltage particularly higher than the existing one and driving, and allowing having a low channel conductance gd. According to the present invention, not only the simple dispersion of on-current but also the normalized dispersion thereof can be reduced, and other than the reduction of the dispersion between the individual TFTs, the dispersion of the OLEDs themselves and the dispersion due to the deterioration of the OLED can be reduced.
    Type: Application
    Filed: March 20, 2019
    Publication date: July 18, 2019
    Inventors: Makoto Udagawa, Masahiko Hayakawa, Jun Koyama, Mitsuaki Osame, Aya Anzai
  • Publication number: 20190155192
    Abstract: A developing device includes a developer cartridge and a developing unit. The developer cartridge, in some instances, may include a shutter. This shutter may have a wall for closing a developer supply hole, and be movable, with respect to a developer cartridge casing, between an open position where the supply hole is opened by the wall and a closed position where the supply hole is closed by the wall. The shutter may further include a protrusion that is movable with respect to the wall of the shutter between a first position and a second position in an axial direction. The protrusion, in the first position, is engageable with a developing unit and, in the second position, would be disengaged from the developing unit.
    Type: Application
    Filed: January 25, 2019
    Publication date: May 23, 2019
    Inventors: Masahiko Hayakawa, Masashi Imai, Shougo Sato
  • Patent number: 10275190
    Abstract: In an image forming apparatus, a plurality of light emitting portions arrayed in an array direction. A lens array has a length in the array direction longer than a length in a direction orthogonal to the array direction. A controller is configured to perform: converting a reference printing pattern including a plurality of first linear patterns to a detection pattern including a plurality of second linear patterns, each of the plurality of first linear patterns forming a first angle with respect to a reference line parallel to the array direction, each of the plurality of second linear patterns forming a second angle smaller than the first angle with respect to the reference line; forming a detection pattern image on a transfer medium; detecting a print density of the detection pattern image with a sensor; and setting an image formation condition according to the print density detected by the sensor.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: April 30, 2019
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Kensuke Miyahara, Masahiko Hayakawa, Toshio Furukawa, Junichi Yokoi
  • Patent number: 10222723
    Abstract: A developing device includes a developer cartridge and a developing unit. The developer cartridge, in some instances, may include a shutter. This shutter may have a wall for closing a developer supply hole, and be movable, with respect to a developer cartridge casing, between an open position where the supply hole is opened by the wall and a closed position where the supply hole is closed by the wall. The shutter may further include a protrusion that is movable with respect to the wall of the shutter between a first position and a second position in an axial direction. The protrusion, in the first position, is engageable with a developing unit and, in the second position, would be disengaged from the developing unit.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: March 5, 2019
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Masahiko Hayakawa, Masashi Imai, Shougo Sato