Patents by Inventor Masahiko Kuraguchi

Masahiko Kuraguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230022819
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, a nitride region, and a first insulating member. The third electrode includes a first electrode portion. The first electrode portion is between the first electrode and the second electrode. The first semiconductor region includes first to sixth partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial regions. The sixth partial region is between the fifth and second partial regions. The second semiconductor region includes first and second semiconductor portions. The second semiconductor portion is in contact with the fifth partial region. The nitride region includes a first nitride portion being in contact with the sixth partial region. The first insulating member includes a first insulating region between the third partial region and the first electrode portion.
    Type: Application
    Filed: February 23, 2022
    Publication date: January 26, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Masahiko KURAGUCHI
  • Publication number: 20230025093
    Abstract: According to one embodiment, a semiconductor device includes first, second, third nitride members, first, second, third electrodes, and a first insulating member. The first nitride member includes a first face along a first plane, a second face along the first plane, and a third face. The third face is connected with the first and second faces between the first and second faces. The third face crosses the first plane. The first face overlaps a part of the first nitride member. The second nitride member includes a first nitride region provided at the first face. The third nitride member includes a first nitride portion provided at the second face. The first electrode includes a first connecting portion. The second electrode includes a second connecting portion. The third electrode includes a first electrode portion. The first insulating member includes a first insulating region.
    Type: Application
    Filed: January 3, 2022
    Publication date: January 26, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Masahiko KURAGUCHI
  • Patent number: 11563115
    Abstract: According to the embodiment of the invention, the semiconductor device includes a semiconductor member, a first electrode, a second electrode, a third electrode, a first conductive member, and a first insulating member. The first semiconductor member includes a first semiconductor region, a second semiconductor region, and a third semiconductor region. The second semiconductor region includes one of a first material and a second material. The third semiconductor region is provided between at least a part of the first semiconductor region and the second semiconductor region. The first electrode is electrically connected with the first semiconductor region. The second electrode is electrically connected with the second semiconductor region. At least a part of the third semiconductor region is between an other portion of the third electrode and the first conductive member. At least a part of the first insulating member is between the third electrode and the semiconductor member.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: January 24, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Matthew David Smith, Akira Mukai, Masahiko Kuraguchi
  • Patent number: 11563114
    Abstract: According to one embodiment, a semiconductor device includes first, second, third electrodes, a semiconductor member, and a first compound member. The third electrode is between the first and second electrodes in a first direction from the first to second electrodes. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first, second, third, fourth, and fifth partial regions. A second direction from the first partial region to the first electrode crosses the first direction. The fourth partial region is between the first and third partial regions in the first direction. The fifth partial region is between the third and second partial regions in the first direction. The second semiconductor region includes first and second semiconductor portions. The first compound member includes first, second and third compound regions.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: January 24, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Matthew David Smith, Hiroshi Ono, Yosuke Kajiwara, Akira Mukai, Masahiko Kuraguchi
  • Publication number: 20230006058
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, and a first insulating member. The third electrode is between the first and second electrodes. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first to fifth partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial regions. The second semiconductor region includes first and second semiconductor portions. The first insulating member includes first to third insulating regions. The fourth partial region includes a first facing region. The fifth partial region includes a second facing region. The first facing region includes a first element. The second facing region does not include the first element, or a concentration of the first element in the second facing region is lower than in the first facing region.
    Type: Application
    Filed: February 23, 2022
    Publication date: January 5, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Masahiko KURAGUCHI
  • Patent number: 11545553
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: January 3, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Hiroshi Ono, Jumpei Tajima, Masahiko Kuraguchi, Shinya Nunoue
  • Publication number: 20220393006
    Abstract: According to one embodiment, a semiconductor device includes first, second, third electrodes, first, and second semiconductor regions, a first conductive member, and an insulating member. The third electrode is between the first and second electrodes. The first semiconductor region includes first to sixth partial regions. The second semiconductor region includes first to third semiconductor portions. The first conductive member is electrically connected with a first one of the first and third electrodes. The first conductive member includes a first conductive end portion. The insulating member includes first and second nitride regions. The second semiconductor portion is between the fifth partial region and the first nitride region. The third semiconductor portion is between the sixth partial region and the second nitride region. The first nitride region includes a first nitride end portion. The first nitride end portion is in contact with the second semiconductor region.
    Type: Application
    Filed: February 2, 2022
    Publication date: December 8, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Aya SHINDOME, Yosuke KAJIWARA, Masahiko KURAGUCHI
  • Patent number: 11515411
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, a nitride layer, and an oxide layer. A direction from the second electrode toward the first electrode is aligned with a first direction. A position in the first direction of the third electrode is between the first electrode and the second electrode in the first direction. The first semiconductor layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions in the first direction. The second partial region is between the third and fifth partial regions in the first direction. The nitride layer includes first and second nitride regions. The second semiconductor layer includes first and second semiconductor regions. The oxide layer includes silicon and oxygen. The oxide layer includes first to third oxide regions.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: November 29, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yosuke Kajiwara, Daimotsu Kato, Masahiko Kuraguchi
  • Publication number: 20220336630
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor member, a first conductive member, a first electrode, a first insulating member, and a second insulating member. The semiconductor member includes a first partial region, a second partial region, and a third partial region. The first partial region is between the second partial region the third partial region. The first conductive member includes a first conductive portion. The first conductive portion is between the second partial region and the third partial region. The first electrode is electrically connected to the first conductive member. The first electrode includes a first electrode portion, a second electrode portion, and a third electrode portion. The first insulating member includes a first insulating region, a second insulating region, and a third insulating region. The second insulating member includes a first insulating portion and a second insulating portion.
    Type: Application
    Filed: November 10, 2021
    Publication date: October 20, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroshi ONO, Yosuke KAJIWARA, Masahiko KURAGUCHI
  • Patent number: 11476358
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, and an insulating member. The third electrode in a first direction is between the first and second electrodes in the first direction. The first direction is from the first toward second electrode. The first semiconductor layer includes Alx1Ga1-x1N (0?x1<1), and first to sixth partial regions. A second direction from the first partial region toward the first electrode crosses the first direction. The second semiconductor layer includes Alx2Ga1-x2N (0<x2<1 and x1<x2), and first and second semiconductor regions. A direction from the fourth partial region toward the first semiconductor region is along the second direction. A direction toward the second semiconductor region from the fifth and sixth partial regions is along the second direction. The insulating member includes first to third insulating regions.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: October 18, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Kajiwara, Aya Shindome, Masahiko Kuraguchi
  • Patent number: 11476336
    Abstract: According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, and a first compound member. A position of the third electrode is between a position of the second electrode and a position of the first electrode. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. The fourth partial region is between the third and first partial regions. The fifth partial region is between the second and third partial regions. The second semiconductor layer includes first, second, and third semiconductor regions. The third semiconductor region is between the first partial region and the first electrode. The first compound member includes first compound portions between the third semiconductor region and the first electrode. A portion of the first electrode is between one of the first compound portions and an other one of the first compound portions.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: October 18, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Ono, Akira Mukai, Yosuke Kajiwara, Daimotsu Kato, Aya Shindome, Masahiko Kuraguchi
  • Publication number: 20220310797
    Abstract: The nitride-based semiconductor device includes a carrier traveling layer 1 composed of non-doped AlxGa1-xN (0?X<1); a barrier layer 2 formed on the carrier traveling layer 1 and composed of non-doped or n-type AlYGa1-YN (0<Y?1, X<Y) having a lattice constant smaller than that of the carrier traveling layer 1; a threshold voltage control layer 3 formed on the barrier layer 2 and composed of a non-doped semiconductor having a lattice constant equal to that of the carrier traveling layer 1; and a carrier inducing layer 4 formed on the threshold voltage control layer 3 and composed of a non-doped or n-type semiconductor having a lattice constant smaller than that of the carrier traveling layer 1. The nitride-based semiconductor device further includes a gate electrode 5 formed in a recess structure, a source electrode 6 and a drain electrode 7.
    Type: Application
    Filed: June 15, 2022
    Publication date: September 29, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masahiko Kuraguchi
  • Patent number: 11398473
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor member, a first gate electrode, a second gate electrode, a first control transistor part, a gate interconnect, and a control gate interconnect. The semiconductor member includes first and second semiconductor layers. The semiconductor member includes first and second regions, and a first control region. The first and second gate electrodes extend along a first direction. A direction from the first region toward at least a portion of the first gate electrode is along a second direction crossing the first direction. The first control transistor part includes a first control gate electrode and a first control drain electrode. The first control drain electrode is electrically connected to the first and second gate electrodes. The gate interconnect is electrically connected to the first and second gate electrodes. The control gate interconnect is electrically connected to the first control gate electrode.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: July 26, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masahiko Kuraguchi, Kentaro Ikeda
  • Publication number: 20220231155
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, first and second insulating members. The third electrode includes a first electrode portion. The first electrode portion is between the first electrode and the second electrode. The first semiconductor region includes first to fifth partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial regions. The second semiconductor region includes first and second semiconductor portions. The first insulating member includes a first insulating portion. The first insulating portion is between the third and first electrode portions. The second insulating member includes first and second insulating regions. The first insulating region is between the first electrode and the first electrode portion. The second insulating region is between the first insulating region and the first electrode portion.
    Type: Application
    Filed: August 10, 2021
    Publication date: July 21, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Hiroshi ONO, Daimotsu KATO, Akira MUKAI, Masahiko KURAGUCHI
  • Patent number: 11393904
    Abstract: The nitride-based semiconductor device includes a carrier traveling layer 1 composed of non-doped AlXGa1-XN (0?X<1); a barrier layer 2 formed on the carrier traveling layer 1 and composed of non-doped or n-type AlYGa1-YN (0<Y?1, X<Y) having a lattice constant smaller than that of the carrier traveling layer 1; a threshold voltage control layer 3 formed on the barrier layer 2 and composed of a non-doped semiconductor having a lattice constant equal to that of the carrier traveling layer 1; and a carrier inducing layer 4 formed on the threshold voltage control layer 3 and composed of a non-doped or n-type semiconductor having a lattice constant smaller than that of the carrier traveling layer 1. The nitride-based semiconductor device further includes a gate electrode 5 formed in a recess structure, a source electrode 6 and a drain electrode 7.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: July 19, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masahiko Kuraguchi
  • Publication number: 20220190150
    Abstract: According to one embodiment, a semiconductor device includes first, second, third electrodes, a semiconductor member, and a first compound member. The third electrode is between the first and second electrodes in a first direction from the first to second electrodes. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first, second, third, fourth, and fifth partial regions. A second direction from the first partial region to the first electrode crosses the first direction. The fourth partial region is between the first and third partial regions in the first direction. The fifth partial region is between the third and second partial regions in the first direction. The second semiconductor region includes first and second semiconductor portions. The first compound member includes first, second and third compound regions.
    Type: Application
    Filed: January 26, 2021
    Publication date: June 16, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Matthew David SMITH, Hiroshi ONO, Yosuke KAJIWARA, Akira MUKAI, Masahiko KURAGUCHI
  • Patent number: 11362653
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor member, a gate electrode, a source electrode, a drain electrode, a conductive member, a gate terminal, and a first circuit. The semiconductor member includes a first semiconductor layer including a first partial region and including Alx1Ga1?x1N (0?x1?1), and a second semiconductor layer including Alx2Ga1?x2N (0<x2?1 and x1<x2). The first partial region is between the gate electrode and at least a portion of the conductive member in a first direction. The gate terminal is electrically connected to the gate electrode. The first circuit is configured to apply a first voltage to the conductive member based on a gate voltage applied to the gate terminal. The first voltage has a reverse polarity of a polarity of the gate voltage.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: June 14, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masahiko Kuraguchi, Yosuke Kajiwara, Kentaro Ikeda
  • Patent number: 11355602
    Abstract: According to one embodiment, a semiconductor device includes first, second and third conductive parts, a first semiconductor region, and a first insulating part. A direction from the first conductive part toward the second conductive part is along a first direction. The first semiconductor region includes first, second, and third partial regions. A second direction from the first partial region toward the second partial region crosses the first direction. The third partial region is between the first partial region and the second conductive part in the first direction. The third partial region includes an opposing surface facing the second conductive part. A direction from the opposing surface toward the third conductive part is along the second direction. The first insulating part includes a first insulating region. At least a portion of the first insulating region is between the opposing surface and the third conductive part.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: June 7, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tomoaki Inokuchi, Hiro Gangi, Yusuke Kobayashi, Masahiko Kuraguchi, Kazuto Takao, Ryosuke Iijima, Tatsuo Shimizu, Tatsuya Nishiwaki
  • Publication number: 20220149194
    Abstract: According to the embodiment of the invention, the semiconductor device includes a semiconductor member, a first electrode, a second electrode, a third electrode, a first conductive member, and a first insulating member. The first semiconductor member includes a first semiconductor region, a second semiconductor region, and a third semiconductor region. The second semiconductor region includes one of a first material and a second material. The third semiconductor region is provided between at least a part of the first semiconductor region and the second semiconductor region. The first electrode is electrically connected with the first semiconductor region. The second electrode is electrically connected with the second semiconductor region. At least a part of the third semiconductor region is between an other portion of the third electrode and the first conductive member. At least a part of the first insulating member is between the third electrode and the semiconductor member.
    Type: Application
    Filed: January 15, 2021
    Publication date: May 12, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Matthew David SMITH, Akira MUKAI, Masahiko KURAGUCHI
  • Patent number: 11329135
    Abstract: According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, first and second insulating members, and a first member. The third electrode includes a first electrode portion. The first electrode portion is between the first and second electrodes. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial regions. The first insulating member includes first and second insulating regions. The second insulating member includes first and second insulating portions. The first insulating portion is between the fourth partial region and the first insulating region. The second insulating portion is between the fifth partial region and the second insulating region. The second semiconductor layer includes first, second, and third semiconductor portions.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: May 10, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Kajiwara, Masahiko Kuraguchi, Akira Mukai