Patents by Inventor Masahiko Kuraguchi

Masahiko Kuraguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967641
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes Alx1Ga1?x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1?x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1?x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.
    Type: Grant
    Filed: April 26, 2023
    Date of Patent: April 23, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Daimotsu Kato, Yosuke Kajiwara, Akira Mukai, Aya Shindome, Hiroshi Ono, Masahiko Kuraguchi
  • Publication number: 20240088109
    Abstract: According to one embodiment, a semiconductor device includes a first terminal, a second terminal, a third terminal, a first transistor of a normally-off type, a second transistor of a normally-on type, and a diode. The first transistor includes a first source, a first drain, and a first gate. The first source is electrically connected to the first terminal. The first drain is electrically connected to the second terminal. The first gate is electrically connected to the third terminal. The second transistor includes a second source, a second drain, and a second gate. The second drain is electrically connected to the second terminal. The second gate is electrically connected to the first terminal. The diode includes an anode and a cathode. The anode is electrically connected to the first terminal. The cathode is electrically connected to the second source.
    Type: Application
    Filed: February 21, 2023
    Publication date: March 14, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masahiko KURAGUCHI, Masahiro KOYAMA
  • Publication number: 20240047534
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor region, a second semiconductor region, a first layer, a second layer, and a first insulating layer. The third electrode includes a first electrode portion. The first semiconductor region includes Alx1Ga1-x1N (0?x1<1). The first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region and a fifth partial region. The second semiconductor region includes Alx2Ga1-x2N (x1<x2?1). The second semiconductor region includes a first semiconductor portion and a second semiconductor portion. The first layer includes Al and N. The first layer includes a first compound region. The second layer includes Al, Si, O and N. The second layer includes a first intermediate region. The first insulating layer includes Si and O.
    Type: Application
    Filed: February 22, 2023
    Publication date: February 8, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Hiroshi ONO, Daimotsu KATO, Aya SHINDOME, Masahiko KURAGUCHI
  • Patent number: 11894452
    Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer; an insulating layer; a first region disposed between the nitride semiconductor layer and the insulating layer and containing at least one element of hydrogen and deuterium; and a second region disposed in the nitride semiconductor layer, adjacent to the first region, and containing fluorine.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: February 6, 2024
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Masahiko Kuraguchi, Toshiya Yonehara, Akira Mukai
  • Publication number: 20240038849
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first nitride region, a second nitride region, and a third nitride region. The first nitride region includes Alx1Ga1-x1N (0?x1<1). The first nitride region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The second nitride region includes Alx2Ga1-x2N (x1<x2?1) or InyAlzGa(1-y-z)N (0<y?1, 0?z<1, y+z?1). The second nitride region includes a sixth partial region. The third nitride region includes Alx3Ga1-x3N (x1<x3<x2). The third nitride region includes a seventh partial region.
    Type: Application
    Filed: February 22, 2023
    Publication date: February 1, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Aya SHINDOME, Masahiko KURAGUCHI
  • Patent number: 11888040
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: January 30, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Hiroshi Ono, Jumpei Tajima, Masahiko Kuraguchi, Shinya Nunoue
  • Patent number: 11757028
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, a nitride layer, and an oxide layer. A direction from the second electrode toward the first electrode is aligned with a first direction. A position in the first direction of the third electrode is between the first electrode and the second electrode in the first direction. The first semiconductor layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions in the first direction. The second partial region is between the third and fifth partial regions in the first direction. The nitride layer includes first and second nitride regions. The second semiconductor layer includes first and second semiconductor regions. The oxide layer includes silicon and oxygen. The oxide layer includes first to third oxide regions.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: September 12, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yosuke Kajiwara, Daimotsu Kato, Masahiko Kuraguchi
  • Publication number: 20230268430
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes Alx1Ga1?x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1?x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1?x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.
    Type: Application
    Filed: April 26, 2023
    Publication date: August 24, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Daimotsu KATO, Yosuke KAJIWARA, Akira MUKAI, Aya SHINDOME, Hiroshi ONO, Masahiko KURAGUCHI
  • Publication number: 20230253487
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, a first insulating member, and a nitride member. The third electrode includes a first electrode portion. A position of the first electrode portion is between a position of the first electrode and a position of the second electrode. The first semiconductor region includes first to fifth partial regions. A position of the fourth partial region is between positions of the first and third partial regions. A position of the fifth partial region is between positions of the third and second partial regions. The second semiconductor region includes first and second semiconductor portions. The first electrode portion is located between the first and second semiconductor portions. The first insulating member includes first to third insulating regions. The nitride member includes first to third nitride regions.
    Type: Application
    Filed: August 5, 2022
    Publication date: August 10, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroshi ONO, Yosuke KAJIWARA, Daimotsu KATO, Masahiko KURAGUCHI, Tatsuo SHIMIZU
  • Publication number: 20230253488
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, and a first member. The second electrode includes first and second electrode regions. A position of the third electrode is between a position of the first electrode and a position of the second electrode. The first semiconductor region includes first to fifth partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial region. The second semiconductor region includes first to third semiconductor portions. At least a part of the third semiconductor portion is between the first semiconductor region and the second electrode region. The second semiconductor portion is between the first semiconductor portion and the third semiconductor region. The first member includes first and second regions.
    Type: Application
    Filed: August 15, 2022
    Publication date: August 10, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jumpei TAJIMA, Yosuke KAJIWARA, Po-Chin HUANG, Toshiki HIKOSAKA, Masahiko KURAGUCHI
  • Publication number: 20230246079
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor member, an electrode portion, a pad portion, and first and second conductive members. The semiconductor member includes a first semiconductor layer and a second semiconductor layer. The electrode portion includes a source electrode, a gate electrode including a first gate portion, and a drain electrode. The first gate portion is between the source electrode and the drain electrode. The pad portion includes a drain pad. The first conductive member includes a first conductive portion. The drain pad is between the electrode portion and the first conductive portion. The second conductive member includes at least one of first to third conductive regions. The first conductive portion is between the drain pad and the first conductive region. The electrode portion is between the second conductive region and the third conductive region.
    Type: Application
    Filed: August 19, 2022
    Publication date: August 3, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Masahiko KURAGUCHI, Aya SHINDOME, Hiroshi ONO
  • Patent number: 11715778
    Abstract: According to one embodiment, a semiconductor device includes first, second, and third electrodes, and first, second, and third semiconductor regions. The third electrode is between the first electrode and the second electrodes. The first semiconductor region includes Alx1Ga1-x1N and includes first to seventh partial regions. The fourth partial region is between the first partial region and the third partial region. The fifth partial region is between the third partial region and the second partial region. The second semiconductor region includes Alx2Ga1-x2N and includes first and second semiconductor portions. The sixth partial region is between the fourth partial region and the first semiconductor portion. The seventh partial region is between the fifth partial region and the second semiconductor portion. The third semiconductor region includes Alx3Ga1-x3N and includes a first semiconductor film part. The first semiconductor film part is between the sixth partial region and the third electrode.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: August 1, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Akira Mukai, Masahiko Kuraguchi
  • Publication number: 20230187500
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, and a first member. The first semiconductor region includes Alx1Ga1-x1N (0?x1<1). The second semiconductor region includes Alx2Ga1-x2N (x1<x2?1). The first member includes first and second regions. The second region is between the first region and the first electrode region of the second electrode. A part of the second region is between the second semiconductor portion of the second semiconductor region and the second electrode region. The second region includes at least one first element selected from the group consisting of Ti, Al, Ga, Ni, Nb, Mo, Ta, Hf, V, and Au. The first region does not include the first element, or a concentration of the first element in the first region is lower than a concentration of the first element in the second region.
    Type: Application
    Filed: June 29, 2022
    Publication date: June 15, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Aya SHINDOME, Masahiko KURAGUCHI
  • Patent number: 11677020
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes Alx1Ga1?x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1?x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1?x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: June 13, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Daimotsu Kato, Yosuke Kajiwara, Akira Mukai, Aya Shindome, Hiroshi Ono, Masahiko Kuraguchi
  • Patent number: 11658235
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a first region, and a first insulating layer. The first electrode includes a first electrode portion. The first region contains Ga and N. The first region includes a first subregion, a second subregion, and a third subregion. The first subregion and the third subregion contain at least one first element selected from the group consisting of Ar, B, P, N, and Fe. The first subregion is located between the first electrode portion and the second subregion in a first direction. The second subregion does not contain the first element, or concentration of the first element in the second subregion is lower than concentration of the first element in the first subregion and lower than concentration of the first element in the third subregion. The first insulating layer is provided between the first electrode and the first region.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: May 23, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Kuraguchi, Yosuke Kajiwara, Miki Yumoto, Hiroshi Ono
  • Publication number: 20230078716
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 16, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Hiroshi ONO, Jumpei TAJIMA, Masahiko KURAGUCHI, Shinya NUNOUE
  • Publication number: 20230061811
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, first and second insulating members, a compound member, and a nitride member. The third electrode is between the first and second electrodes. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first to fifth partial regions. The second semiconductor region includes first and second semiconductor portions. The first insulating member includes first and second insulating portions. The first semiconductor portion is between the fourth partial region and the first insulating portion. The second semiconductor portion is between the fifth partial region and the second insulating portion. The compound member includes first to third compound portions. The nitride member includes first to third nitride portions. The second insulating member includes first and second insulating regions.
    Type: Application
    Filed: March 1, 2022
    Publication date: March 2, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Daimotsu KATO, Hiroshi ONO, Yosuke KAJIWARA, Aya SHINDOME, Akira MUKAI, Po-Chin HUANG, Masahiko KURAGUCHI, Tatsuo SHIMIZU
  • Publication number: 20230068711
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, first and second insulating members, and a first nitride member. A position of the third electrode in a first direction from the first to second electrodes is between positions of the first and second electrodes in the first direction. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first to fifth partial regions. The second semiconductor region includes first and second semiconductor portions. The second semiconductor portion includes first and second portions, and a third portion between the first and second portions. The first conductive member includes first and second conductive regions. The first insulating member includes a first insulating region. The second insulating member includes first and second insulating portions. The first nitride member includes a first nitride region.
    Type: Application
    Filed: March 1, 2022
    Publication date: March 2, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Daimotsu KATO, Yosuke KAJIWARA, Hiroshi ONO, Aya SHINDOME, Akira MUKAI, Po-Chin HUANG, Masahiko KURAGUCHI, Tatsuo SHIMIZU
  • Publication number: 20230025093
    Abstract: According to one embodiment, a semiconductor device includes first, second, third nitride members, first, second, third electrodes, and a first insulating member. The first nitride member includes a first face along a first plane, a second face along the first plane, and a third face. The third face is connected with the first and second faces between the first and second faces. The third face crosses the first plane. The first face overlaps a part of the first nitride member. The second nitride member includes a first nitride region provided at the first face. The third nitride member includes a first nitride portion provided at the second face. The first electrode includes a first connecting portion. The second electrode includes a second connecting portion. The third electrode includes a first electrode portion. The first insulating member includes a first insulating region.
    Type: Application
    Filed: January 3, 2022
    Publication date: January 26, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Masahiko KURAGUCHI
  • Patent number: RE49962
    Abstract: According to one embodiment, a semiconductor device includes first and second regions, a first insulating portion, and first, second, and third electrodes. The first region includes first and second partial regions, and a third partial region between the first and second partial regions. The second region includes fourth and fifth partial regions. The fourth partial region overlaps the first partial region. The fifth partial region overlaps the second partial region. The first insulating portion includes first, second, and third insulating regions. The first insulating region is provided between the second insulating region and the third partial region and between the third insulating region and the third partial region. The first electrode is electrically connected to the fourth partial region. The second electrode is away from the first electrode and is electrically connected to the fifth partial region. The third electrode is provided between the first and second electrodes.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: May 7, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Masahiko Kuraguchi, Yosuke Kajiwara, Aya Shindome, Hiroshi Ono, Daimotsu Kato, Akira Mukai