Patents by Inventor Masahiro Nishi
Masahiro Nishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120021582Abstract: A method of manufacturing a semiconductor device includes: forming a lower electrode layer in contact with a surface of a nitride semiconductor layer; forming an Al layer on the lower electrode layer; performing a heat treatment after the formation of the Al layer; removing the Al layer after the heat treatment is performed; and forming an upper electrode layer on the lower electrode layer after the removal of the Al layer.Type: ApplicationFiled: July 25, 2011Publication date: January 26, 2012Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: Masahiro Nishi
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Publication number: 20110133206Abstract: At a gate electrode formed on a compound semiconductor layer with a Schottky junction, a diffusion preventing layer made of TixW1-xN (0<x<1) for suppressing the metal of a low-resistance metal layer from diffusing to the compound semiconductor layer is provided between a Ni layer forming a Schottky barrier with the compound semiconductor layer and the low-resistance metal layer, and thus an increase in the leak current at the gate electrode is suppressed.Type: ApplicationFiled: February 9, 2011Publication date: June 9, 2011Applicants: FUJITSU LIMITED, EUDYNA DEVICES, INC.Inventors: Masahito Kanamura, Masahiro Nishi
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Publication number: 20110026407Abstract: This invention enables an abnormality analysis to be easily and reliably performed in the FA system of the EtherCAT (registered trademark). A controller has a protocol monitor function of operating in a monitor system program, and constantly monitors data communicated with a remote device. The controller has an abnormality diagnosis function of detecting abnormality, and thus holds the data monitored immediately before when abnormality is detected. As the protocol monitor function is incorporated, a protocol monitor does not need to be newly plugged into the network as an external device after the occurrence of abnormality, and the data that becomes the cause can be held from the abnormality that occurred first by monitoring from the beginning of the operation of the system and can be used for analysis.Type: ApplicationFiled: February 25, 2010Publication date: February 3, 2011Inventors: Hiroaki YAMADA, Masahiro NISHI
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Patent number: 7585779Abstract: A fabrication method of a semiconductor device includes steps of performing any one of O2 ashing, organic processing, and dry etching on a surface of a GaN-based semiconductor layer, etching the surface of the GaN-based semiconductor layer in a mixed solution of acid and an oxidizing agent, and forming an electrode on the surface of the GaN-based semiconductor layer.Type: GrantFiled: March 28, 2006Date of Patent: September 8, 2009Assignee: Eudyna Devices Inc.Inventor: Masahiro Nishi
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Publication number: 20070228415Abstract: A semiconductor device is configured so as to comprise a substrate, an n-type semiconductor layer or an undoped semiconductor layer on the substrate, and an ohmic electrode on the n-type semiconductor layer or the undoped semiconductor layer, and the ohmic electrode is configured so as to comprise a tantalum layer formed on the n-type semiconductor layer or the undoped semiconductor layer, an aluminum layer formed on the tantalum layer, and a metal layer formed on the aluminum layer and made of any one material of tantalum, nickel, palladium, and molybdenum.Type: ApplicationFiled: June 28, 2006Publication date: October 4, 2007Applicants: FUJITSU LIMITED, EUDYNA DEVICES INC.Inventors: Masahito Kanamura, Masahiro Nishi
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Publication number: 20070207626Abstract: A method for processing semiconductor includes: forming a first insulation film containing silicon on a surface of a GaN-base semiconductor layer; and removing the first insulation film formed on the surface of the GaN-base semiconductor layer. The composition ratio of Ga and N on the surface of the GaN-base semiconductor layer can be approximated to the stoichiometrical composition ratio.Type: ApplicationFiled: March 2, 2007Publication date: September 6, 2007Applicant: EUDYNA DEVICES INC.Inventor: Masahiro Nishi
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Patent number: 7250643Abstract: A semiconductor device includes: a gate electrode that is provided on a semiconductor layer; a source electrode and a drain electrode that are provided on the semiconductor layer so as to interpose the gate electrode; a source wall that extends from the source electrode to a point between the gate electrode and the drain electrode through the region above the gate electrode, the source wall having a joining portion in the extending region; and an electrode portion that is joined to the joining portion and has a region extending closer to the drain electrode than the joining portion.Type: GrantFiled: March 30, 2006Date of Patent: July 31, 2007Assignee: Eudyna Devices Inc.Inventor: Masahiro Nishi
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Publication number: 20060220150Abstract: A semiconductor device includes: a gate electrode that is provided on a semiconductor layer; a source electrode and a drain electrode that are provided on the semiconductor layer so as to interpose the gate electrode; a source wall that extends from the source electrode to a point between the gate electrode and the drain electrode through the region above the gate electrode, the source wall having a joining portion in the extending region; and an electrode portion that is joined to the joining portion and has a region extending closer to the drain electrode than the joining portion.Type: ApplicationFiled: March 30, 2006Publication date: October 5, 2006Applicant: EUDYNA DEVICES INC.Inventor: Masahiro Nishi
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Publication number: 20060223326Abstract: A fabrication method of a semiconductor device includes steps of performing any one of O2 ashing, organic processing, and dry etching on a surface of a GaN-based semiconductor layer, etching the surface of the GaN-based semiconductor layer in a mixed solution of acid and an oxidizing agent, and forming an electrode on the surface of the GaN-based semiconductor layer.Type: ApplicationFiled: March 28, 2006Publication date: October 5, 2006Applicant: EUDYNA DEVICES INC.Inventor: Masahiro Nishi
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Publication number: 20060157735Abstract: At a gate electrode formed on a compound semiconductor layer with a Schottky junction, a diffusion preventing layer made of TixW1?xN (0<x<1) for suppressing the metal of a low-resistance metal layer from diffusing to the compound semiconductor layer is provided between a Ni layer forming a Schottky barrier with the compound semiconductor layer and the low-resistance metal layer, and thus an increase in the leak current at the gate electrode is suppressed.Type: ApplicationFiled: December 7, 2005Publication date: July 20, 2006Applicants: FUJITSU LIMITED, EUDYNA DEVICES INC.Inventors: Masahito Kanamura, Masahiro Nishi
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Patent number: 6998695Abstract: A method of manufacturing a semiconductor device has the steps of: forming a mushroom gate traversing an active region of a semiconductor substrate and having a fine gate and an expanded over gate formed thereon; coating a first organic material film on the semiconductor substrate; patterning the first organic material film and leaving the first organic material film only near the mushroom gate; coating a second organic (insulating) material film covering the left first organic material film; forming an opening through the second organic material film to expose the first organic material film; and dissolving and removing the first organic material film via the opening to form a hollow space in the second organic material film.Type: GrantFiled: August 28, 2003Date of Patent: February 14, 2006Assignees: Fujitsu Limited, Eudyna Devices Inc.Inventors: Kozo Makiyama, Tsuyoshi Takahashi, Masahiro Nishi
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Patent number: 6788521Abstract: A capacitor which includes a lower electrode 12 formed on a substrate 10; an insulation film 16 having an opening 24 on the lower electrode 12; a capacitor dielectric film 30 formed on the lower electrode 12 in the opening 24 and having a larger thickness at a peripheral part of the opening 24 than at a central part of the opening; and an upper electrode 32 formed on the capacitor dielectric film 30. Thus, degradation of the breakdown voltage and stress resistance of the peripheral part of the opening 24, which is due to the coverage of the capacitor dielectric film, can be suppressed.Type: GrantFiled: September 26, 2002Date of Patent: September 7, 2004Assignee: Fujitsu Quantum Devices LimitedInventor: Masahiro Nishi
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Publication number: 20040058485Abstract: A method of manufacturing a semiconductor device has the steps of: forming a mushroom gate traversing an active region of a semiconductor substrate and having a fine gate and an expanded over gate formed thereon; coating a first organic material film on the semiconductor substrate; patterning the first organic material film and leaving the first organic material film only near the mushroom gate; coating a second organic (insulating) material film covering the left first organic material film; forming an opening through the second organic material film to expose the first organic material film; and dissolving and removing the first organic material film via the opening to form a hollow space in the second organic material film.Type: ApplicationFiled: August 28, 2003Publication date: March 25, 2004Applicant: FUJITSU LIMITEDInventors: Kozo Makiyama, Tsuyoshi Takahashi, Masahiro Nishi
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Publication number: 20030063428Abstract: The capacitor comprises: a lower electrode 12 formed on a substrate 10; an insulation film 16 having an opening 24 on the lower electrode 12; a capacitor dielectric film 30 formed on the lower electrode 12 in the opening 24 and having a larger thickness at a peripheral part of the opening 24 than at a central part of the opening; and an upper electrode 32 formed on the capacitor dielectric film 30. Thus, degradation of the breakdown voltage and stress resistance of the peripheral part of the opening 24, which is due to the coverage of the capacitor dielectric film, can be suppressed.Type: ApplicationFiled: September 26, 2002Publication date: April 3, 2003Applicant: FUJITSU QUANTUM DEVICES LIMITEDInventor: Masahiro Nishi
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Publication number: 20020182037Abstract: A substrate processing apparatus for providing predetermined processing to wafers brought in through the load port door comprises in the front of the load port door a load port table on which a wafer carrier accommodating a plurality of wafers is placed, and a shield plate is provided so as to surround the load port table.Type: ApplicationFiled: March 7, 2002Publication date: December 5, 2002Applicant: SEMICONDUCTOR LEADING EDGE TECHNOLOGIES, INC.Inventors: Shinyo Kimoto, Kenji Tokunaga, Seokhyun Kim, Terumi Muguruma, Yoshiaki Yamada, Shinichi Watanabe, Masahiro Nishi
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Patent number: 6238283Abstract: A work conveying and transferring apparatus has a trolley having a casing defining a hermetically sealed space, and a support portion provided on the trolley for placing at least one container containing a cassette carrying works. A container opening device is provided on the trolley to open the container placed on the support portion, and a cassette transferring device is provided for transferring the cassette from the trolley to a treating apparatus, with the container placed on the support portion opened. The support portion is provided in the sealed space, and works can be double sealed by the sealed space and the container.Type: GrantFiled: February 3, 2000Date of Patent: May 29, 2001Assignee: Fujitsu LimitedInventors: Ryoji Matsuyama, Koji Hashizume, Toshikatsu Shimura, Masahiro Nishi
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Patent number: 5194411Abstract: Catalyst compositions and a process for making the same are disclosed. The composition finds application in the cracking of heavy hydrocarbon feedstock containing vanadium and other metal contaminants. It essentially comprises a crystalline zeolite, a metal trapping or passivating agent and an inorganic oxide matrix precursor and is characterized by minimum elution of an alkaline earth metal in the catalyst.Type: GrantFiled: November 21, 1991Date of Patent: March 16, 1993Assignee: Catalysts & Chemicals Industries Co., Ltd.Inventors: Tatsuo Masuda, Morio Fukuda, Masahiro Nishi
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Patent number: 5186792Abstract: In a method and apparatus for making a dry sheet-like sample of solid particles from a suspension, a part of the suspension is sampled by a sampling unit as it flows through a pipe or while it is retained in a storage tank, then the sampled suspension is stirred by supplying a compressed air and then dewatered by filtration with vacuum, thereby forming a wet sheet-like intermediate sample of solid particles deposited on a filter, subsequently, the filter and the intermediate sample deposited thereon are conveyed by an overturning conveyor unit to a drying station while being turned upside down, thereafter intermediate sample is removed from the filter by a sample removing unit, and finally, the wet sheet-like intermediate sample is dried with heat and pressure whereby a dry sheet-like final sample is obtained.Type: GrantFiled: August 30, 1991Date of Patent: February 16, 1993Assignee: Kyoritsu Electric CorporationInventor: Masahiro Nishi
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Patent number: 5069753Abstract: In a method and apparatus for making a dry sheet-like sample of solid particles from a suspension, a part of the suspension is sampled by a sampling unit as it flows through a pipe or while it is retained in a storage tank, then the sampled suspension is stirred by supplying a compressed air and then dewatered by filtration with vacuum, thereby forming a wet sheet-like intermediate sample of solid particles deposited on a filter. Subsequently, the filter and the intermediate sample deposited thereon are conveyed by an overturning conveyor unit to a drying station while being turned upside down, thereafter intermediate sample is removed from the filter by a sample removing unit, and finally, the wet sheet-like intermediate sample is dried with heat and pressure whereby a dry sheet-like final sample is obtained.Type: GrantFiled: March 21, 1990Date of Patent: December 3, 1991Assignee: Kyoritsu Electric CorporationInventor: Masahiro Nishi
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Patent number: 4662734Abstract: A bellows including a flexible tubular body of a sheet, which is bent in alternate directions along the length thereof on circumferential folds for extensibility, and reinforcements, printed on one surface of the sheet between adjacent circumferential folds.Type: GrantFiled: December 27, 1984Date of Patent: May 5, 1987Assignee: Kabushiki Kaisha Sakai Tokushu Camera SeisakushoInventor: Masahiro Nishi