Abstract: According to one embodiment, a semiconductor memory device includes: a stacked body in which a plurality of conductive layers and a plurality of insulating layers are alternately stacked; and a pillar including a channel layer extending in a stacking direction of the plurality of conductive layers in the stacked body, a memory layer provided on a side surface of the channel layer, and a cap layer provided on the channel layer, the cap layer being connected to an upper layer wiring of the stacked body, wherein the channel layer extends into the stacked body at least from a height position of an uppermost conductive layer of the plurality of conductive layers, and a grain size of crystal contained in the channel layer is larger than a grain size of crystal contained in the cap layer.

Abstract: A semiconductor memory device includes first conducting layers and a first semiconductor layer opposed to the first conducting layers. If a concentration of the dopant in the first semiconductor layer is measured along an imaginary straight line, the concentration of the dopant has: a maximum value at a first point, a minimum value in a region closer to the first conducting layer than the first point at a second point; and a minimum value in a region farther from the first conducting layer than the first point at a third point. The second point is nearer to an end portion of the first semiconductor layer on the first conducting layer side than that on the opposite side. The third point is farther from the end portion on the first conducting layer side than that on the opposite side.

Abstract: An air purifier that enables reduction of production processes and is easy to produce, and a production method for the air purifier are proposed.

Abstract: A semiconductor memory device includes first conducting layers and a first semiconductor layer opposed to the first conducting layers. If a concentration of the dopant in the first semiconductor layer is measured along an imaginary straight line, the concentration of the dopant has: a maximum value at a first point, a minimum value in a region closer to the first conducting layer than the first point at a second point; and a minimum value in a region farther from the first conducting layer than the first point at a third point. The second point is nearer to an end portion of the first semiconductor layer on the first conducting layer side than that on the opposite side. The third point is farther from the end portion on the first conducting layer side than that on the opposite side.

Abstract: An air-purifier system is provided that generates an ionic wind that is comfortable for the persons in a space to obtain a comfortable environment.

Abstract: According to one embodiment, a semiconductor memory device includes: a first interconnecting layer; a first signal line; a first memory cell that stores first information between the first interconnecting layer and the first signal line; second to fourth interconnecting layers provided above the first interconnecting layer; fifth to seventh interconnecting layers disposed apart from the second to fourth interconnecting layers; a second signal line coupled to the first signal line; a third signal line coupled to the first and second signal lines and the sixth interconnecting layer; and, first to fifth transistors.

Abstract: According to one embodiment, a semiconductor memory device includes: a first interconnecting layer; a first signal line; a first memory cell that stores first information between the first interconnecting layer and the first signal line; second to fourth interconnecting layers provided above the first interconnecting layer; fifth to seventh interconnecting layers disposed apart from the second to fourth interconnecting layers; a second signal line coupled to the first signal line; a third signal line coupled to the first and second signal lines and the sixth interconnecting layer; and, first to fifth transistors.

Abstract: An integrated circuit device includes a first wiring, a second wiring, a first semiconductor portion, a second semiconductor portion, a third semiconductor portion, an insulating film, and an electrode. The third semiconductor portion is provided between the first semiconductor portion and the second semiconductor portion. The electrode has a first electrode portion and a second electrode portion. The first electrode portion is provided on a part of the third semiconductor portion with the insulating film interposed therebetween. The second electrode portion is electrically connected to the first electrode portion, located adjacent the second semiconductor portion, and provided on another part of the third semiconductor portion with the insulating film interposed therebetween. The second electrode portion has a concentration of at least one of nitrogen, oxygen, carbon, or silicon that is different from that of the first electrode portion.

Abstract: An integrated circuit device includes a first wiring, a second wiring, a semiconductor member that is connected between the first and second wirings, an electrode, and an insulating film that is provided between the semiconductor member and the electrode. The semiconductor member includes a first semiconductor portion of a first conductivity type connected to the first wiring, a second semiconductor portion of the first conductivity type, a third semiconductor portion of the first conductivity type, a fourth semiconductor portion of the first conductivity type, a fifth semiconductor portion of a second conductivity type, and a sixth semiconductor portion of the first conductivity type in this order. A first edge of the electrode on a side of the first wiring overlaps the second, third, or fourth semiconductor portions.

Abstract: An integrated circuit device includes a first wiring, a second wiring, a semiconductor member that is connected between the first and second wirings, an electrode, and an insulating film that is provided between the semiconductor member and the electrode. The semiconductor member includes a first semiconductor portion of a first conductivity type connected to the first wiring, a second semiconductor portion of the first conductivity type, a third semiconductor portion of the first conductivity type, a fourth semiconductor portion of the first conductivity type, a fifth semiconductor portion of a second conductivity type, and a sixth semiconductor portion of the first conductivity type in this order. A first edge of the electrode on a side of the first wiring overlaps the second, third, or fourth semiconductor portions.

Abstract: A semiconductor device includes a semiconductor layer, first gate electrode, second gate electrode, first conductive layer and second conductive layer. The semiconductor layer includes a first side surface, a second side surface, a first end portion, and a second end portion. The first side surface and the second side surface face each other. The first end portion and the second end portion face each other. A first gate insulating layer is provided between the first gate electrode and the first side surface. A second gate insulating layer is provided between the second gate electrode and the second side surface. A first metal oxide layer is provided between the first conductive layer and the first end portion. A second metal oxide layer is provided between the second conductive layer and the second end portion.

Abstract: A semiconductor device includes a first source region, a second source region, and a drain region. The first source region includes a first conductivity type that is formed in a semiconductor layer. The second source region includes a second conductivity type that is adjacent to a gate region and formed in the first source region, the second source region being electrically connected to the first source region, and configured such that one end of a first face of the second source region abuts a gate insulating film formed in the gate region and at least a portion of a second face opposite to the first face abuts the first source region. The drain region includes the first conductivity type that is formed adjacent to the gate region in the semiconductor layer with the gate region interposed with the second source region and the drain region.

Abstract: A semiconductor device according to an embodiment includes a semiconductor layer. A gate dielectric film is provided on the semiconductor layer. A gate electrode is provided on the semiconductor layer via the gate dielectric film. A first conductivity-type source layer is provided in the semiconductor layer on a side of one end of the gate electrode. A second conductivity-type drain layer is provided in the semiconductor layer on a side of the other end of the gate electrode. The drain layer does not face a bottom surface of the gate electrode. A first diffusion layer of the first conductivity-type is provided at least in a part of the semiconductor layer between a first portion of the semiconductor layer and the drain layer. The first portion faces the bottom surface of the gate electrode.

Abstract: A semiconductor device includes a semiconductor layer opposing to a bottom surface and a side surface of a gate electrode. An insulation film is provided between the bottom surface of the gate electrode and the semiconductor layer and between the side surface of the gate electrode and the semiconductor layer. A first conduction-type drain layer is provided in the semiconductor layer on a side of an end part of one of the bottom surface and the side surface of the gate electrode. A second conduction-type source layer is provided in the semiconductor layer opposing to the other one of the bottom surface and the side surface of the gate electrode. A second conduction-type extension layer is provided in the semiconductor layer opposing to a corner part between the side surface and the bottom surface of the gate electrode and has a lower impurity concentration than that of the source layer.

Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate, and first and second transistors of first and second conductivity types on the substrate. The first transistor includes a first gate electrode on the substrate, a first source region of the second conductivity type and a first drain region of the first conductivity type disposed to sandwich the first gate electrode, and a first channel region of the first or second conductivity type disposed between the first source region and the first drain region. The second transistor includes a second gate electrode on the substrate, a second source region of the first conductivity type and a second drain region of the second conductivity type disposed to sandwich the second gate electrode, and a second channel region disposed between the second source region and the second drain region and having the same conductivity type as the first channel region.

Abstract: In one embodiment, a first main terminal region of a first conductivity type and a second main terminal region of a second conductivity type, which is an opposite conductivity type of the first conductivity type, formed in the semiconductor substrate so as to sandwich a gate electrode, a diffusion layer of the second conductivity type coming in contact with the first and second element isolation insulator films and having an upper surface in a position deeper than lower surfaces of the first and second main terminal regions, a first well region of the first conductivity type formed between the first main terminal region and the diffusion layer, and a second well region of the first conductivity type formed between the second main terminal region and the diffusion layer. The second well region has a impurity concentration higher than that of the first well region.

Abstract: A semiconductor device includes a gate dielectric film on a semiconductor layer. A gate electrode is above the semiconductor layer via the gate dielectric film. A first conductivity-type drain is in the semiconductor layer on one end side of the gate electrode. A second conductivity-type source is in the semiconductor layer on the other end side of the gate electrode and below the gate electrode. A channel is between the gate dielectric film and the source. A drain side end of the source is below a bottom surface of the gate electrode. A region of the drain side end of a surface region of the source is formed using a first material. A region of the surface region of the source other than the drain side end is formed using a second material. An energy band gap of the first material is larger than that of the second material.

Abstract: A semiconductor device includes a semiconductor layer. A gate dielectric film is provided on the semiconductor layer. A gate electrode is provided above the semiconductor layer via the gate dielectric film. A first conductivity-type drain layer is provided in the semiconductor layer on a one-end side of the gate electrode. A second conductivity-type source layer is provided in the semiconductor layer on an other-end side of the gate electrode and below at least a part of the gate electrode. A source extension layer faces at least a part of a bottom surface of the gate electrode via the gate dielectric film and has an impurity concentration lower than that of the source layer. A first conductivity-type pocket layer is provided in the semiconductor layer between the source extension layer and the drain layer. The pocket layer contacts the source extension layer and is separated from the drain layer.

Abstract: A semiconductor device according to an embodiment includes a first conductivity-type first source layer provided in a semiconductor layer. A second conductivity-type drain layer is provided in the semiconductor layer. A gate dielectric film is provided on the semiconductor layer between the first source layer and the drain layer. A first gate structure is provided on the gate dielectric film. A drain-side adjacent structure is adjacent to the first gate structure on a side of the drain layer of the first gate structure. A stress layer covers at least the first gate structure, the drain-side adjacent structure, and the first source layer. The stress layer has strain. A first gap between the first gate structure and the drain-side adjacent structure is narrower than four times a film thickness of the stress layer. The stress layer covers the first source layer along a channel-direction longer than the first gap.

Abstract: A semiconductor device according to an embodiment includes a semiconductor layer. A first conductivity-type source layer is provided in the semiconductor layer. A second conductivity-type drain layer is provided in the semiconductor layer. A gate dielectric film is provided on the semiconductor layer between the source layer and the drain layer. A gate electrode includes a first gate part partially provided on the gate dielectric film on a side of the source layer and a second gate part partially provided on the gate dielectric film on a side of the drain layer. A length of crystal grains of the first gate part in a channel length direction is longer than that of crystal grains of the second gate part in the channel length direction.