Abstract: Disclosed is a display device with improved brightness achieved by increasing electron emission efficiency of a thin film cathode. Phosphors are irradiated with electrons emitted to a vacuum through a flat thin film which is thinner than 5 nm and is disposed so as to face the phosphors. A top electrode for emitting the electrons is formed by stacking thin films of Ir, Pt, and Au, and performing a heat treatment so as to reconstruct the top electrode to have a structure in which thick island parts and a flat thin film part mixedly exist.

Abstract: An object of the present invention is to obtain excellent images which are free from distortion in a flat display apparatus including electron-emitter elements, phosphors, and spacers. A structure of the present invention is such that the display apparatus comprises a display panel including a first substrate having a plurality of electron-emitter elements, a second substrate having phosphors, and spacers; and driving means employing a line-sequential scanning method; wherein scan pulse output is performed by the driving means, and the driving means performs scanning in such a manner that a scan is performed in the direction of approaching a relevant one of the spacers from far. Thus, the present invention realizes the excellent display images which are free from distortion by largely reducing or eliminating influence of charging of the spacers to be exerted on the images.

Abstract: A display apparatus capable of reducing power consumption comprising a display element, said display element comprising a first substrate, and a second substrate having phosphors; said first substrate comprising a plurality of transistor elements, a plurality of electron emitter elements, a plurality of first signal lines stretched in a first direction, and a plurality of second signal lines stretched in a second direction perpendicular to said first direction; each of said electron emitter elements being provided for one of said transistor elements, having a structure comprising a base electrode, an insulator and a top electrode stacked as layers placed one on another in this order of enumeration, and emitting electrons when a positive-polarity voltage is applied to said top electrode; wherein each of said transistor elements and each of said electron emitter elements are provided in each intersection region of said plurality of first signal lines and said plurality of second signal lines.

Abstract: A process for manufacturing a thin-film electron source including a lower electrode (11), an upper electrode, and an insulating layer sandwiched between the lower electrode (11) and the upper electrode. The process comprises a first step of forming an anodized film over the surface of the lower electrode (11) by an anodizing method, a second step of etching the surface side of the anodized film, and a third step of forming an anodized film again over the surface of the lower electrode (11) by an anodizing method to form said insulating layer. As a result, the film thickness of such an outer layer (26) of the insulating layer containing much impurity can be reduced to reduce the number of electron trapped.

Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel s

Abstract: The invention realizes a display device that uses thin film cathodes having no contamination of a top electrode and no damage of an electron acceleration layer due to photo process and having no contact failure of the top electrode of the thin film cathode array due to oxidation or breakage of the bus electrode in the frit glass process that is carried out when a panel is manufactured to bring about the high reliability of the wiring connection of the top electrode. To realize the display device, the invention provides a display device having a substrate comprising a base electrode, a top electrode, and an electron acceleration layer disposed between the base electrode and the top electrode, which substrate is formed of arrayed thin film cathodes that emit electrons from the top electrode side by applying a voltage between the base electrode and the top electrode, and a phosphor screen.

Abstract: The present invention provides an image display capable of enhancing a production yield. The image display comprises a display device including a first plate which has a plurality of electron-emitter elements each having a structure comprised of a base electrode, an insulating layer and a top electrode stacked on one another in this order, the electron-emitter element emitting electrons from the surface of the top electrode when a voltage of positive polarity is applied to the top electrode; a plurality of first electrodes for respectively applying driving voltages to the base electrodes of the electron-emitter elements lying in a row (or column) direction; and a plurality of second electrodes for respectively applying driving voltages to the top electrodes of the electron-emitter elements lying in the column (or row) direction, a frame component, and a second plate having phosphors, wherein a space surrounded by the first plate, the frame component and the second plate is brought into vacuum.

Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it.

Abstract: A display apparatus includes: a plurality of luminance modulation elements each modulated in luminance by a voltage of a positive polarity applied thereto, each of the luminance modulation elements being not modulated in luminance by a voltage of an opposite polarity applied thereto; a plurality of first lines electrically coupled to first electrodes of the plurality of luminance modulation elements; a plurality of second lines electrically coupled to second electrodes of the plurality of luminance modulation elements, the plurality of second lines intersecting the plurality of first lines; a first drive unit coupled to the plurality of first lines, the first drive unit outputting scanning pulses; and a second driver unit coupled to the plurality of second lines. The first drive unit sets the first lines in a nonselection state to a high impedance state having a higher impedance as compared with the first lines in a selection state.

Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected,, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it.

Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel s

Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel s

Abstract: Disclosed is a display device with improved brightness achieved by increasing electron emission efficiency of a thin film cathode. Phosphors are irradiated with electrons emitted to a vacuum through a flat thin film which is thinner than 5 nm and is disposed so as to face the phosphors. A top electrode for emitting the electrons is formed by stacking thin films of Ir, Pt, and Au, and performing a heat treatment so as to reconstruct the top electrode to have a structure in which thick island parts and a flat thin film part mixedly exist.

Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it.

Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel s

Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions. The disclosed process includes forming insulating films over wiring lines including uppermost wiring lines, the uppermost wiring lines having gaps between adjacent uppermost wiring lines. The insulating films include forming a silicon oxide film over the wiring lines and in the gaps between adjacent uppermost wiring lines, and forming a silicon nitride film over the silicon oxide film, the silicon nitride film being formed by plasma chemical vapor deposition. The silicon oxide film is formed to have a thickness of at least one-half of the gap between adjacent uppermost wiring lines, with the silicon nitride film being thicker than the silicon oxide film.

Abstract: A plastic optical waveguide with a low loss property, a low birefringence and a high temperature endurance constructed with a polyimide obtained from an acid dianhydride based component and a diamine based component, wherein at least one of a core layer and a cladding layer of the optical waveguide is made of an acid dianhydride based component including an alicyclic acid dianhydride or an aliphatic acid dianhydride, the plastic optical waveguide having an optical loss in a 1.3 .mu.m band of 0.5 dB/cm or less, and a refractive index of the core layer being larger than that of the cladding layer.

Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, is disclosed. In a first aspect, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry.

Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel s

Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel s