Patents by Inventor Masaki Haneda
Masaki Haneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9524925Abstract: There is provided a method for manufacturing a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.Type: GrantFiled: April 12, 2016Date of Patent: December 20, 2016Assignee: Sony CorporationInventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
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Publication number: 20160247746Abstract: There is provided a method for manufacturing a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.Type: ApplicationFiled: April 12, 2016Publication date: August 25, 2016Inventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
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Patent number: 9343392Abstract: There is provided a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.Type: GrantFiled: June 19, 2013Date of Patent: May 17, 2016Assignee: Sony CorporationInventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
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Publication number: 20150179546Abstract: There is provided a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.Type: ApplicationFiled: June 19, 2013Publication date: June 25, 2015Inventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
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Patent number: 8952535Abstract: A semiconductor device including a first insulation film including a first opening reaching a diffusion region of a transistor; a first barrier metal over the diffused region in the first opening; a first conduction layer formed over the first barrier metal in the first opening and formed of a first conductor; a second barrier metal formed over the first conduction layer in the first opening; a second conduction layer formed over the second barrier metal in the first opening and formed of a second conductor; a third barrier metal formed over the first gate electrode in the second opening; a fourth barrier metal formed in the second opening and contacting with the third barrier metal; and a third conduction layer formed of the second conductor contacting with the fourth barrier metal in the second opening.Type: GrantFiled: February 7, 2013Date of Patent: February 10, 2015Assignee: Fujitsu Semiconductor LimitedInventors: Masaki Haneda, Akiyoshi Hatada
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Patent number: 8847282Abstract: A semiconductor device includes a semiconductor substrate including a well having a first conductivity type defined by a device isolation region, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film and including a first side surface and a second side surface facing the first side surface, and a first side wall insulating film formed on the first side surface and a second side wall insulating film formed on the second side surface.Type: GrantFiled: January 28, 2014Date of Patent: September 30, 2014Assignee: Fujitsu Semiconductor LimitedInventors: Masaki Haneda, Yuka Kase, Masanori Terahara, Takayuki Aoyama
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Publication number: 20140138769Abstract: A semiconductor device includes a semiconductor substrate including a well having a first conductivity type defined by a device isolation region, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film and including a first side surface and a second side surface facing the first side surface, and a first side wall insulating film formed on the first side surface and a second side wall insulating film formed on the second side surface.Type: ApplicationFiled: January 28, 2014Publication date: May 22, 2014Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Masaki Haneda, Yuka Kase, Masanori Terahara, Takayuki Aoyama
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Patent number: 8709896Abstract: A semiconductor device includes a semiconductor substrate including a well having a first conductivity type defined by a device isolation region, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film and including a first side surface and a second side surface facing the first side surface, and a first side wall insulating film formed on the first side surface and a second side wall insulating film formed on the second side surface.Type: GrantFiled: April 5, 2012Date of Patent: April 29, 2014Assignee: Fujitsu Semiconductor LimitedInventors: Masaki Haneda, Yuka Kase, Masanori Terahara, Takayuki Aoyama
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Patent number: 8575704Abstract: A semiconductor device includes a semiconductor substrate, a device region including first and second parts, first and second gate electrodes formed in the first and the second parts, first and second source regions, first and second drain regions, first, second, third, and fourth embedded isolation film regions formed under the first source, the first drain, the second source, and the second drain regions, respectively. Further, the first drain region and the second source region form a single diffusion region, the second and the third embedded isolation film regions form a single embedded isolation film region, an opening is formed in a part of the single diffusion region so as to extend to the second and the third embedded isolation film regions, and the opening is filled with an isolation film.Type: GrantFiled: March 8, 2012Date of Patent: November 5, 2013Assignee: Fujitsu Semiconductor LimitedInventors: Masaki Haneda, Akiyoshi Hatada, Akira Katakami, Yuka Kase, Kazuya Okubo
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Patent number: 8575012Abstract: A semiconductor device production method includes: forming an insulating film on a semiconductor substrate, forming a concave portion in the insulating film, forming a gate insulating film at bottom of the concave portion, the bottom being on the semiconductor substrate; covering an inner wall surface of the concave portion and a top face of the insulating film with a first gate electrode film that is made of an electrically conductive material containing a first metal; covering the first gate electrode film with a covering film of a material having a second melting point higher than a first melting point of the electrically conductive material, leaving part of the side face of the concave portion uncovered; and performing heat treatment following the covering film formation to allow the first gate electrode film to reflow.Type: GrantFiled: April 28, 2011Date of Patent: November 5, 2013Assignee: Fujitsu Semiconductor LimitedInventor: Masaki Haneda
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Patent number: 8383484Abstract: A semiconductor device production method includes: forming a gate insulating film on the p-type region of a semiconductor substrate; forming a first aluminum oxide film with an oxygen content lower than stoichiometric composition on the gate insulating film; forming a tantalum-nitrogen-containing film that contains tantalum and nitrogen on the first aluminum oxide film; forming an electrically conductive film on the tantalum-nitrogen-containing film; patterning the electrically conductive film to form a gate electrode; injecting n-type impurities into the p-type region using the gate electrode as a mask; and carrying out heat treatment after the formation of the tantalum-nitrogen-containing film.Type: GrantFiled: April 12, 2011Date of Patent: February 26, 2013Assignee: Fujitsu Semiconductor LimitedInventor: Masaki Haneda
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Publication number: 20120261760Abstract: A semiconductor device includes a semiconductor substrate, a device region including first and second parts, first and second gate electrodes formed in the first and the second parts, first and second source regions, first and second drain regions, first, second, third, and fourth embedded isolation film regions formed under the first source, the first drain, the second source, and the second drain regions, respectively. Further, the first drain region and the second source region form a single diffusion region, the second and the third embedded isolation film regions form a single embedded isolation film region, an opening is formed in a part of the single diffusion region so as to extend to the second and the third embedded isolation film regions, and the opening is filled with an isolation film.Type: ApplicationFiled: March 8, 2012Publication date: October 18, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Masaki Haneda, Akiyoshi Hatada, Akira Katakami, Yuka Kase, Kazuya Okubo
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Publication number: 20120256264Abstract: A semiconductor device includes a semiconductor substrate including a well having a first conductivity type defined by a device isolation region, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film and including a first side surface and a second side surface facing the first side surface, and a first side wall insulating film formed on the first side surface and a second side wall insulating film formed on the second side surface.Type: ApplicationFiled: April 5, 2012Publication date: October 11, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Masaki Haneda, Yuka Kase, Masanori Terahara, Takayuki Aoyama
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Publication number: 20120181695Abstract: A semiconductor device includes a semiconductor substrate, an oxygen-containing insulating film disposed above the above-described semiconductor substrate, a concave portion disposed in the above-described insulating film, a copper-containing first film disposed on an inner wall of the above-described concave portion, a copper-containing second film disposed above the above-described first film and filled in the above-described concave portion, and a manganese-containing oxide layer disposed between the above-described first film and the above-described second film. Furthermore, a copper interconnection is formed on the above-described structure by an electroplating method and, subsequently, a short-time heat treatment is conducted at a temperature of 80° C. to 120° C.Type: ApplicationFiled: March 29, 2012Publication date: July 19, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Masaki HANEDA, Michie SUNAYAMA, Noriyoshi SHIMIZU, Nobuyuki OHTSUKA, Yoshiyuki NAKAO, Takahiro TABIRA
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Patent number: 8168532Abstract: A semiconductor device includes a semiconductor substrate, an oxygen-containing insulating film disposed above the above-described semiconductor substrate, a concave portion disposed in the above-described insulating film, a copper-containing first film disposed on an inner wall of the above-described concave portion, a copper-containing second film disposed above the above-described first film and filled in the above-described concave portion, and a manganese-containing oxide layer disposed between the above-described first film and the above-described second film. Furthermore, a copper interconnection is formed on the above-described structure by an electroplating method and, subsequently, a short-time heat treatment is conducted at a temperature of 80° C. to 120° C.Type: GrantFiled: November 10, 2008Date of Patent: May 1, 2012Assignee: Fujitsu LimitedInventors: Masaki Haneda, Michie Sunayama, Noriyoshi Shimizu, Nobuyuki Ohtsuka, Yoshiyuki Nakao, Takahiro Tabira
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Publication number: 20120052645Abstract: A semiconductor device production method includes: forming a gate insulating film on the p-type region of a semiconductor substrate; forming a first aluminum oxide film with an oxygen content lower than stoichiometric composition on the gate insulating film; forming a tantalum-nitrogen-containing film that contains tantalum and nitrogen on the first aluminum oxide film; forming an electrically conductive film on the tantalum-nitrogen-containing film; patterning the electrically conductive film to form a gate electrode; injecting n-type impurities into the p-type region using the gate electrode as a mask; and carrying out heat treatment after the formation of the tantalum-nitrogen-containing film.Type: ApplicationFiled: April 12, 2011Publication date: March 1, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Masaki Haneda
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Publication number: 20120032281Abstract: A semiconductor device production method includes: forming an insulating film on a semiconductor substrate, forming a concave portion in the insulating film, forming a gate insulating film at bottom of the concave portion, the bottom being on the semiconductor substrate; covering an inner wall surface of the concave portion and a top face of the insulating film with a first gate electrode film that is made of an electrically conductive material containing a first metal; covering the first gate electrode film with a covering film of a material having a second melting point higher than a first melting point of the electrically conductive material, leaving part of the side face of the concave portion uncovered; and performing heat treatment following the covering film formation to allow the first gate electrode film to reflow.Type: ApplicationFiled: April 28, 2011Publication date: February 9, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Masaki Haneda
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Patent number: 8067836Abstract: A semiconductor device includes an insulating film including oxygen formed over a semiconductor substrate, a recess formed in the insulating film, a refractory metal film formed on the inner wall of the recess, a metal film including copper, manganese, and nitrogen formed on the refractory metal film, and a copper film formed on the metal film to fill in the recess.Type: GrantFiled: April 29, 2009Date of Patent: November 29, 2011Assignee: Fujitsu Semiconductor LimitedInventors: Masaki Haneda, Noriyoshi Shimizu, Nobuyuki Ohtsuka, Yoshiyuki Nakao, Michie Sunayama, Takahiro Tabira
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Patent number: 8003518Abstract: A semiconductor device fabrication method including the steps of: forming an interlayer insulating film on a substrate; forming an opening in the interlayer insulating film; forming an alloy layer containing manganese and copper to cover the inner surface of the opening; forming a first copper layer of a material containing primarily copper on the alloy layer to fill the opening; forming, on the first copper layer, a second copper layer of a material containing primarily copper and a higher concentration of oxygen, carbon or nitrogen than the first copper layer; heating the substrate on which the second copper layer has been formed; and removing the second copper layer.Type: GrantFiled: September 24, 2009Date of Patent: August 23, 2011Assignee: Fujitsu Semiconductor LimitedInventors: Masaki Haneda, Noriyoshi Shimizu, Michie Sunayama
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Publication number: 20110183515Abstract: A semiconductor device has a first insulating film formed over a semiconductor substrate, a first opening formed in the first insulating film, a first manganese oxide film formed along an inner wall of the first opening, a first copper wiring embedded in the first opening, and a second manganese oxide film formed on the first copper wiring including carbon.Type: ApplicationFiled: March 10, 2011Publication date: July 28, 2011Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Hiroshi Kudo, Nobuyuki Ohtsuka, Masaki Haneda, Tamotsu Owada