Patents by Inventor Masaki Kondo

Masaki Kondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10967574
    Abstract: A laser additive manufacturing apparatus and a method thereof are provided. The apparatus includes an irradiation unit that irradiates an irradiation region with a laser beam having a light intensity distribution converted by a diffractive optical element, a head having a material supplying unit for supplying powder material to the irradiation region, and a movement mechanism which relatively moves the head and a workpiece. In the irradiation region, irradiation light forms a substantially circular spot having a light intensity distribution in which light intensity in an outer peripheral portion is higher than light intensity in a central portion, and the central portion has predetermined light intensity, and the material supplying unit supplies the powder material to the substantially circular spot.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: April 6, 2021
    Assignee: DMG MORI Company Limited
    Inventor: Masaki Kondo
  • Publication number: 20210095890
    Abstract: Provided is a miniaturized water heater having a plate type heat exchanger. The water heater includes a combustion device generating combustion gas by burning fuel; a heat exchange device heating hot water by heat exchange with the combustion gas; and an exhaust part exhausting the combustion gas after heat exchange. The heat exchange device includes a plate laminate in which vertically standing plates are laminated with gaps, and the hot water is heated by alternately flowing the combustion gas and the hot water through the gaps of the plate laminate. The combustion gas flowing in a vertical direction from the combustion device is introduced vertically or substantially vertically into an introduction part provided on a combustion device side of the plate laminate, and a flow direction of the combustion gas in the plate laminate is reversed to discharge the combustion gas to the exhaust part.
    Type: Application
    Filed: August 10, 2020
    Publication date: April 1, 2021
    Applicant: NORITZ CORPORATION
    Inventors: Midori NISHIKAWA, Masaki KONDO
  • Publication number: 20210097656
    Abstract: A method for generating an image processing filter includes: adjusting; and extracting. The adjusting inputs first training image data into a neural network to generate output image data, calculates an evaluation value based on a loss function using the output image data and second training image data, and adjusts a convolution filter so as to reduce the evaluation value. The extracting extracts data from the adjusted convolution filter as data for the image processing filter. A first training image includes noise and reproduces a test pattern. A second training image includes reduced noise and reproduces the test pattern. The loss function includes a first term and a second term. The first term specifies a magnitude of a difference between the output image data and the second training image data. The second term grows smaller as symmetry of the convolution filter relative to a filter axis of symmetry increases.
    Type: Application
    Filed: September 28, 2020
    Publication date: April 1, 2021
    Inventor: Masaki KONDO
  • Publication number: 20210076903
    Abstract: An endoscope system includes an endoscope including at least one switch, each of which can be assigned two functions, and a controller. The controller sets a plurality of function pairs, each of which is composed of a combination of any one of a plurality of first functions and any one of a plurality of second functions, and assigns one function pair selected from the plurality of function pairs to the switch, measures a switch pressing time period after the switch is pressed, and executes the first function when the switch pressing is released before a predetermined first time period elapses after the switch is pressed and executes the second function when the switch pressing time period passes the first time period.
    Type: Application
    Filed: November 27, 2020
    Publication date: March 18, 2021
    Applicant: OLYMPUS CORPORATION
    Inventors: Takeshi URASAKI, Koichi NIIDA, Masaki KONDO, Takuya OGURA, Aki MATSUMOTO, Ryunosuke MATSUSHIGE, Satoru ONO, Takahiro YUMOTO, Hideyuki WADA, Sachiko HASHIMOTO, Tomomi OUCHI
  • Patent number: 10950622
    Abstract: A semiconductor memory device includes first conductive layers stacked and second conductive layers stacked in a first direction. The second conductive layers spaced from the first conductive layers in a second direction intersecting the first direction. A first memory pillar is between the first conductive layers and the second conductive layers in the second direction. The first memory pillar extends in the first direction and has a first length in the second direction. A second memory pillar is between the first conductive layers and the second conductive layers in the second direction. The second memory pillar is adjacent to the first memory pillar. The second memory pillar extends in the first direction and has a second length greater than the first length in the second direction.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: March 16, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Masaki Kondo
  • Publication number: 20210013383
    Abstract: A light-emitting device is provided. The light-emitting device includes a light-emitting element having a peak light-emitting wavelength in the range of 440 nm to 470 nm, and a fluorescent member. The fluorescent member includes a first fluorescent material having a peak light-emitting wavelength in the range of 480 nm to less than 520 nm, a second fluorescent material having a peak light-emitting wavelength in the range of 520 nm to less than 600 nm, and a third fluorescent material having a peak light-emitting wavelength in the range of 600 nm to 670 nm. The light-emitting device has a ratio of an effective radiant intensity for melatonin secretion suppression to an effective radiant intensity for blue-light retinal damage of 1.53 to 1.70 when the light-emitting device emits light with a correlated color temperature of 2700 K to less than 3500 K; 1.40 to 1.70 when the light-emitting device emits light with a correlated color temperature of 3500 K to less than 4500 K; 1.40 to 1.
    Type: Application
    Filed: September 22, 2020
    Publication date: January 14, 2021
    Applicant: NICHIA CORPORATION
    Inventors: Kazushige FUJIO, Masaki KONDO
  • Patent number: 10890356
    Abstract: The heat exchange device (200) includes a primary heat exchanger (10), a secondary heat exchanger (20), and a connecting pipe (60). The connecting pipe connects the primary heat exchanger and the secondary heat exchanger. The primary heat exchanger (10) includes a primary heat exchange part (11), a shell plate (12) surrounding the primary heat exchange part, and a body pipe part (13) for cooling the shell plate. The body pipe part (13) is disposed closer to a burner than the primary heat exchange part (11) and is connected to the connecting pipe (60). The primary heat exchange part (11) includes a first heat transfer tube part (111) connected to the body pipe part (13), and a second heat transfer tube part (112) connected to the first heat transfer tube part and disposed on a side opposite to the body pipe part with respect to the first heat transfer tube part.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: January 12, 2021
    Assignee: NORITZ CORPORATION
    Inventors: Naoya Shiotsu, Takeshi Ohigashi, Masaki Kondo, Norihide Wada
  • Patent number: 10872900
    Abstract: An example semiconductor device includes: n conductive layers including first to nth conductive layers stacked in a first direction; a first semiconductor region of a first conductive type; a second semiconductor region of a second conductive type closer to the nth conductive layer than the first semiconductor region; a semiconductor layer provided between the first semiconductor region and the second semiconductor region, extending in the first direction, penetrating the n conductive layers, and having an impurity concentration lower than a first conductive impurity concentration of the first region and a second conductive impurity concentration of the second region; n charge storage regions including first to nth charge storage regions provided between the n conductive layers and the semiconductor layer, and a control circuit that controls a voltage applied to the n conductive layers to always prevent charges from being stored in at least one of the n charge storage regions.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: December 22, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tomoya Sanuki, Yusuke Higashi, Hideto Horii, Masaki Kondo, Hiroki Tokuhira, Hideaki Aochi
  • Patent number: 10868037
    Abstract: According to one embodiment, a semiconductor memory device includes: a first interconnecting layer; a first signal line; a first memory cell that stores first information between the first interconnecting layer and the first signal line; second to fourth interconnecting layers provided above the first interconnecting layer; fifth to seventh interconnecting layers disposed apart from the second to fourth interconnecting layers; a second signal line coupled to the first signal line; a third signal line coupled to the first and second signal lines and the sixth interconnecting layer; and, first to fifth transistors.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: December 15, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Fumitaka Arai, Masakazu Goto, Masaki Kondo, Keiji Hosotani, Nobuyuki Momo
  • Patent number: 10853400
    Abstract: A data processing device according to an embodiment includes a sub-vector group generating unit, a codebook generating unit, and a converting unit. The sub-vector group generating unit generates, from a feature vector set of N number of D-dimensional feature vectors, M number of sub-vector groups (where M<D holds true). Each of the M number of sub-vector groups includes N number of dimension-variable sub-vectors obtained from the N number of D-dimensional feature vectors. For each of the M number of sub-vector groups, the codebook generating unit performs clustering of the N number of dimension-variable sub-vectors, and generates a codebook in which the representative vector of each cluster is associated with an index. The converting unit performs product quantization using the codebook and converts each of the N number of D-dimensional feature vectors into a compressed code made of a combination of M number of indexes.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: December 1, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Digital Solutions Corporation
    Inventor: Masaki Kondo
  • Patent number: 10839908
    Abstract: According to one embodiment, a semiconductor memory device includes: a memory string including first and second select transistors and memory cell transistors; a bit line connected to the first select transistor; word lines which are connected to gates of the memory cell transistors, respectively; first and second select gate lines which are connected to gates of the first and second select transistors, respectively; a first contact plug connected to the first select gate line; a first wiring layer provided on the first contact plug; a second contact plug connected to the second select gate line; a second wiring layer provided on the second contact plug; and a row decoder connected to the first and second wiring layers. The row decoder applies different voltages to the first select gate line and the second select gate line.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: November 17, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Takashi Kobayashi, Yoichi Minemura, Eietsu Takahashi, Masaki Kondo, Daisuke Hagishima
  • Patent number: 10818827
    Abstract: A light-emitting device is provided. The light-emitting device includes a light-emitting element having a peak light-emitting wavelength in the range of 440 nm to 470 nm, and a fluorescent member. The fluorescent member includes a first fluorescent material having a peak light-emitting wavelength in the range of 480 nm to less than 520 nm, a second fluorescent material having a peak light-emitting wavelength in the range of 520 nm to less than 600 nm, and a third fluorescent material having a peak light-emitting wavelength in the range of 600 nm to 670 nm. The light-emitting device has a ratio of an effective radiant intensity for melatonin secretion suppression to an effective radiant intensity for blue-light retinal damage of 1.53 to 1.70 when the light-emitting device emits light with a correlated color temperature of 2700 K to less than 3500 K; 1.40 to 1.70 when the light-emitting device emits light with a correlated color temperature of 3500 K to less than 4500 K; 1.40 to 1.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: October 27, 2020
    Assignee: NICHIA CORPORATION
    Inventors: Kazushige Fujio, Masaki Kondo
  • Publication number: 20200324342
    Abstract: A method for producing a rare earth aluminate sintered body includes: preparing a molded body by mixing a fluorescent material having a composition of a rare earth aluminate and a raw material mixture comprising an oxide containing at least one rare earth element Ln selected from the group consisting of Y, La, Lu, Gd, and Tb, an oxide containing Ce, an oxide containing Al, and optionally an oxide containing at least one element M1 selected from the group consisting of Ga and Sc; and calcining the molded body to obtain a sintered body.
    Type: Application
    Filed: April 10, 2020
    Publication date: October 15, 2020
    Applicant: NICHIA CORPORATION
    Inventors: Masaki KONDO, Shozo TAKETOMI, Hirofumi OGURI
  • Patent number: 10797069
    Abstract: A semiconductor memory device includes a semiconductor substrate, a pillar disposed above the semiconductor substrate and extending in a first direction crossing a principal surface of the semiconductor substrate, a plurality of first memory cells arranged on a first side surface of the pillar along the first direction, and a plurality of second memory cells arranged on a second side surface of the pillar along the first direction. The memory device further includes a plurality of first control gate layers respectively connected to the first memory cells, a plurality of second control gate layers respectively connected to the second memory cells, and a stacked film disposed between one of the first control gate layers and one of the second control gate layers, the stacked film including a first insulating layer, a second insulating layer, and an electron capture layer disposed between the first insulating layer and the second insulating layer.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: October 6, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Masaki Kondo
  • Patent number: 10794640
    Abstract: A heat exchanger includes a heat transfer tube in which a plurality of tube body portions are arranged in a two-tier staggered pattern in a flow direction of heating gas, and a fin, wherein a plurality of cut-out recessed portions are provided in the fin by cutting out sites between first and second upstream side tube body portions, and each cut-out recessed portion extends toward a downstream side in the flow direction of the heating gas beyond the site between the first and second upstream side tube body portions so as to cross straight lines linking a center of a first downstream side tube body portion, which is positioned between the first and second upstream side tube body portions in the width direction, and respective centers of the first and second upstream side tube body portions. Thus, the temperature distribution of the fin is made even, thereby suppressing the generation of thermal stress, and as a result, distortion of the heat transfer tube is suppressed.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: October 6, 2020
    Assignee: NORITZ CORPORATION
    Inventors: Masaki Kondo, Takeshi Ohigashi
  • Publication number: 20200303400
    Abstract: According to one embodiment, a semiconductor memory device includes: a first interconnecting layer; a first signal line; a first memory cell that stores first information between the first interconnecting layer and the first signal line; second to fourth interconnecting layers provided above the first interconnecting layer; fifth to seventh interconnecting layers disposed apart from the second to fourth interconnecting layers; a second signal line coupled to the first signal line; a third signal line coupled to the first and second signal lines and the sixth interconnecting layer; and, first to fifth transistors.
    Type: Application
    Filed: July 3, 2019
    Publication date: September 24, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Fumitaka ARAI, Masakazu GOTO, Masaki KONDO, Keiji HOSOTANI, Nobuyuki MOMO
  • Publication number: 20200294554
    Abstract: A semiconductor memory device according to an embodiment includes a substrate, first and second conductive layers, and a first pillar. The first conductive layer is provided above the substrate and includes a first N-type semiconductor region and a first P-type semiconductor region. The second conductive layers are provided above the first conductive layer and stacked at intervals. The first pillar includes a first semiconductor layer and a first insulating layer. The first semiconductor layer is provided through the second conductive layers and is in contact with each of the first N-type semiconductor region and the first P-type semiconductor region. The first insulating layer is provided between the first semiconductor layer and the second conductive layers.
    Type: Application
    Filed: August 30, 2019
    Publication date: September 17, 2020
    Applicant: Toshiba Memory Corporation
    Inventors: Takayuki KAKEGAWA, Shinya NAITO, Masaki KONDO, Takashi KURUSU, Hiroshi TAKEDA, Nayuta KARIYA
  • Patent number: D904587
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: December 8, 2020
    Assignee: NORITZ CORPORATION
    Inventors: Takeshi Oohigashi, Masaki Kondo, Norihide Wada
  • Patent number: D904588
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: December 8, 2020
    Assignee: NORITZ CORPORATION
    Inventors: Takeshi Oohigashi, Masaki Kondo, Norihide Wada
  • Patent number: D904589
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: December 8, 2020
    Assignee: NORITZ CORPORATION
    Inventors: Takeshi Oohigashi, Masaki Kondo, Norihide Wada