Patents by Inventor Masaki Matsui

Masaki Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020016511
    Abstract: A first process for producing an optically active perfluoroalkylcarbinol derivative includes (a) reacting an optically active imine with a compound that is a hemiacetal of a perfluoroalkylaldehyde or a hydrate of a perfluoroalkylaldehyde to obtain a condensate; and (b) hydrolyzing the condensate under an acid condition. A second process for increasing optical purity of an optically active 4,4,4-trifluoro-3-hydroxy-1-aryl-1-butanone derivative includes (a) precipitating a racemic crystal of the derivative, from the derivative; and (b) removing the racemic crystal from the derivative. A third process for increasing optical purity of the butanone derivative includes recrystallizing the derivative. Novel compounds are optically active and inactive 4,4,4-trifluoro-3-hydroxybutanoic aryl ester derivatives.
    Type: Application
    Filed: January 29, 2001
    Publication date: February 7, 2002
    Inventors: Akihiro Ishii, Masatomi Kanai, Takashi Hayami, Katsuyoshi Shibata, Masaki Matsui, Kazumasa Funabiki, Yokusu Kuriyama, Manabu Yasumoto
  • Patent number: 6251754
    Abstract: The invention provides a number of semiconductor substrate manufacturing methods with which, in manufacturing a semiconductor substrate having a semiconductor layer in an insulated state on a supporting substrate, it is possible to obtain a thick semiconductor layer with a simple process and cheaply while reducing impurity contamination of the semiconductor layer to a minimum.
    Type: Grant
    Filed: May 8, 1998
    Date of Patent: June 26, 2001
    Assignee: Denso Corporation
    Inventors: Hisayoshi Ohshima, Masaki Matsui, Kunihiro Onoda, Shoichi Yamauchi
  • Patent number: 6191007
    Abstract: Methods for manufacturing semiconductor substrates in which a semiconductor layer for forming semiconductor device therein is formed on a supporting substrate with an insulating film interposed between, with which in forming the semiconductor layer on a substrate on which a buried pattern structure has been formed it is possible to greatly increase the film thickness uniformity of the semiconductor layer and the film thickness controllability, particularly when the semiconductor layer is being formed as an extremely thin film. As a result, it is possible to achieve improved quality and characteristics of the semiconductor substrates and make possible the deployment of such semiconductor substrates to various uses.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: February 20, 2001
    Assignee: Denso Corporation
    Inventors: Masaki Matsui, Shoichi Yamauchi, Hisayoshi Ohshima, Kunihiro Onoda, Akiyoshi Asai, Takanari Sasaya, Takeshi Enya, Jun Sakakibara
  • Patent number: 6060344
    Abstract: In a method for producing a semiconductor substrate completed through a bonding process for joining a semiconductor wafer to a support substrate by performing heat treatment thereto in a state in which the semiconductor wafer is closely joined to the support substrate, the method according to the present invention includes the following steps, i.e., a depositing process for depositing a poly-crystal semiconductor which covers all areas of a surface to be bonded on the surface of the semiconductor wafer; a heat treatment process for performing the heat treatment to the semiconductor wafer provided after the depositing process, during a predetermined time under a temperature equal to or higher than the heat treatment temperature at the bonding process; and a polishing process for flattening the surface of the poly-crystal semiconductor provided after the heat treatment process. After the above processes were performed in order, the bonding process is performed after the polishing process.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: May 9, 2000
    Assignee: Denso Corporation
    Inventors: Masaki Matsui, Masatake Nagaya, Hisayoshi Ohshima
  • Patent number: 5851846
    Abstract: In a dielectric isolation substrate, an end point of a polishing process for selective polishing for forming an SOI layer is detected with a high precision. When polishing a wafer with a polishing pad, the temperature of a region of the polishing pad having polished the wafer at a position immediately thereafter is detected by a temperature sensor and the selective polishing process is ended by discriminating that the rate of variation in the detected temperature has changed from a positive to a negative state and then to a fixed saturated state.
    Type: Grant
    Filed: December 21, 1995
    Date of Patent: December 22, 1998
    Assignee: Nippondenso Co., Ltd.
    Inventors: Masaki Matsui, Masatake Nagaya, Akinari Fukaya, Hiroaki Himi
  • Patent number: 5451547
    Abstract: Disclosed is a method of manufacturing a semiconductor substrate by bonding two silicon crystalline wafers, and particularly, to a method of manufacturing a semiconductor substrate capable of reduced electrical resistance at the bonding interface. In the disclosed method, the silicon wafers to be bonded have at least one surface mirror-polished. Then they are washed, thus forming a natural oxide film on the surface. Then they are soaked in a concentrated HF solution for enough time to remove the oxide film formed on the surface. After that, the silicon wafers are soaked in ultra pure water to replace the fluorine atoms terminated on the surface thereof by OH groups, followed by drying. The silicon wafers thus treated are closely contacted with each other in such a manner that the mirror-polished surfaces are opposed to each other. The silicon wafers are thus bonded to each other by the hydrogen bonding forces due to the OH groups, and then heat treated for reinforcing the bonding.
    Type: Grant
    Filed: August 25, 1992
    Date of Patent: September 19, 1995
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hiroaki Himi, Masaki Matsui, Tosiaki Nisizawa, Seiji Fujino
  • Patent number: 5223450
    Abstract: A dielectric buried layer is formed inside substrates which are directly bonded together. Firstly, a groove or a recess, or both are formed on the principal bonding plane of one of at least two kinds of semiconductor substrates to be bonded together. Once the semiconductor substrates are bonded together, the groove and recess form a space, which is filled with dielectric. Before forming the dielectric buried layer, the invention carries out a process of removing potential damage from corners of the groove and/or recess.
    Type: Grant
    Filed: April 1, 1991
    Date of Patent: June 29, 1993
    Assignee: Nippon Soken, Inc.
    Inventors: Seiji Fujino, Masaki Matsui, Mitsutaka Katada, Kazuhiro Tsuruta