Patents by Inventor Masaki Narita
Masaki Narita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6763208Abstract: A photoreceptor regenerating apparatus for regenerating a photoreceptor for use in an image forming apparatus including a grinding member that grinds a surface of a used photoreceptor, a photoreceptor measuring device that measures a surface condition of the used photoreceptor, and a grinding condition setting device that sets grinding conditions of the grinding member according to a measurement value of the photoreceptor measuring device.Type: GrantFiled: March 22, 2002Date of Patent: July 13, 2004Assignee: Ricoh Company, Ltd.Inventors: Shinji Nagatsuna, Takeshi Saitou, Takeo Suda, Kenichi Shishido, Masaki Narita
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Patent number: 6685797Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.Type: GrantFiled: March 17, 2000Date of Patent: February 3, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
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Publication number: 20040017011Abstract: A method of manufacturing a semiconductor device comprises forming a first low dielectric constant insulating film over a semiconductor substrate, forming a photoresist pattern on the first low dielectric constant insulating film, etching the first low dielectric constant insulating film to form a concave portion therein, using the photoresist pattern, burying a conductive film in the concave portion after the photoresist pattern is removed, removing an altered layer formed on a sidewall of the concave portion of the first low dielectric constant insulating film after the conductive film is buried, the altered layer being formed when the photoresist pattern is removed, and forming a second low dielectric constant insulating film so as to fill a gap of the sidewall of the concave portion therewith, the gap resulting from removing the altered layer.Type: ApplicationFiled: June 9, 2003Publication date: January 29, 2004Inventors: Masaki Narita, Koichi Sato, Tokuhisa Ohiwa
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Publication number: 20030127188Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.Type: ApplicationFiled: March 17, 2000Publication date: July 10, 2003Inventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
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Patent number: 6560414Abstract: In a photoreceptor for an image forming apparatus including a charging device, a relationship between a thickness “A” of a surface portion of a photosensitive layer abraded by image forming operations, a thickness “B” of a portion of the photosensitive layer ground by an operation of grinding the abraded surface of the photosensitive layer, a number of times “n” the operation of grinding the abraded surface of the photosensitive layer has been executed, and an original photosensitive layer thickness “C” of the photoreceptor is set such that a thickness “D” of a remaining portion of the photosensitive layer after having been ground which is obtained by equation: D=C−[(A+B)×n+A], is equal to or greater than a thickness of the photosensitive layer in which leakage from the charging device to the photoreceptor does not occur, so that the photoreceptor may be reused.Type: GrantFiled: November 21, 2001Date of Patent: May 6, 2003Assignee: Ricoh Company, Ltd.Inventors: Takeo Suda, Takeshi Saitou, Masaki Narita, Shinji Nagatsuna, Kenichi Shishido
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Publication number: 20020192972Abstract: A plasma processing method comprises placing a substrate to be processed in a chamber having an inner wall, subjecting the substrate to plasma processing while the inner wall is set to a first temperature, and cleaning the inner wall by using plasma while the inner wall is set to a second temperature higher than the first temperature.Type: ApplicationFiled: March 28, 2002Publication date: December 19, 2002Inventors: Masaki Narita, Katsuya Okumura, Tokuhisa Ohiwa
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Publication number: 20020155727Abstract: A method of making a semiconductor device, comprises preparing a plurality of lots each including semiconductor substrates to be processed, the plurality of lots including at least first and second lots, processing the plurality of lots for every one lot, using a semiconductor manufacturing apparatus, judging whether or not the semiconductor manufacturing apparatus is subjected to cleaning before the second lot is processed, depending upon both a first processing type of the first lot to be processed and a second processing type of the second lot to be processed after the first lot, and processing the second lot without the cleaning in the case where the second lot does not require the cleaning.Type: ApplicationFiled: March 28, 2002Publication date: October 24, 2002Inventors: Masaki Narita, Katsuya Okumura, Tokuhisa Ohiwa
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Publication number: 20020136565Abstract: A photoreceptor regenerating apparatus for regenerating a photoreceptor for use in an image forming apparatus including a grinding member that grinds a surface of a used photoreceptor, a photoreceptor measuring device that measures a surface condition of the used photoreceptor, and a grinding condition setting device that sets grinding conditions of the grinding member according to a measurement value of the photoreceptor measuring device.Type: ApplicationFiled: March 22, 2002Publication date: September 26, 2002Inventors: Shinji Nagatsuna, Takeshi Saitou, Takeo Suda, Kenichi Shishido, Masaki Narita
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Publication number: 20020090221Abstract: In a photoreceptor for an image forming apparatus including a charging device, a relationship between a thickness “A” of a surface portion of a photosensitive layer abraded by image forming operations, a thickness “B” of a portion of the photosensitive layer ground by an operation of grinding the abraded surface of the photosensitive layer, a number of times “n” the operation of grinding the abraded surface of the photosensitive layer has been executed, and an original photosensitive layer thickness “C” of the photoreceptor is set such that a thickness “D” of a remaining portion of the photosensitive layer after having been ground which is obtained by equation: D=C−[(A+B)×n+A], is equal to or greater than a thickness of the photosensitive layer in which leakage from the charging device to the photoreceptor does not occur, so that the photoreceptor may be reused.Type: ApplicationFiled: November 21, 2001Publication date: July 11, 2002Inventors: Takeo Suda, Takeshi Saitou, Masaki Narita, Shinji Nagatsuna, Kenichi Shishido
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Patent number: 6383942Abstract: A dry etching method is disclosed for use in patterning a stacked film of a metal film containing aluminum as the base component and a thin film including at least one of titanium and titanium nitride. In this method, the thin film is dry-etched using a first etching gas (a mixture of CF4 gas, Ar gas and Cl gas) having a gas composition for preventing the metal film from being processed. The metal film is then dry-etched using a second etching gas (a mixture of Cl gas and BCl3 gas) having a gas composition other than the first etching gas.Type: GrantFiled: March 9, 2000Date of Patent: May 7, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Masaki Narita, Hiroshi Sugiura
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Patent number: 6376347Abstract: Disclosed is a method of making a gate wiring layer, in which a carbon-based layer is patterned by dry etching using a gas that does not etch a gate insulating layer so as to form a gate wiring layer without deteriorating the gate insulating layer and without etching the semiconductor substrate. In forming a gate insulating layer and a gate wiring layer on a semiconductor substrate, a carbon-based layer is formed on a semiconductor substrate, followed by forming a predetermined mask on the layer for patterning the layer. The carbon-based layer is etched by dry etching using an oxygen gas, a carbon monoxide gas or a mixed gas containing an oxygen gas, a nitrogen gas, a carbon monoxide gas and an argon gas and without containing a halogen gas. The etching is selectively stopped by the insulating layer. The insulating layer of, for example, SiO2 is etched by dry etching using a halogen-containing gas, but is scarcely etched by dry etching using an oxygen-containing gas that does not contain a halogen gas.Type: GrantFiled: September 21, 2000Date of Patent: April 23, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Mitsuhiro Ohmura, Masaki Narita
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Patent number: 6368977Abstract: There is provided a semiconductor device manufacturing method that comprises a first step of loading a processed substrate in a reaction chamber, a second step of introducing a reaction gas into the reaction chamber at a predetermined flow rate, a third step of maintaining an interior of the reaction chamber at a predetermined pressure, a fourth step of starting generation of plasma by supplying a high frequency power to an electrode arranged in the reaction chamber, a fifth step of applying a predetermined process to the processed substrate, and a sixth step of stopping generation of the plasma by stopping supply of the high frequency power after the predetermined process is completed, wherein the reaction gas is introduced continuously when the generation of the plasma is stopped.Type: GrantFiled: June 29, 2000Date of Patent: April 9, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Masaki Narita, Yukimasa Yoshida, Katsuaki Aoki, Hiroshi Fujita, Takashi O, Toshimitsu Omine, Isao Matsui, Osamu Yamazaki, Naruhiko Kaji
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Patent number: 6333246Abstract: A semiconductor device manufacturing method comprises the steps of placing a substrate to be processed on an electrostatic chuck on a substrate stand in a process chamber, and applying a negative voltage to the electrostatic chuck. After applying the negative voltage, the substrate is stuck onto the electrostatic chuck, a process gas is introduced into the process chamber, discharge plasma is generated, and the substrate is processed as predetermined.Type: GrantFiled: June 28, 2000Date of Patent: December 25, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Masaki Narita, Yukimasa Yoshida, Katsuaki Aoki, Hiroshi Fujita, Osamu Yamazaki, Toshimitsu Omine, Isao Matsui, Takashi O
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Patent number: 6313535Abstract: A wiring layer of a semiconductor integrated circuit comprises a first conductive film made of a material containing Al. A material, which reacts with Al at a rate lower than that at which Ti reacts with Al, is provided on the first conductive film. A first barrier metal film is formed, and an interlayer insulating film is formed thereon. An opening is formed in the interlayer insulating film so as to expose the first barrier metal film. The opening is buried to form a second conductive film electrically connected to the first conductive film.Type: GrantFiled: March 16, 1999Date of Patent: November 6, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Junichiro Iba, Masaki Narita, Tomio Katata
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Patent number: 6274507Abstract: A semiconductor processing apparatus includes a load chamber, an unload chamber, a common transfer chamber, a first process chamber, and a second process chamber, which are connected via gate valves. The load and unload chambers are connected to a first vacuum-exhaust mechanism including a common dry pump. The common transfer chamber is connected to a second vacuum-exhaust mechanism including a dry pump. The first and second processes chambers are connected to a third vacuum-exhaust mechanism including a common dry pump, and first and second turbo molecular pumps. The processing apparatus includes a controller which can drive and stop the dry pumps independently of each other in coordination with open/closed switching of the gate valves, while keeping the turbo molecular pumps driven.Type: GrantFiled: January 7, 1999Date of Patent: August 14, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Masaki Narita, Yukimasa Yoshida, Kei Hattori, Katsuya Okumura
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Patent number: 6270948Abstract: A method of forming a pattern which comprises the steps of, forming an organosilicon film on a work film, the organosilicon film comprising an organosilicon compound having a silicon-silicon bond in a backbone chain thereof and a glass transition temperature of 0° C. or more, forming a resist pattern on the organosilicon film, and transcribing the resist pattern on the organosilicon film through an etching of the organosilicon film by making use of an etching gas containing at least one kind of atom selected from the group consisting of chlorine, bromine and iodine. The organosilicon pattern obtained by the etching is employed as a mask for patterning the work film.Type: GrantFiled: June 7, 1999Date of Patent: August 7, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Yasuhiko Sato, Yoshihiko Nakano, Rikako Kani, Shuji Hayase, Yasunobu Onishi, Eishi Shiobara, Seiro Miyoshi, Hideto Matsuyama, Masaki Narita, Sawako Yoshikawa
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Patent number: 6025117Abstract: A polysilane having a repeating unit represented by the following general formula (LPS-I), ##STR1## wherein A is a bivalent organic group, R.sup.1 substituents may be the same or different and are selected from hydrogen atom and substituted or unsubstituted hydrocarbon group and silyl group. The polysilane is excellent in solublity in an organic solvent so that it can be formed into a film by way of a coating method, which is excellent in mechanical strength and heat resistance. The polysilane can be employed as an etching mask to be disposed under a resist in a manufacturing method of a semiconductor device. The polysilane exhibits anti-reflective effect during exposure, a large etch rate ratio in relative to a resist, and excellent dry etching resistance.Type: GrantFiled: December 8, 1997Date of Patent: February 15, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Yoshihiko Nakano, Rikako Kani, Shuji Hayase, Yasuhiko Sato, Seiro Miyoshi, Toru Ushirogouchi, Sawako Yoshikawa, Hideto Matsuyama, Yasunobu Onishi, Masaki Narita, Toshiro Hiraoka
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Patent number: 6014963Abstract: A method and apparatus for controlling the air-fuel ratio in an internal combustion engine wherein, when the operating condition of the internal combustion engine has shifted between learning zones, a learning control updates a correction value after the shift is made in accordance with a stand-by function of a control unit to reduce the occurrence of mislearning, perform the correction value updating learning control efficiently and effect the purification of exhaust gases. In the air-fuel ratio controlling method for the internal combustion engine, when the operating condition of the engine has shifted between learning zones, a learning control updates a correction value in accordance with a stand-by function.Type: GrantFiled: December 2, 1998Date of Patent: January 18, 2000Assignee: Suzuki Motor CorporationInventor: Masaki Narita
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Patent number: 5976986Abstract: RIE of metallization is achieved at low power and low pressure using Cl.sub.2 and HCl as reactant species by creating a transformer coupled plasma with power applied to electrodes positioned both above and below a substrate with metallization thereon to be etched. Three layer metallizations which include bulk aluminum or aluminum alloy sandwiched between barrier layers made from, for example, Ti/TiN, are etched in a three step process wherein relatively lower quantities of Cl.sub.2 are used in the plasma during etching of the barrier layers and relatively higher quantities of Cl.sub.2 are used during etching of the bulk aluminum or aluminum alloy layer. The ratio of etchants Cl.sub.2 and HCl and an inert gas, such as N.sub.2 are controlled in a manner such that a very thin side wall layer (10-100 .ANG.) of reaction byproducts created during RIE are deposited on the side walls of trenches formed in the metallization during etching.Type: GrantFiled: August 6, 1996Date of Patent: November 2, 1999Assignees: International Business Machines Corp., Siemens Aktiengesellschaft, Kabushiki Kaisha ToshibaInventors: Munir D. Naeem, Stuart M. Burns, Rosemary Christie, Virinder Grewal, Walter W. Kocon, Masaki Narita, Bruno Spuler, Chi-Hua Yang
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Patent number: 5926203Abstract: A method and apparatus that prevent degradation of an image quality due to a change of a beam pitch in a subscanning direction of each optical beam on a record medium. At a given time, for example, when power is first turned on, a CPU detects a beam pitch on a record medium, e.g., a photosensitive drum, by using a CCD line image sensor. If the detected value differs from a value set according to a currently-selected scanning density, an LD arrangement change motor is rotated via a motor driver so that the beam pitch matches the set value so as to change an arrangement of laser diodes in a laser diode array. Control over the beam pitch occurs for a variety of conditions including control at regular intervals, power-on events, or when a scanning density specification signal indicates a different beam pitch than the detected beam pitch. Similarly, adjustment over the beam pitch is not typically made during a copying operation.Type: GrantFiled: November 18, 1996Date of Patent: July 20, 1999Assignee: Ricoh Company, Ltd.Inventors: Akira Shimura, Shuichi Yamazaki, Tomohiro Nakajima, Masaki Narita