Patents by Inventor Masamichi Azuma
Masamichi Azuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20020000589Abstract: A semiconductor device includes: a silicon substrate; a MOS semiconductor device provided on the silicon substrate, the MOS semiconductor device including a silicide region on an outermost surface thereof; a first insulating film covering the MOS semiconductor device; a capacitor element provided on the first insulating film, the capacitor element comprising a lower electrode, an upper electrode, and a capacitor film interposed between the lower electrode and the upper electrode, and the capacitor film comprising a ferroelectric material; a second insulating film covering the first insulating film and the capacitor element; a contact hole provided in the first insulating film and the second insulating film over the MOS semiconductor device and the capacitor element; and an interconnection layer provided on the second insulating film for electrically connecting the MOS semiconductor device and the capacitor element to each other, wherein a bottom portion of the interconnection layer comprises a conductive mateType: ApplicationFiled: November 12, 1998Publication date: January 3, 2002Inventors: YOSHIHISA NAGANO, YASUHIRO UEMOTO, YUJI JUDAI, MASAMICHI AZUMA, EIJI FUJII
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Publication number: 20010054728Abstract: Integrated circuit capacitors in which the capacitor dielectric is a thin film of BST having a grain size smaller than 200 nanometers formed above a silicon germanium substrate. Typical grain sizes are 40 nm and less. The BST is formed by deposition of a liquid precursor by a spin-on process. The original liquid precursor includes an alkoxycarboxylate dissolved in 2-methoxyethanol and a xylene exchange is performed just prior to spinning. The precursor is dried in air at a temperature of about 400° C. and then furnace annealed in oxygen at a temperature of between 600° C. and 850° C.Type: ApplicationFiled: July 16, 2001Publication date: December 27, 2001Applicant: Symetrix CorporationInventors: Carlos A. Paz de Araujo, Masamichi Azuma, Larry D. McMillan, Koji Arita
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Patent number: 6327135Abstract: A silicon nitride barrier layer is deposited on a gallium arsenide substrate to prevent evaporation of the substrate in subsequent heating steps. A silicon dioxide stress reduction layer is deposited on the barrier layer. A first electrode is formed on the stress reduction layer, then a liquid precursor is spun on the first electrode, dried at about 400° C., and annealed at between 600° C. and 850° C. to form a BST capacitor dielectric. A second electrode is deposited on the dielectric and annealed.Type: GrantFiled: May 8, 1995Date of Patent: December 4, 2001Inventors: Masamichi Azuma, Carlos A. Paz De Araujo, Michael C. Scott, Toshiyuki Ueda
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Patent number: 6310373Abstract: An MIS device (20) includes a semiconducting substrate (22), a silicon nitride buffer layer (24), a ferroelectric metal oxide superlattice material (26), and a noble metal top electrode (28). The layered superlattice material (26) is preferably a strontium bismuth tantalate, strontium bismuth niobate, or strontium bismuth niobium tantalate. The device is constructed according to a preferred method that includes forming the silicon nitride on the semiconducting substrate prior to deposition of the layered superlattice material. The layered superlattice material is preferably deposited using liquid polyoxyalkylated metal organic precursors that spontaneously generate a layered superlattice upon heating of the precursor solution. UV exposure during drying of the precursor liquid imparts a C-axis orientation to the final crystal, and results in improved thin-film electrical properties.Type: GrantFiled: August 21, 1995Date of Patent: October 30, 2001Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Carlos A. Paz De Araujo
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Publication number: 20010019874Abstract: A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.Type: ApplicationFiled: January 24, 2001Publication date: September 6, 2001Applicant: Matsushita Electronics CorporationInventors: Yasuhiro Uemoto, Eiji Fujii, Koji Arita, Yoshihisa Nagano, Yasuhiro Shimada, Masamichi Azuma, Atsuo Inoue, Yasufumi Izutsu
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Patent number: 6285048Abstract: Integrated circuit capacitors in which the capacitor dielectric is a thin film of BST having a grain size smaller than 2000 Å. Typical gain sizes are 40 nanometers and less. The BST is formed by deposition of a liquid precursor by a spin-on process. The original liquid precursor includes an alkoxycarboxylate dissolved in 2-methoxyethanol and an xylene exchange is preformed just prior to spinning. The precursor is dried in air at a temperature of about 400° C. and then furnace annealed in oxygen at a temperature of between 675° C. and 850° C.Type: GrantFiled: December 10, 1993Date of Patent: September 4, 2001Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Michael C. Scott, Carlos A. Paz de Araujo, Joseph D. Cuchiaro
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Patent number: 6214660Abstract: A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.Type: GrantFiled: October 23, 1998Date of Patent: April 10, 2001Assignee: Matsushita Electronics CorporationInventors: Yasuhiro Uemoto, Eigi Fujii, Koji Arita, Yoshihisa Nagano, Yasuhiro Shimada, Masamichi Azuma, Atsuo Inoue, Yasufumi Izutsu
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Patent number: 6204111Abstract: A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.Type: GrantFiled: January 28, 1999Date of Patent: March 20, 2001Assignee: Matsushita Electronics CorporationInventors: Yasuhiro Uemoto, Eiji Fujii, Koji Arita, Yoshihisa Nagano, Yasuhiro Shimada, Masamichi Azuma, Atsuo Inoue, Yasufumi Izutsu
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Patent number: 6133050Abstract: A precursor solution formed of a liquid polyoxyalkylated metal complex in as solvent is applied to a substrate in the formation of a metal oxide thin film. The liquid thin film is baked in air to a temperature up to 500.degree. C. while UV radiation having a wavelength ranging from 180 nm to 300 nm is applied. The thin film can be twice-baked at increasing temperatures while UV radiation is applied at one or both bakings. The film is then annealed at temperature ranging from about 700.degree. C. to 850.degree. C. to produce a thin-film solid metal oxide product. Alternatively, the UV radiation may be applied to the liquid precursor, the thin film may be annealed with UV radiation, or combinations of such applications of UV radiation to the precursor, to the thin film before or after baking, and/or UV annealing may be used. The use of UV radiation significantly reduces the leakage current and carbon impurity content of the final metal oxide.Type: GrantFiled: March 17, 1995Date of Patent: October 17, 2000Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Larry D. McMillan, Carlos A. Paz de Araujo, Michael C. Scott
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Patent number: 6033920Abstract: This invention relates to a semiconductor device with embedded capacitor elements of which capacitor insulation layer is made of ferroelectric layer or dielectric layer of high dielectric constant, and its manufacturing method. This invention is made in order to solve the problems of rapid increase of leak current of capacitor element and the poor reliability caused by the large deviation of crystal sizes of conventional capacitor insulation layer of capacitor element incorporated in the semiconductor device.Type: GrantFiled: July 24, 1998Date of Patent: March 7, 2000Assignee: Matsushita Electronics CorporationInventors: Yasuhiro Shimada, Yasuhiro Uemoto, Atsuo Inoue, Taketoshi Matsuura, Masamichi Azuma
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Patent number: 6025619Abstract: A method for fabricating an integrated circuit capacitor having a dielectric layer comprising BST with excess A-site and B-site materials such as barium and titanium added. An organometallic or metallic soap precursor solution is prepared comprising a stock solution of BST of greater than 99.999% purity blended with excess A-site and B-site materials such as barium and titanium such that the barium is in the range of 0.01-100 mol %, and such that the titanium is in the range of 0.01-100 mol %. A xylene exchange is then performed to adjust the viscosity of the solution for spin-on application to a substrate. The precursor solution is spun on a first electrode, dried at 400.degree. C. for 2 to 10 minutes, then annealed at 650.degree. C. to 800.degree. C. for about an hour to form a layer of BST with excess titanium. A second electrode is deposited, patterned, and annealed at between 650.degree. C. to 800.degree. C. for about 30 minutes.Type: GrantFiled: December 2, 1997Date of Patent: February 15, 2000Inventors: Masamichi Azuma, Carlos A. Paz De Araujo, Michael C. Scott
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Patent number: 5972428Abstract: A liquid primer is misted, flowed into a deposition chamber and deposited on a substrate. A liquid precursor is then misted, flowed into a deposition chamber and deposited on the substrate. The primer and precursor are dried to form a solid thin film, which is then annealed to form a part of an electronic component in an integrated circuit, such as the dielectric in a memory cell. The primer is a solvent, and the precursor includes a metal carboxylate, a metal alkoxide, or a metal alkoxycarboxylate in a precursor solvent. Preferably, the primer and the precursor solvent are the same solvent, such as 2-methoxyethanol, xylenes, or n-butyl acetate.Type: GrantFiled: March 5, 1996Date of Patent: October 26, 1999Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Shinichiro Hayashi, Larry D. McMillan, Masamichi Azuma, Carlos A. Paz de Araujo
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Patent number: 5962085Abstract: A substrate is located within a deposition chamber, the substrate defining a substrate plane. A barrier plate is disposed in spaced relation above the substrate and substantially parallel thereto, the area of said barrier plate in a plane parallel to said substrate being substantially equal to said area of said substrate in said substrate plane, i.e. within 10% of said substrate area. The barrier plate has a smoothness tolerance of 5% of the average distance between said barrier plate and said substrate. A mist is generated, allowed to settle in a buffer chamber, filtered through a 1 micron filter, and flowed into the deposition chamber between the substrate and barrier plate to deposit a liquid layer on the substrate. The liquid is dried to form a thin film of solid material on the substrate, which is then incorporated into an electrical component of an integrated circuit.Type: GrantFiled: March 4, 1996Date of Patent: October 5, 1999Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Shinichiro Hayashi, Larry D. McMillan, Masamichi Azuma, Carlos A. Paz de Araujo
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Patent number: 5955754Abstract: Metal alkoxycarboxylate-based liquid precursor solutions are used form electronic devices (100) that include mixed layered superlattice materials (112) of a type having discrete oxygen octahedral layers (124) and (128) collated with a superlattice-generator layer (116). The precursor solutions include a plurality of metal moieties in effective amounts for yielding the layered superlattice materials. These metal moieties are mixed to include an A/B portion capable of forming an A/B layer (124), a perovskite-like AB layer portion capable of forming a perovskite-like AB octahedral layer (128), and a superlattice-generator portion capable of forming the superlattice-generator layer (116). The precursors are deposited in liquid form upon a substrate and annealed to provide the layered superlattice materials.Type: GrantFiled: March 17, 1995Date of Patent: September 21, 1999Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Carlos A. Paz De Araujo, Larry D. McMillan
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Patent number: 5932281Abstract: A method of forming a Bi-layered ferroelectric thin film on a substrate with good reproducibility, using a mixed composition of a Bi-containing organic compound and a metal polyalkoxide compound by at least one technique selected from the group consisting of molecular deposition such as CVD, and spincoat-sintering.Type: GrantFiled: May 9, 1997Date of Patent: August 3, 1999Assignees: Matsushita Electronics Corporation, Kojundo Chemical Laboratory Co., Ltd., Symetrix CorporationInventors: Yukoh Hochido, deceased, Hidekimi Kadokura, Masamichi Matsumoto, Koji Arita, Masamichi Azuma, Tatsuo Otsuki
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Patent number: 5929475Abstract: A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.Type: GrantFiled: December 15, 1995Date of Patent: July 27, 1999Inventors: Yasuhiro Uemoto, Eigi Fujii, Koji Arita, Yoshihisa Nagano, Yasuhiro Shimada, Masamichi Azuma, Atsuo Inoue, Yasufumi Izutsu
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Patent number: 5920574Abstract: A method for an accelerated test of semiconductor devices comprises the steps of determining a relational expression t.sub.1 =t.sub.2.sup.m between an information holding lifetime t.sub.1 at a temperature T.sub.1 and another lifetime t.sub.2 at another temperature T.sub.2, expressing the exponent m as a function of the temperature that is proportional to the Boltzmann's factor, and calculating the information holding lifetime t.sub.2 at the temperature T.sub.2 on the basis of the information holding lifetime t.sub.1 at the temperature T.sub.1 using the relational expression.Type: GrantFiled: September 18, 1997Date of Patent: July 6, 1999Assignee: Matsushita Electronics CorporationInventors: Yasuhiro Shimada, Keisaku Nakao, Atsuo Inoue, Masamichi Azuma, Eiji Fujii
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Patent number: 5909042Abstract: A precursor solution formed of a liquid polyoxyalkylated metal complex in a solvent is applied to a substrate in the formation of a metal oxide thin film. The liquid thin film is baked in air to a temperature up to 500.degree. C. while UV radiation having a wavelength ranging from 180 nm to 300 nm is applied. The thin film can be twice-baked at increasing temperatures while UV radiation is applied at one or both bakings. The film is then annealed at temperature ranging from about 700.degree. C. to 850.degree. C. to produce a thin-film solid metal oxide product. Alternatively, the UV radiation may be applied to the liquid precursor, the thin film may be annealed with UV radiation, or combinations of such applications of UV radiation to the precursor, to the thin film before or after baking, and/or UV annealing may be used. The use of UV radiation significantly reduces the leakage current and carbon impurity content of the final metal oxide.Type: GrantFiled: May 8, 1996Date of Patent: June 1, 1999Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Larry D. McMillan, Carlos A. Paz De Araujo, Michael C. Scott
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Patent number: 5871853Abstract: A precursor solution formed of a liquid polyoxyalkylated metal complex in a solvent is applied to a substrate in the formation of a metal oxide thin film. The liquid thin film is baked in air to a temperature up to 500.degree. C. while UV radiation having a wavelength ranging from 180 nm to 300 nm is applied. The thin film can be twice-baked at increasing temperatures while UV radiation is applied at one or both bakings. The film is then annealed at temperature ranging from about 700.degree. C. to 850.degree. C. to produce a thin-film solid metal oxide product. Alternatively, the UV radiation may be applied to the liquid precursor, the thin film may be annealed with UV radiation, or combinations of such applications of UV radiation to the precursor, to the thin film before or after baking, and/or UV annealing may be used. The use of UV radiation significantly reduces the leakage current and carbon impurity content of the final metal oxide.Type: GrantFiled: May 8, 1996Date of Patent: February 16, 1999Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Larry D. McMillan, Carlos A. Paz De Araujo, Michael C. Scott
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Patent number: 5840110Abstract: Metal alkoxycarboxylate-based liquid precursor solutions are used to form electronic devices (100) that include mixed layered superlattice materials of a type having discrete oxygen octahedral layers and collated with a superlattice-generator layer. The precursor solutions include a plurality of metal moieties in effective amounts for yielding the layered superlattice materials. These metal moieties are mixed to include an A/B portion capable of forming an A/B layer, a perovskite-like AB layer portion capable of forming a perovskite-like AB octahedral layer, and a superlattice-generator portion capable of forming the superlattice-generator layer. The precursors are deposited in liquid form upon a substrate and annealed to provide the layered superlattice materials.Type: GrantFiled: May 10, 1996Date of Patent: November 24, 1998Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Carlos A. Paz De Araujo, Larry D. McMillan