Abstract: This invention relates to a semiconductor device with embedded capacitor elements of which capacitor insulation layer is made of ferroelectric layer or dielectric layer of high dielectric constant, and its manufacturing method. This invention is made in order to solve the problems of rapid increase of leak current of capacitor element and the poor reliability caused by the large deviation of crystal sizes of conventional capacitor insulation layer of capacitor element incorporated in the semiconductor device.

Abstract: An encapsulated capacitor structure and method for fabricating same. The capacitor structure is created by selectively depositing a lower electrode, a dielectric thin film of BST or other ferrodielectric, and an upper electrode, onto a substrate, and subsequently depositing a conformal layer of a non-reductively deposited dielectric material. Contact windows are then opened through the encapsulating layer for contacting the capacitor electrodes. The underlying structure is protected by the encapsulating layer from metal deposition and post-processing which would otherwise damage the structure.

Abstract: A method for fabricating an integrated circuit capacitor having a dielectric layer comprising BST with excess B-site material, such as titanium, added. A polyoxyalkylated metal liquid precursor solution is prepared comprising a stock solution of BST of greater then 99.999% purity blended with excess B-site material such as titanium such that the titanium is in the range of 0-100 mol %. A xylene exchange is then performed to adjust the viscosity of the solution for spin-on application to a substrate. The precursor is spun on a first electrode, dried at 400.degree. C. for 2 minutes, then annealed at 650.degree. C. to 800.degree. C. for about an hour to form a layer of BST with excess titanium. A second electrode is deposited, patterned, and annealed at between 650.degree. C. to 800.degree. C. for about 30 minutes. The resultant capacitor exhibits an enlarged dielectric constant with only a small increase in leakage current.

Abstract: Metal alkoxycarboxylate-based liquid precursor solutions are used to form electronic devices (100) that include mixed layered superlattice materials (112) of a type having discrete oxygen octahedral layers (124) and (128) collated with a superlattice-generator layer (116). The precursor solutions include a plurality of metal moieties in effective amounts for yielding the layered superlattice materials. These metal moieties are mixed to include an A/B portion capable of forming an A/B layer (124), a perovskite-like AB layer portion capable of forming a perovskite-like AB octahedral layer (128), and a superlattice-generator portion capable of forming the superlattice-generator layer (116). The precursors are deposited in liquid form upon a substrate and annealed to provide the layered superlattice materials.

Abstract: A method for fabricating an integrate circuit capacitor having a dielectric layer comprising BST with excess A-site and B-site materials such as barium and titanium added. An organometallic or metallic soap precursor solution is prepared comprising a stock solution of BST of greater than 99.999% purity blended with excess A-site and B-site materials such as barium and titanium such that the barium is in the range of 0.01-100 mol %, and such that the titanium is in the range of 0.01-100 mol %. A xylene exchange is then performed to adjust the viscosity of the solution for spin-on application to a substrate. The precursor solution is spun on a first electrode, dried at 400.degree. C. for 2 to 10 minutes, then annealed at 650.degree. C. to 800.degree. C. for about an hour to form a layer of BST with excess titanium. A second electrode is deposited, patterned, and annealed at between 650.degree. C. to 800.degree. C. for about 30 minutes.

Abstract: An integrated circuit capacitor (20) includes a bottom electrode structure (24) having an adhesion metal portion (34), a noble metal portion (36), and a second noble metal layer (40). A process of manufacture includes annealing the adhesion metal portion (34) and the noble metal portion (36) prior to the deposition of second noble metal layer (40) for purposes of forming barrier region (38). The electrode (24) preferably contacts metal oxide layer (26), which is made of a perovskite or perovskite-like layered superlattice material. A temporary capping layer (59) is formed and removed in manufacture, which serves to increase polarization potential from the device by at least 40%.

Abstract: A method for fabricating an integrated circuit capacitor having a dielectric layer comprising BST with excess B-site material, such as titanium, added. A polyoxyalkylated metal liquid precursor solution is prepared comprising a stock solution of BST of greater then 99.999% purity blended with excess B-site material such as titanium such that the titanium is in the range of 0-100 mol %. A xylene exchange is then performed to adjust the viscosity of the solution for spin-on application to a substrate. The precursor is spun on a first electrode, dried at 400.degree. C. for 2 minutes, then annealed at 650.degree. C. to 800.degree. C. for about an hour to form a layer of BST with excess titanium. A second electrode is deposited, patterned, and annealed at between 650.degree. C. to 800.degree. C. for about 30 minutes. The resultant capacitor exhibits an enlarged dielectric constant with only a small increase in leakage current.

Abstract: A method for fabricating a semiconductor capacitor having superior sidewall linearity and high capacitance in a small area wherein a titanate or tantalum barrier metal platform is deposited on the insulation layer of the semi conductor substrate. A capacitor structure comprising a first electrode layer of platinum or palladium, a dielectric layer preferably of a ferroelectric having a perovskite structure, and a second metal electrode layer is then constructed by sequential deposition of said layers. The subsequently deposited electrode metal of platinum or palladium will adhere to said barrier metal but delaminate from said insulation layer during high temperature cycling, yielding a high capacitance, small surface area structure.

Abstract: A method for fabricating an integrated circuit capacitor having a dielectric layer comprising BST with excess B-site material, such as titanium, added. A polyoxyalkyated metal liquid precursor solution is prepared comprising a stock solution of BST of greater then 99.999% purity blended with excess B-site material such as titanium such that the titanium is in the range of 0-100 mol %. A xylene exchange is then performed to adjust the viscosiy of the solution for spin-on application to a substrate. The precursor is spun on a first electrode, dried at 400.degree. C. for 2 minutes, then annealed at 650.degree. C. to 800.degree. C. for about an hour to form a layer of BST with excess titanium. A second electrode is deposited, patterned, and annealed at between 650.degree. C. to 800.degree. C. for about 30 minutes. The resultant capacitor exhibits an enlarged dielectric constant with only a small increase in leakage current.

Abstract: A silicon nitride barrier layer is deposited on a gallium arsenide substrate to prevent evaporation of the substrate in subsequent heating steps. A silicon dioxide stress reduction layer is deposited on the barrier layer. A first electrode is formed on the stress reduction layer, then a liquid precursor is spun on the first electrode, dried at about 400.degree. C., and annealed at between 600.degree. C. and 850.degree. C. to form a BST capacitor dielectric. A second electrode is deposited on the dielectric and annealed.

Abstract: A xylene exchange is performed on a stock solution of BST of greater then 99.999% purity dissolved in methoxyethanol, and a carboxylate of a dopant metal, such as magnesium 2-ethylhexanoate is added to form a precursor. The precursor is spun on a first electrode, dried at 400.degree. C. for 2 minutes, then annealed at 750.degree. C. to 800.degree. C. for about an hour to form a layer of accurately doped BST. A second electrode is deposited, patterned, and annealed at between 750.degree. C. to 800.degree. C. for about 30 minutes. Excellent leakage current results if the dopant is magnesium of about 5% molarity. For other dopants, such as Mg, Nb, Y, Bi, and Sn the preferred dopant range is 0.2% to 0.3% molarity. The magnesium-doped material is used as a buffer layer between the electrodes and BST dielectric of an undoped BST capacitor.

Abstract: Metals are reacted in a first solvent, such as 2-methoxyethanol, to form an initial precursor comprising metal-oxide compounds dissolved in the first solvent. A second solvent, such as xylene, that does not react with the metal is added to the solution and the solution heated to distill away the first solvent and form a final precursor. The final precursor is spin-coated on an integrated circuit substrate then dried and annealed to form a thin film of a metal oxide. For metal oxides including bismuth, the bismuth precursor is added to a cold initial precursor and the final precursor is not heated after the bismuth precursor is added. The second solvent wets the substrate better than the first solvent and has a better viscosity for spin-coating, thus resulting in a denser thin film with fewer imperfections.

Abstract: Metal doping agents are introduced into metal polyoxyalkylated liquid precursor solutions for use in processes for forming thin-layer capacitors (10) to be used in integrated circuits such as DRAMS and the like. The dopants serve to reduce capacitor leakage current by altering a dominant type of electron emission, as determined by a change in the slope of a line plotted as leakage current versus bias voltage. The specially doped precursor solutions preferably include mixtures of Ce, Cr, Dy, Mn, and Ti moieties.