Abstract: To simultaneously avoid contact with a front subframe and secure a connection space for a harness, a front subframe has a right and left pair of side frame sections, each of which is located in front of and below a dashboard. A converter and a vehicle component are provided behind a rear end portion of one of the side frame sections. The converter is arranged along a lower surface of a floor panel, and the vehicle component is arranged adjacent to rear of the converter. The converter is arranged in a vertically inclined state, a front-end portion of the converter is located higher than the rear end portion of the side frame section, and a rear end portion of the converter is located lower than the vehicle component.

Abstract: A battery unit arrangement structure for a vehicle increases legroom for a passenger while disposing a battery in front of the passenger seat. The structure includes a dash vertical wall separating an interior from an engine compartment, a floor panel of the interior, and a curved corner portion connecting the lower end of the dash vertical wall and the front end of the floor panel together. The battery unit is mounted on the corner portion in front of the passenger seat with the upper surface of the battery unit inclined downward toward the vehicle rear so the rear end of the battery unit is lower than the front end of the battery unit. The battery unit is covered from above with a cover member inclined downward toward the vehicle rear so the rear end of the cover member is lower than the front end of the cover member.

Abstract: To simultaneously avoid contact with a front subframe and secure a connection space for a harness, a front subframe has a right and left pair of side frame sections, each of which is located in front of and below a dashboard. A converter and a vehicle component are provided behind a rear end portion of one of the side frame sections. The converter is arranged along a lower surface of a floor panel, and the vehicle component is arranged adjacent to rear of the converter. The converter is arranged in a vertically inclined state, a front-end portion of the converter is located higher than the rear end portion of the side frame section, and a rear end portion of the converter is located lower than the vehicle component.

Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

Abstract: The object of the present invention is to provide an exhaust gas purifying catalyst that can achieve high purification performance while suppressing H2S emissions. The object is solved by an exhaust gas purifying catalyst in which the top layer of a catalyst coating layer comprises a ceria-zirconia composite oxide having a pyrochlore-type ordered array structure, in which the ceria-zirconia composite oxide contains at least one additional element selected from the group consisting of praseodymium, lanthanum, and yttrium at 0.5 to 5.0 mol % in relation to the total cation amount, and the molar ratio of (cerium+additional element):(zirconium) is within the range from 43:57 to 48:52.

Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

Abstract: The object of the present invention is to provide an exhaust gas purifying catalyst that can achieve high purification performance while suppressing H2S emissions. The object is solved by an exhaust gas purifying catalyst in which the top layer of a catalyst coating layer comprises a ceria-zirconia composite oxide having a pyrochlore-type ordered array structure, in which the ceria-zirconia composite oxide contains at least one additional element selected from the group consisting of praseodymium, lanthanum, and yttrium at 0.5 to 5.0 mol % in relation to the total cation amount, and the molar ratio of (cerium+additional element):(zirconium) is within the range from 43:57 to 48:52.

Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.

Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

Abstract: A catalyst for exhaust gas purification is described which includes a substrate and a catalyst coating layer provided on the substrate. The catalyst coating layer includes first and second metal oxide particles. The first metal oxide particles have a catalyst metal supported thereon, and the second metal oxide particles do not have a catalyst metal supported thereon. The first and second metal oxide particles have a specific particle size. This is because, when the sizes of the particles supporting the catalyst metal remain relatively large but the sizes of the particles not supporting a catalyst metal are minimized, it is possible to decrease the thickness of the catalyst coating layer while maintaining durability and improving gas diffusibility of the coating layer. Therefore, a thickness of the catalyst coating is decreased without decreasing durability, and the catalyst can exhibit high exhaust gas purification performance even under high load conditions.

Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.

Abstract: The object of the present invention is to provide an exhaust gas purifying catalyst that can achieve high purification performance while suppressing H2S emissions. The object is solved by an exhaust gas purifying catalyst in which the top layer of a catalyst coating layer comprises a ceria-zirconia composite oxide having a pyrochlore-type ordered array structure, in which the ceria-zirconia composite oxide contains at least one additional element selected from the group consisting of praseodymium, lanthanum, and yttrium at 0.5 to 5.0 mol % in relation to the total cation amount, and the molar ratio of (cerium+additional element):(zirconium) is within the range from 43:57 to 48:52.

Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.

Abstract: When sizes of particles supporting a catalyst metal remain relatively large but sizes of particles not supporting a catalyst metal are minimized among metal oxide particles included in a catalyst coating layer, it is possible to decrease a thickness of the catalyst coating layer while maintaining durability and improve gas diffusibility of the coating layer. Therefore, a thickness of the catalyst coating is decreased without decreasing durability and a catalyst can exhibit high exhaust gas purification performance even under high load conditions.

Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.