Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.

Abstract: A battery charger and a method of judging a charging condition of a secondary battery capable of judging precisely a charging condition of the secondary battery are provided. Charging conditions of the secondary battery are classified to four charging conditions depending on change of the voltage value of the secondary battery during charging operation, and one of these four charging conditions is displayed on the secondary battery by detecting the voltage value of the secondary battery at predetermined intervals.

Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

Abstract: A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.

Abstract: A charging apparatus for charging a plurality of batteries has at least two modes including a first mode and a second mode, in which amounts of electricity to charge the batteries are set with reference to a fully charged capacity of the batteries. The apparatus includes mode selection means for selecting either of the first mode and the second mode. The first mode is a mode in which the batteries are charged until the batteries reach a fully charged state. The second mode is a mode in which the charging of the batteries is stopped before the batteries reach the fully charged state.

Abstract: A burn-in process for a semiconductor integrated circuit device includes a first process of positioning bump electrodes of the semiconductor integrated circuit device with respect to pads of a socket having detachment mechanisms, a second process of pressing the bump electrodes against the pads by weighting the semiconductor integrated circuit device, and a third process of detaching the bump electrodes from the pads by exerting force on the semiconductor integrated circuit device in a direction opposite to a weighting direction of the second process. Automatic insertion and detachment of a semiconductor integrated circuit chip in a burn-in test is facilitated by detaching the bump electrodes from the pads by pushing up the semiconductor integrated circuit device.

Abstract: A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.

Abstract: A battery charger for charging a secondary battery using a power supply circuit, includes a discrimination circuit to discriminate a constant-current charging mode and a constant-voltage charging mode, and a controller to which a discrimination signal is supplied. When judged as being the constant-current charging mode, the controller sets the current in the constant-current charging mode by using the control signal. When judged as being the constant-voltage charging mode in accordance with the discrimination signal, the controller sets intermittently the end of charging detection current, and sets an end of charging detection period for judging the constant-current charging mode and the constant-voltage charging mode. When the discrimination signal indicates the constant-voltage charging mode in the end of charging detection period, the controller controls to shift to the end of charging detection mode.

Abstract: A battery pack, a battery charger, a method for charging a battery pack are provided. The battery pack includes a secondary battery, a switch element for controlling charging and discharging the secondary battery, a controller for controlling the switch element, and a communication unit for performing with a battery charger. During charging, an initial charging is switched to a quick charging when a voltage of the secondary battery reaches a predetermined voltage, and the battery charger judges the battery pack as abnormal when the voltage does not reach the predetermined voltage within a timeout period after the initial charging is started. At least one of the timeout period and the predetermined is stored. At least one of the timeout period and the predetermined voltage to be read out is transmitted through the communication unit to the battery charger.

Abstract: A cylindrical roller bearing includes an inner ring having a flange portion provided with a roller guide-surface which guides the end faces 4a of the cylindrical rollers having diameter of Da. The end face 4a away from a center axis of the cylindrical roller by 0.40 Da in the radial direction is a first position A, and the end face 4a away from the center axis by 0.35 Da is a second position B, the end face 4a contacts with the roller guide-surface between the first and second positions A and B, the end face 4a has a convex-shaped crowning portion 4b having a continuous curve which passes the first and second positions A and B, and an angle ? formed between a line connecting the first and second positions A and B and a line perpendicular to the center axis is set to be 0.5° or less.

Abstract: A data processing apparatus supplied a first voltage from outside, includes a CPU, a first voltage generating circuit, a second voltage generating circuit, a clock generating circuit, and, a nonvolatile memory which can be accessed by the CPU. The first voltage generating circuit generates a second voltage, a voltage level of which is lower than that of the first voltage. The clock generating circuit is supplied the second voltage from the first voltage generating circuit and generates a clock signal, and the second voltage generating circuit is supplied the second voltage from the first voltage generating circuit and the clock signal from the clock generating circuit, and generates a second voltage, a voltage level of which is higher than that of the first voltage, for supplying to the nonvolatile memory.

Abstract: A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.

Abstract: A burn-in process for a semiconductor integrated circuit device includes a first process of positioning bump electrodes of the semiconductor integrated circuit device with respect to pads of a socket having detachment mechanisms, a second process of pressing the bump electrodes against the pads by weighting the semiconductor integrated circuit device, and a third process of detaching the bump electrodes from the pads by exerting force on the semiconductor integrated circuit device in a direction opposite to a weighting direction of the second process. Automatic insertion and detachment of a semiconductor integrated circuit chip in a burn-in test is facilitated by detaching the bump electrodes from the pads by pushing up the semiconductor integrated circuit device.

Abstract: A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.

Abstract: A charger for a lithium ion secondary battery includes a series circuit of a reverse-current preventive switch, a charging switch and a current-detecting resistor, connected between the battery and the ground a charging control circuit controlling the reverse-current preventive switch and the charging switch, so as to make the battery repeat charging and opening at regular intervals, and so as to detect voltage difference between the specified voltage and the open circuit voltage of the battery during the opening; and a constant-current/constant-voltage control circuit commanding constant-current charging at a first set voltage set relatively high in a range not exceeding the upper limit voltage of the battery, so far as the voltage difference does not exceed a predetermined change-over voltage difference, and commanding constant-voltage charging at a second set voltage, which is lowered from the first set voltage, when the voltage difference becomes smaller than the change-over voltage difference.

Abstract: A data processing apparatus supplied a first voltage from outside, includes a CPU, a first voltage generating circuit, a second voltage generating circuit, a clock generating circuit, and, a nonvolatile memory which can be accessed by the CPU. The first voltage generating circuit generates a second voltage, a voltage level of which is lower than that of the first voltage. The clock generating circuit is supplied the second voltage from the first voltage generating circuit and generates a clock signal, and the second voltage generating circuit is supplied the second voltage from the first voltage generating circuit and the clock signal from the clock generating circuit, and generates a second voltage, a voltage level of which is higher than that of the first voltage, for supplying to the nonvolatile memory.

Abstract: A semiconductor processing device is provided which includes a nonvolatile memory unit, a voltage generating unit, and a first terminal. The voltage generating unit generates a first voltage generated from an operation voltage provided from outside of the semiconductor processing device and provides the first voltage to the nonvolatile memory unit for storing data therein. The first terminal provides the first voltage generated by the voltage generating unit to outside of the semiconductor processing device. This first voltage provided to outside of the semiconductor processing device via the first terminal permits checking a voltage level of the first voltage and correcting this voltage level.

Abstract: A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.

Abstract: A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.

Abstract: A semiconductor processing device is provided which includes a nonvolatile memory unit, a voltage generating unit, and a first terminal. The voltage generating unit generates a first voltage generated from an operation voltage provided from outside of the semiconductor processing device and provides the first voltage to the nonvolatile memory unit for storing data therein. The first terminal provides the first voltage generated by the voltage generating unit to outside of the semiconductor processing device. This first voltage provided to outside of the semiconductor processing device via the first terminal permits checking a voltage level of the first voltage and correcting this voltage level.