Patents by Inventor Masanao Sato
Masanao Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160336244Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.Type: ApplicationFiled: July 25, 2016Publication date: November 17, 2016Inventors: Toshihiko Akiba, Bunji Yasumura, Masanao Sato, Hiromi Abe
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Publication number: 20160035636Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.Type: ApplicationFiled: October 6, 2015Publication date: February 4, 2016Inventors: Toshihiko Akiba, Bunji Yasumura, Masanao Sato, Hiromi Abe
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Patent number: 9199457Abstract: An ink jet recording apparatus records an image on a recording material by ejecting a first ink composition through at least one first liquid ejecting nozzle having an open end. The ink jet recording apparatus also includes a platen having a surface on which the recording medium is placed. The surface is away from the open end at a distance PG satisfying the relationship 0.5 mm<PG<2.5 mm. The first ink composition that has been ejected through the first liquid ejecting nozzle is split into a main droplet having a flying velocity Vm and at least one satellite droplet including a satellite droplet having a flying velocity Vs. The flying velocities Vm and Vs satisfy the relationship Vm?Vs<3 m/s.Type: GrantFiled: August 11, 2014Date of Patent: December 1, 2015Assignee: Seiko Epson CorporationInventors: Atsushi Muto, Masanao Sato, Ryoichi Tanaka, Satoshi Kimura
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Patent number: 9165845Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.Type: GrantFiled: August 22, 2014Date of Patent: October 20, 2015Assignee: Renesas Electronics CorporationInventors: Toshihiko Akiba, Bunji Yasumura, Masanao Sato, Hiromi Abe
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Publication number: 20150137125Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.Type: ApplicationFiled: January 5, 2015Publication date: May 21, 2015Inventors: Bunji Yasumura, Fumio Tsuchiya, Hisanori Ito, Takuji Ide, Naoki Kawanabe, Masanao Sato
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Patent number: 8946705Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.Type: GrantFiled: May 12, 2010Date of Patent: February 3, 2015Assignee: Renesas Electronics CorporationInventors: Bunji Yasumura, Fumio Tsuchiya, Hisanori Ito, Takuji Ide, Naoki Kawanabe, Masanao Sato
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Patent number: 8939571Abstract: An ink jet recording apparatus performs recording by discharging an ink composition onto a recording medium. The apparatus includes an ink jet head including a pressure-generating chamber containing an ink composition and applying a discharge pressure to the ink composition, a discharge port from which the ink composition is discharged, and a communicating path for communicating between the pressure-generating chamber and the discharge port. The ink composition is discharged from the discharge port at a discharge rate of 5 m/sec or more and 15 m/sec or less. The communicating path has a length of 40 ?m or more and 600 ?m or less. The ink composition contains a self-dispersible pigment and an organic solvent having a Hansen solubility parameter of 14 (cal/cm3)1/2 or more and 16 (cal/cm3)1/2 or less.Type: GrantFiled: May 9, 2014Date of Patent: January 27, 2015Assignee: Seiko Epson CorporationInventors: Masanao Sato, Satoshi Kimura, Tomoyuki Okuyama
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Patent number: 8912540Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.Type: GrantFiled: March 13, 2013Date of Patent: December 16, 2014Assignee: Renesas Electronics CorporationsInventors: Toshihiko Akiba, Bunji Yasumura, Masanao Sato, Hiromi Abe
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Publication number: 20140361299Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.Type: ApplicationFiled: August 22, 2014Publication date: December 11, 2014Inventors: Toshihiko Akiba, Bunji Yasumura, Masanao Sato, Hiromi Abe
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Publication number: 20140347424Abstract: An ink jet recording apparatus records an image on a recording material by ejecting a first ink composition through at least one first liquid ejecting nozzle having an open end. The ink jet recording apparatus also includes a platen having a surface on which the recording medium is placed. The surface is away from the open end at a distance PG satisfying the relationship 0.5 mm<PG<2.5 mm. The first ink composition that has been ejected through the first liquid ejecting nozzle is split into a main droplet having a flying velocity Vm and at least one satellite droplet including a satellite droplet having a flying velocity Vs. The flying velocities Vm and Vs satisfy the relationship Vm?Vs<3 m/s.Type: ApplicationFiled: August 11, 2014Publication date: November 27, 2014Applicant: SEIKO EPSON CORPORATIONInventors: Atsushi Muto, Masanao Sato, Ryoichi Tanaka, Satoshi Kimura
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Publication number: 20140340438Abstract: An ink jet recording apparatus performs recording by discharging an ink composition onto a recording medium. The apparatus includes an ink jet head including a pressure-generating chamber containing an ink composition and applying a discharge pressure to the ink composition, a discharge port from which the ink composition is discharged, and a communicating path for communicating between the pressure-generating chamber and the discharge port. The ink composition is discharged from the discharge port at a discharge rate of 5 m/sec or more and 15 m/sec or less. The communicating path has a length of 40 ?m or more and 600 or less. The ink composition contains a self-dispersible pigment and an organic solvent having a Hansen solubility parameter of 14 (cal/cm3)1/2 or more and 16 (cal/cm3)1/2 or less.Type: ApplicationFiled: May 9, 2014Publication date: November 20, 2014Applicant: Seiko Epson CorporationInventors: Masanao SATO, Satoshi KIMURA, Tomoyuki OKUYAMA
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Patent number: 8833885Abstract: An ink jet recording apparatus records an image on a recording material by ejecting a first ink composition through at least one first liquid ejecting nozzle having an open end. The ink jet recording apparatus also includes a platen having a surface on which the recording medium is placed. The surface is away from the open end at a distance PG satisfying the relationship 0.5 mm<PG<2.5 mm. The first ink composition that has been ejected through the first liquid ejecting nozzle is split into a main droplet having a flying velocity Vm and at least one satellite droplet including a satellite droplet having a flying velocity Vs. The flying velocities Vm and Vs satisfy the relationship Vm?Vs<3 m/s.Type: GrantFiled: August 27, 2012Date of Patent: September 16, 2014Assignee: Seiko Epson CorporationInventors: Atsushi Muto, Masanao Sato, Ryoichi Tanaka, Satoshi Kimura
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Patent number: 8415199Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.Type: GrantFiled: December 2, 2011Date of Patent: April 9, 2013Assignee: Renesas Electronics CorporationInventors: Toshihiko Akiba, Bunji Yasumura, Masanao Sato, Hiromi Abe
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Publication number: 20130050336Abstract: An ink jet recording apparatus records an image on a recording material by ejecting a first ink composition through at least one first liquid ejecting nozzle having an open end. The ink jet recording apparatus also includes a platen having a surface on which the recording medium is placed. The surface is away from the open end at a distance PG satisfying the relationship 0.5 mm<PG<2.5 mm. The first ink composition that has been ejected through the first liquid ejecting nozzle is split into a main droplet having a flying velocity Vm and at least one satellite droplet including a satellite droplet having a flying velocity Vs. The flying velocities Vm and Vs satisfy the relationship Vm?Vs<3 m/s.Type: ApplicationFiled: August 27, 2012Publication date: February 28, 2013Applicant: SEIKO EPSON CORPORATIONInventors: Atsushi Muto, Masanao Sato, Ryoichi Tanaka, Satoshi Kimura
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Patent number: 8264198Abstract: A battery pack, a battery charger, a method for charging a battery pack are provided. The battery pack includes a secondary battery, a switch element for controlling charging and discharging the secondary battery, a controller for controlling the switch element, and a communication unit for performing with a battery charger. During charging, an initial charging is switched to a quick charging when a voltage of the secondary battery reaches a predetermined voltage, and the battery charger judges the battery pack as abnormal when the voltage does not reach the predetermined voltage within a timeout period after the initial charging is started. At least one of the timeout period and the predetermined is stored. At least one of the timeout period and the predetermined voltage to be read out is transmitted through the communication unit to the battery charger.Type: GrantFiled: February 29, 2008Date of Patent: September 11, 2012Assignee: Sony CorporationInventors: Masanao Sato, Koji Umetsu, Osamu Nagashima
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Publication number: 20120077310Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.Type: ApplicationFiled: December 2, 2011Publication date: March 29, 2012Inventors: Toshihiko AKIBA, Bunji Yasumura, Masanao Sato, Hiromi Abe
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Patent number: 8101433Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.Type: GrantFiled: March 30, 2009Date of Patent: January 24, 2012Assignee: Renesas Electronics CorporationInventors: Toshihiko Akiba, Bunji Yasumura, Masanao Sato, Hiromi Abe
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Patent number: 8098053Abstract: A charger for a lithium ion secondary battery includes a series circuit of a reverse-current preventive switch, a charging switch and a current-detecting resistor, connected between the battery and the ground a charging control circuit controlling the reverse-current preventive switch and the charging switch, so as to make the battery repeat charging and opening at regular intervals, and so as to detect voltage difference between the specified voltage and the open circuit voltage of the battery during the opening; and a constant-current/constant-voltage control circuit commanding constant-current charging at a first set voltage set relatively high in a range not exceeding the upper limit voltage of the battery, so far as the voltage difference does not exceed a predetermined change-over voltage difference, and commanding constant-voltage charging at a second set voltage, which is lowered from the first set voltage, when the voltage difference becomes smaller than the change-over voltage difference.Type: GrantFiled: March 22, 2007Date of Patent: January 17, 2012Assignee: Sony CorporationInventor: Masanao Sato
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Patent number: 8035347Abstract: A battery charger for charging a secondary battery using a power supply circuit, includes a discrimination circuit to discriminate a constant-current charging mode and a constant-voltage charging mode, and a controller to which a discrimination signal is supplied. When judged as being the constant-current charging mode, the controller sets the current in the constant-current charging mode by using the control signal. When judged as being the constant-voltage charging mode in accordance with the discrimination signal, the controller sets intermittently the end of charging detection current, and sets an end of charging detection period for judging the constant-current charging mode and the constant-voltage charging mode. When the discrimination signal indicates the constant-voltage charging mode in the end of charging detection period, the controller controls to shift to the end of charging detection mode.Type: GrantFiled: July 17, 2008Date of Patent: October 11, 2011Assignee: Sony CorporationInventors: Koji Umetsu, Masanao Sato, Kazumi Sato
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Patent number: 7965563Abstract: A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.Type: GrantFiled: February 2, 2009Date of Patent: June 21, 2011Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.Inventors: Kiyoshi Matsubara, Naoki Yashiki, Shiro Baba, Takashi Ito, Hirofumi Mukai, Masanao Sato, Masaaki Terasawa, Kenichi Kuroda, Kazuyoshi Shiba