Patents by Inventor Masanori Nishiguchi
Masanori Nishiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5212880Abstract: This invention is directed to an apparatus for packaging a semiconductor flip chip on a substrate by face-down bonding in which coherent light is used to irradiate a bonding head and the substrate, and the light reflected by the bonding head and the substrate form interference patterns. Adjustment of the inclination of the bonding head against the substrate is performed by observation of the interference fringes caused by the interference between the light reflected by the bonding head and the light reflected by the substrate.Type: GrantFiled: June 18, 1991Date of Patent: May 25, 1993Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5214308Abstract: A substrate for packaging a semiconductor device having a bump thereon according to the present invention is characterized by that the substrate has an electrode terminal to which the bump is to be connected, and a recess for receiving at least a top of the bump is formed in the electrode terminal.Type: GrantFiled: January 23, 1991Date of Patent: May 25, 1993Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5196726Abstract: A substrate for packaging a semiconductor device having a bump thereon according to the present invention is characterized by that the substrate has an electrode terminal to which the bump is to be connected, the electrode terminal has a recess formed thereon to the receive at least a top of the bump, and at least a top of the surface of the electrode terminal is covered by a metal layer having a lower melting point than that of the bump.Type: GrantFiled: January 23, 1991Date of Patent: March 23, 1993Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5188984Abstract: A semiconductor device is produced through processes that; ionized material is poured into a predetermined depth of a silicon substrate so as to be made into etching stopper layer, a predetermined area of the silicon substrate is etched up to the depth of the etching stopper layer so as to form a concave portion, a compound semiconductor chip is accommodated in the concave portion, insulating film is formed covering a space between the surrounding wall of the concave portion and the side wall of the compound semiconductor chip so as to be patterned, and that a second thin film circuit is so formed on the patterned insulating film as to connect between the electrodes on the compound semiconductor chip and a first thin film circuit which is previously formed on the surface of the silicon substrate.Type: GrantFiled: February 4, 1991Date of Patent: February 23, 1993Assignee: Sumitomo Electric Industries, Ltd.Inventor: Masanori Nishiguchi
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Patent number: 5165791Abstract: A method of using infrared light for measuring the temperature of a semiconductor element with a surface layer formed by two kinds of materials that have different emissivities and optical reflectances is disclosed. The method includes the step of taking an image with diffused light reflected from the surface of a semiconductor element by an image taking device.Type: GrantFiled: September 13, 1991Date of Patent: November 24, 1992Assignee: Sumitomo Electric Industries, Ltd.Inventors: Atsushi Miki, Masanori Nishiguchi
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Patent number: 5157479Abstract: A silicon substrate having a thin film circuit layer formed on the surface of the substrate is laid on a metallic base and a semiconductor chip made of compound semiconductor such as gallium arsenide is disposed in a hole defined in the central portion of the silicon substrate so that the semiconductor chip can be directly fixed to the metallic base for dissipating the heat of the semiconductor chip. The connecting terminals of the semiconductor chip are connected to thin film circuit layer formed on the surface of the silicon substrate through wires. The heat generated in the semiconductor chip can be transmitted to the metallic base so that the heat is effectively dissipated.Type: GrantFiled: June 8, 1990Date of Patent: October 20, 1992Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takeshi Sekiguchi, Masanori Nishiguchi
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Patent number: 5122481Abstract: There is disclosed a method of manufacturing a semiconductor device comprising the steps of: forming a semiconductor element on one of major surfaces of a GaAs substrate; a grinding the substrate to make the GaAs substrate to a predetermined thickness by grinding the other surface of the GaAs substrate with a grinding stone having an average grain size of 6 micro-meters or larger; and an chemical etching the other surface of the substrate by 0.6 micro-meters or more just after the grinding step, without any further grinding treatment done on the other surface, just after the grinding step.Type: GrantFiled: September 4, 1991Date of Patent: June 16, 1992Assignee: Sumitomo Electric Industries, Ltd.Inventor: Masanori Nishiguchi
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Patent number: 5113622Abstract: An apparatus is provided for grinding a semiconductor wafer, which includes a table having a work stage on which a semiconductor wafer to be ground is placed, at least the work stage being rotatable about an axis, and a grinding wheel which is movable in a direction perpendicular to or parallel to the work stage while being rotated about an axis parallel to the rotational axis of the work stage. In this apparatus, a semiconductor wafer is cooled during grinding. In order to perform cooling, the apparatus has an inlet flow path for guiding cooling liquid to a grinding surface of the grinding wheel, and an outlet flow path for collecting the cooling liquid which flows onto the work stage. The apparatus also includes a temperature detector, disposed in the outlet flow path, for detecting a temperature of the recovered cooling liquid. A rotational speed of the grinding wheel or the rotary table is controlled based on the temperature of the cooling liquid detected by the temperature detector.Type: GrantFiled: August 19, 1991Date of Patent: May 19, 1992Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Noboru Gotoh
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Patent number: 5105242Abstract: A compound semiconductor device in which a source and drain regions are formed on both sides of a groove defined in a substrate and both regions are separated from the side walls of the groove by predetermined intervals through a first region with a depth shallower than the groove. A second region is formed between the source and drain region with a depth deeper than said groove. A gate electrode is formed on the surface of the second region in the groove for Schottky contacting with the upper surface of the second region. There is further disclosed a method of making a fine mask pattern suitable for making the compound semiconductor mentioned above.Type: GrantFiled: July 18, 1991Date of Patent: April 14, 1992Assignee: Sumitomo Electric Industries, Ltd.Inventors: Mitsuaki Fujihira, Masanori Nishiguchi
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Patent number: 5104023Abstract: An apparatus for making a semiconductor device comprises a flexible mat, support shafts for supporting the flexible mat in a substantially horizontal position, a pressing plate having a generally convex body and supported for movement up and down, and a drive mechanism for driving one of the pressing plate and the wafer relative to the other of the pressing plate and the wafer so as to move up and down. The wafer having the first and second surfaces opposite to each other with the chips formed on the first surface thereof is placed on the mat with the chips confronting the flexible mat. The convex body of the pressing plate is pressed against the second surface of the wafer to separate the chips on the wafer individually.Type: GrantFiled: April 8, 1991Date of Patent: April 14, 1992Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Takeshi Sekiguchi, Nobuyoshi Tato
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Patent number: 5098501Abstract: The present invention has an object to provide a pickup method and the pickup apparatus for chip type part capable of storing a part of chip type part kept adhered with a sufficient adhesive strength on an adhesive layer such as an expanded tape for a storage purpose while the other part of chip type part is adhered on the adhesive layer for current use. In order to achieve the object, there is provided a pickup technique for chip type part wherein an energy beam is radiated on a part of adhesive layer fixing the chip type part.Type: GrantFiled: December 7, 1990Date of Patent: March 24, 1992Assignee: Sumitomo Electric Industries, Ltd.Inventor: Masanori Nishiguchi
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Patent number: 5092033Abstract: The present invention comprises the steps of electrically connecting at least one pair of bumps on the semiconductor device, bringing the bumps into contact with a surface of the packaging substrate and moving the semiconductor device relative to the packaging substrate while monitoring whether at least one pair of electrode terminals formed on the surface of the packaging substrate are electrically connected to each other, positioning the semiconductor device with respect to the packaging substrate at a position where the electrode terminals whose electrical connection is monitored are electrically connected to each other, and packaging the semiconductor electrode on the packaging substrate.Type: GrantFiled: January 23, 1991Date of Patent: March 3, 1992Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5064782Abstract: A semiconductor device package is disclosed which includes (1) a carrier body which is to be mounted with a semiconductor device chip and which has an annular adhesion layer formed thereon, (2) a cap which is to be adhered to the carrier body to hermetically seal the carrier body, and (3) an adhesive which is applied between the adhesion layer of the carrier body and the cap and which becomes hardened after at least one of the carrier body and the cap is pivoted about an axis coaxial with the annular adhesion layer to eliminate voids in the adhesive and to improve the sealing properties of the package.Type: GrantFiled: April 6, 1990Date of Patent: November 12, 1991Assignee: Sumitomo Electric Industries, Ltd.Inventor: Masanori Nishiguchi
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Patent number: 5035087Abstract: A surface grinding machine comprises a wheel head vertically movably supported; a cup-shaped diamond wheel supported by a rotatable wheel shaft at one end of the wheel head and having an abrasive grain layer of Young's modulus (10-15).times.10.sup.4 kgf/cm.sup.Type: GrantFiled: December 7, 1987Date of Patent: July 30, 1991Assignees: Sumitomo Electric Industries, Ltd., Asahi Diamond Industrial Co. Ltd., Nissei Industry CorporationInventors: Masanori Nishiguchi, Takeshi Sekiguchi, Ikkei Miyoshi, Kiyoshi Nishio
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Patent number: 5027170Abstract: This invention is for improving the radiation hardness or radiation resistance of GaAs MESFETs. According to this invention, an n-type active layer is formed by doping in the GaAs crystal. The n-type active layer includes an upper layer and a heavy doped lower layer. A Schottky gate electrode is provided on the active layer so that the carrier concentration in the active layer and the thickness of the active layer are set to required values. According to this invention, not only in the case of a total dose of exposure radiation of R=1.times.10.sup.9 roentgens but also in the case of a higher total dose, at least one of the threshold voltage V.sub.th of the GaAs MESFET, the saturated drain current I.sub.dss there of, or the transconductance g.sub.m will remain in their tolerable ranges.Type: GrantFiled: November 13, 1990Date of Patent: June 25, 1991Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Naoto Okazaki
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Patent number: 5019875Abstract: This invention is for improving the radiation hardness or radiation resistance of GaAs MESFETs. According to this invention, an n-type active layer is formed by doping GaAs crystal evenly in the depth direction of the GaAs crystal, and a Schottky gate electrode is provided on the active layer, so that the carrier concentration in the active layer and the thickness of the active layer are set to required values. According to this invention, not only in the case of a total dose of exposure radiation of R=1.times.10.sup.9 roentgens but also in the case of a higher total dose, at least one of the threshold voltage V.sub.th of the GaAs MESFET, the saturated drain current I.sub.dss thereof, and the transconductance g.sub.m will remain in their tolerable ranges. Consequently a semiconductor device comprising the GaAs MESFET and a signal processing circuit cooperatively combined therewith can operate normally as initially designed, with the result of conspicuously improved radiation hardness.Type: GrantFiled: October 26, 1990Date of Patent: May 28, 1991Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Naoto Okazaki
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Patent number: 4981809Abstract: A method of making a fine mask pattern suitable for making a compound semiconductor device in which a source and drain regions are formed on both sides of a groove defined in a substrate and both regions are separated from the side walls of the groove by predetermined intervals through a first region with a depth shallower than the groove. A second region is formed between the source and drain region with a depth deeper than said groove. A gate electrode is formed on the surface of the second region in the groove for Schottky contacting with the upper surface of the second region.Type: GrantFiled: August 10, 1988Date of Patent: January 1, 1991Assignee: Sumitomo Electric Industries, Ltd.Inventors: Fujihira Mitsuaki, Masanori Nishiguchi
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Patent number: 4965247Abstract: A superconducting coil comprising a support (1,10) and at least one ring-shaped and/or spiral turn (2) of superconductor which is composed of superconducting compound oxide and is supported on a surface of said support.Type: GrantFiled: July 5, 1988Date of Patent: October 23, 1990Assignee: Sumitomo Electric Industries, Ltd.Inventor: Masanori Nishiguchi
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Patent number: 4937226Abstract: A large number of small superconducting solenoids are produced on a common substrate simultaneously. Two parallel slits (5) passing through a silicon wafer are dug in such manner that a core (10) is left between the slits and then a superconducting thin film of compound oxide is deposited around the core (10).Type: GrantFiled: July 18, 1988Date of Patent: June 26, 1990Assignee: Sumitomo Electric Industries, Ltd.Inventor: Masanori Nishiguchi
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Patent number: 4908693Abstract: A semiconductor pressure sensor comprises a sensor chip including an etching stop layer of high concentration impurity ions formed by ion implantation of impurity ions into a substrate of silicon single crystal or by deposition and diffusion and an epitaxial growth layer of silicon single crystal on the etching stop layer, a recess formed in the back of the sensor chip by etching, circuit elements formed on the sensor chip, diffusion leads for connecting the circuit elements, connecting regions, each formed between the etching stop layer and a predetermined position on the surface of the sensor chip, and diffusion regions, each formed between the predetermined position and one of terminals of the circuit elements.Type: GrantFiled: December 8, 1987Date of Patent: March 13, 1990Assignee: Sumitomo Electric Industries, Ltd.Inventor: Masanori Nishiguchi