Patents by Inventor Masanori Takeuchi

Masanori Takeuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7535438
    Abstract: A PDP apparatus, the peak luminance of which has been improved with little modification of the existing circuit structure, has been disclosed, in which a thinning process that shortens an address period by hiding part of display lines in a fixed subfield of a low luminance is performed, the saved time is increased by an amount corresponding to that from which the luminance weight (the number of sustain discharge pulses, that is, the length of the sustain discharge period) of the thinned subfield of a low luminance is subtracted, and the remaining time is allocated at the ratio of the luminance weights on completion of the first step in each subfield.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: May 19, 2009
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Masanori Takeuchi, Kyoji Kariya
  • Publication number: 20090091676
    Abstract: An active matrix substrate including, in each pixel area, a transistor, a pixel electrode (17), a conductive member (18) functioning as one of electrodes of a storage capacitor, a drain lead-out (7) electrode connected to a drain electrode of the transistor, and overlapping with the conductive member (18), and a contact hole for connecting the drain lead-out electrode (7) to the pixel electrode (17), includes a gate insulating film (40) covering a gate electrode of each transistor, the gate insulating film including a first thickness portion (41) overlapping with at least part of the contact hole, and a second thickness portion (42) formed adjacent to the first thickness portion, and overlapping with the drain lead-out electrode, the first thickness portion (41) having a greater thickness than the second thickness portion (42).
    Type: Application
    Filed: November 14, 2006
    Publication date: April 9, 2009
    Inventors: Masanori Takeuchi, Toshihide Tsubata
  • Publication number: 20090065778
    Abstract: An active matrix substrate of the present invention is arranged so that each pixel area has a transistor and a capacity electrode which is able to function as an electrode of a capacity. The active matrix substrate includes a conductor which is provided in a layer below the capacity electrode and is able to function as the other electrode of the capacity. The gate electrode of each transistor and a gate insulating film covering the conductor have a thin section with reduced thickness, in an on-conductor area overlapping the conductor. At least a part of the thin section overlaps the capacity electrode. In this way, the active matrix substrate which can reduce inconsistency in capacitance values of capacities (e.g. a storage capacitor, a capacity for controlling an electric potential of a pixel electrode, and a capacity which can function as both of them) provided in the substrate.
    Type: Application
    Filed: December 5, 2006
    Publication date: March 12, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Toshihide Tsubata, Masanori Takeuchi
  • Publication number: 20090058870
    Abstract: A display device is provided which includes: a decimal part conversion unit (302) which converts a value of a decimal part of a pixel signal for a target pixel into another value when the decimal part takes a specific value, the pixel signal having an integer part and the decimal part; an error addition unit (301) which distributes and adds a difference between the decimal part before the conversion and the decimal part after the conversion to signals for a plurality of pixels adjacent to the target pixel; and an error diffusion unit (311) which performs addition based on a pixel signal for the target pixel composed of the decimal part after the conversion and the integer part and decimal parts of the signals for the plurality of pixels adjacent to the target pixel, and outputs an integer part after the addition as a pixel signal for the target pixel.
    Type: Application
    Filed: April 21, 2006
    Publication date: March 5, 2009
    Inventor: Masanori Takeuchi
  • Publication number: 20090057682
    Abstract: In an active matrix substrate of the present invention, a gate insulating film for covering a gate electrode of each transistor has a thin portion, having a reduced film thickness, which is provided on a part overlapped on the gate electrode, and the thin portion is formed by using the gate electrode, on which the thin portion is overlapped, as a mask, and each transistor has a first drain electrode section and a second drain electrode section which are respectively provided on both sides of a source electrode, and the thin portion has two edges opposite to each other, and the first drain electrode section is overlapped on the one edge, and the second drain electrode section is overlapped on the other edge. This makes it possible to provide an active matrix substrate which realizes high display quality while suppressing unevenness of parasitic capacitances (particularly, Cgd) of TFTs in the active matrix substrate whose each TFT has a thin portion in its gate insulating film.
    Type: Application
    Filed: November 7, 2006
    Publication date: March 5, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Toshihide Tsubata, Masanori Takeuchi
  • Publication number: 20090040146
    Abstract: A disclosed plasma display apparatus and a plasma display panel driving method provide improved luminance while preventing decrease in resolution. In the plasma display apparatus, which is adapted to the display of an interlace signal, the maximum number of sustain pulses associated with the emission of light that can be made in one field is calculated, based on the vertical synchronization signal frequency of the input signal. A display load factor of the input signal in the one field is calculated and, based on the calculated display load factor, a target number of sustain pulses in the one field is determined. Based on a relationship between the target number of sustain pulses and the maximum number of sustain pulses, an emission luminance ratio of a sub-display line to a main-display line in the one field is determined.
    Type: Application
    Filed: February 27, 2008
    Publication date: February 12, 2009
    Inventors: Masanori TAKEUCHI, Yasunobu Hashimoto, Hideaki Ohki, Yuichiro Kimura, Naoki Itokawa, Yasuji Noguchi
  • Publication number: 20090027582
    Abstract: An active matrix substrate facilitates correction of a pixel defect and a pixel defect correcting method. A laser target portion of a drain electrode extension portion is irradiated with laser light so as electrically disconnect a TFT from a subpixel electrode. Laser target portions are irradiated with laser light so as to melt an insulating layer, thereby establishing electrical connection between a drain electrode extension portion and a corrective connecting electrode and between a data signal line (13(m+1)) and the corrective connecting electrode. Laser target portions are irradiated with laser light, thereby establishing electrical connection between a drain electrode extension portion of a pixel P(n+1, m) and a corrective connecting electrode and between the data signal line (13(m+1)) and the corrective connecting electrode.
    Type: Application
    Filed: February 21, 2006
    Publication date: January 29, 2009
    Inventors: Yasuyuki Ohta, Masanori Takeuchi, Toshihide Tsubata
  • Patent number: 7483009
    Abstract: The display device substrate according to the present invention is arranged so that: a source line is provided on an area on which a pixel electrode is not provided, and a gap is provided between the source line and the pixel electrode, and a black matrix (light shielding film) which covers a surface of the source line overlaps with the pixel electrode. Thus, it is possible to prevent parasitic capacitance (Csd) between the pixel electrode and the source line from becoming uneven in a display area, so that it is possible to reduce display unevenness of a liquid crystal display device using the present display device substrate.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: January 27, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihide Tsubata, Morihide Ohsaki, Masanori Takeuchi
  • Publication number: 20090021658
    Abstract: In an active-matrix liquid crystal display device, each of multiple pixels includes a first sub-pixel and a second sub-pixel, through which different voltages are applicable to a portion of the liquid crystal layer. Each of the first and second sub-pixels includes a liquid crystal capacitor defined by a counter electrode and a sub-pixel electrode that faces the counter electrode by way of the liquid crystal layer, and a storage capacitor defined by a storage capacitor electrode, an insulating layer, and a storage capacitor counter electrode. The storage capacitor electrode is electrically connected to the sub-pixel electrode, and the storage capacitor counter electrode faces the storage capacitor electrode by way of the insulating layer. The counter electrode is shared by the first and second sub-pixels and the storage capacitor counter electrodes of the first and second sub-pixels are electrically independent of each other.
    Type: Application
    Filed: September 25, 2008
    Publication date: January 22, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masanori TAKEUCHI, Nobuyoshi NAGASHIMA, Naofumi KONDO
  • Publication number: 20090002279
    Abstract: A plasma display device is provided which expresses a video with gradations by selecting each of a plurality of subfields forming one field, each of the subfields having a weighted number of sustain pulses. A sustain pulse number calculation unit calculates a display load factor of an input video signal and calculates a total number of sustain pulses of one field according to the display load factor. A gradation number selection unit selects a gradation number being a sum of weights of all of the subfields according to the calculated total number of sustain pulses.
    Type: Application
    Filed: August 15, 2008
    Publication date: January 1, 2009
    Applicant: FUJITSU HITACHI PLASMA DISPLAY
    Inventor: Masanori Takeuchi
  • Patent number: 7471021
    Abstract: A connector part extends outward of a yoke housing from a holder base and is connectable with an external connector to receive an electric signal. A contact base extends from the holder base into an interior of the gear housing through a communication hole, which is formed in a yoke housing side end of the gear housing. The contact base supports terminals, which provide an electrical connection between stationary contacts and brushes. An intermittent drive unit is installed to the connector part to intermittently drive an armature through the brushes based on the electric signal received from the external connector.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: December 30, 2008
    Assignee: ASMO Co., Ltd.
    Inventors: Hideyuki Yagi, Seiichi Murakami, Masanori Takeuchi, Naohito Kobayashi
  • Publication number: 20080316148
    Abstract: A technique capable of suppressing or preventing generation of flickers (blinks) by a sustain period control as well as capable of ensuring or enhancing display quality in a PDP device. The PDP device adjusts a sustain pulse of the sustain period for every subfield by selecting a combination of one or more than one cycle so that start and end timings of a field in fields before and after change are almost the same according to a display load ratio of the subfield of the field. Field weighted emission center positions then becomes almost the same, and flickers and the like are suppressed.
    Type: Application
    Filed: December 20, 2007
    Publication date: December 25, 2008
    Inventors: Masanori Takeuchi, Toshio Ueda
  • Publication number: 20080309841
    Abstract: An active matrix substrate comprises a thin film transistor disposed at the crossing point of a scanning signal line with a data signal line on the substrate, with a gate electrode of the transistor being connected to the scanning signal line, a source electrode thereof being connected to the data signal line and a drain electrode thereof being connected to an interconnection electrode, and a storage capacitor upper electrode disposed so as to oppose a storage capacitor wiring pattern at least via an insulating layer and connected to the interconnection electrode and a pixel electrode. The storage capacitor upper electrode comprises at least three divided electrodes in the region opposing the storage capacitor wiring pattern.
    Type: Application
    Filed: August 18, 2008
    Publication date: December 18, 2008
    Inventors: TOSHIFUMI YAGI, Toshihide Tsubata, Masanori Takeuchi, Yuhko Hisada
  • Patent number: 7460088
    Abstract: A plasma display apparatus, in which the display quality of a dark image is improved and which uses a subfield method, has been disclosed. The plasma display apparatus comprises a plasma display panel, a sustain pulse cycle changing means for detecting the display load ratio of each subfield and changing the sustain pulse cycle of each subfield according to the display load ratio, and an adaptive subfield number changing means for calculating a vacant time in a display frame generated by changing the sustain pulse cycle, judging whether a subfield can be added according to the vacant time, and determining the number of subfields in the display frame.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: December 2, 2008
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Masanori Takeuchi, Yasuji Noguchi, Yutaka Chiaki, Shunji Oota
  • Patent number: 7440039
    Abstract: An active element substrate and an opposed substrate sandwich a liquid crystal layer to constitute a liquid crystal display device. On the active element substrate, two signal lines respectively charge a pair of pixels that are adjacent to each other in a direction parallel to scanning lines. The two signal lines are provided intensively on a pixel electrode of one of the pair of pixels. In the direction parallel to the scanning lines, a pixel electrode on which signal lines are provided, and a pixel electrode on which signal lines are not provided, are arrayed alternately. This arrangement makes it possible to reduce, while ensuring a wide process margin, the fluctuation of the potential of a terminal to be connected to a pixel electrode (the fluctuation of the potential occurs during OFF-period of an active element due to capacitances respectively provided at superimposed portions of signal lines and a pixel electrode), to simplify the arrangement of signal lines, and to improve the aperture ratio.
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: October 21, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kenji Enda, Masanori Takeuchi, Nobuyoshi Nagashima, Naofumi Kondo
  • Patent number: 7430024
    Abstract: An active matrix substrate includes a thin film transistor disposed at the crossing point of a scanning signal line with a data signal line on the substrate, with a gate electrode of the transistor being connected to the scanning signal line, a source electrode thereof being connected to the data signal line and a drain electrode thereof being connected to an interconnection electrode, and a storage capacitor upper electrode disposed so as to oppose a storage capacitor wiring pattern at least via an insulating layer and connected to the interconnection electrode and a pixel electrode. The storage capacitor upper electrode includes at least three divided electrodes in the region opposing the storage capacitor wiring pattern.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: September 30, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshifumi Yagi, Toshihide Tsubata, Masanori Takeuchi, Yuhko Hisada
  • Publication number: 20080213519
    Abstract: A polypropylene film comprising 70-90 wt. % polymer (a), 2-10 wt. % polymer (b), 2-10 wt. % polymer (c) and 3-20 wt. % polymer (d) and having a haze of 8-30% (wherein the polymer (a) is a block copolymer prepared by producing a polymer part (component a1) by polymerizing in a first step monomers composed mainly of propylene in the absence of an inert solvent and producing an ethylene/propylene copolymer part (component a2) in a second step by polymerization subsequently carried out in a gas phase; the polymer (b) is an ethylene-based polymer having a density of 0.91-0.97 g/cm3 and a melt flow rate of 5-30 g/10 min; the polymer (c) is an ethylene/?-olefin random copolymer having a density of 0.86-0.90 g/cm3 and a melt flow rate of 0.3-5 g/10 min; and the polymer (d) comprises two or more propylene-based polymers different in molecular weight from each other).
    Type: Application
    Filed: November 28, 2005
    Publication date: September 4, 2008
    Applicants: TORAY ADVANCED FILM CO., LTD., SUMITOMO CHEMICAL COMPANY, LIMITED.
    Inventors: Yoichi Matsuura, Masanori Takeuchi, Kouji Kataoka, Hiroshi Nozawa
  • Patent number: 7420576
    Abstract: A display apparatus displaying gray scale by using a subfield method has a gain control circuit, a sub gain control circuit, and an error diffusion circuit. The gain control circuit has the number of gray scale levels of an input signal and outputting a first intermediate image signal with a first number of gray scale levels, and the sub gain control circuit receives the first intermediate image signal, compresses the number of gray scale levels of the first intermediate image signal, and outputs a second intermediate image signal with a second number of gray scale levels. The error diffusion circuit receives the second intermediate image signal and increase the number of gray scale levels by simulating additional gray scale levels through error diffusion.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: September 2, 2008
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Masanori Takeuchi, Masaya Tajima, Yutaka Chiaki, Shunji Ohta, Akira Yamamoto
  • Publication number: 20080204603
    Abstract: A video displaying apparatus, for suppressing a blur of moving picture, or dynamic false contour, from generation thereof, comprises: an input unit for inputting a motion picture; a motion vector detection unit for detecting a motion vector starting from a pixel of one (1) field and ending at a pixel of other one (1) field, among a plural number of fields included in the motion pictures, which are inputted into said input unit, or fields, which are produced from said plural number of fields; a sub-field conversion unit for converting the motion pictures, which are inputted to said input unit, into light-emission data for sub-fields; a sub-field reconstruction unit for reconstructing the light-emission data for sub-fields, which is outputted from said sub-field conversion unit, through a calculating process with using the motion vector, which is detected by said motion vector detection unit; and a display unit for displaying the picture with using the light-emission data, which is outputted from said sub-field
    Type: Application
    Filed: January 29, 2008
    Publication date: August 28, 2008
    Inventors: Hideharu Hattori, Koichi Hamada, Yasuhiro Akiyama, Masanori Takeuchi
  • Publication number: 20080192161
    Abstract: An active matrix substrate has a structure that prevents a drain extraction line from breaking without a plurality of active elements such as thin film transistor elements, metal-insulator-metal elements, MOS transistor elements, diodes, and varistors being disposed, and is suited for use in a large-size liquid crystal television or a like liquid crystal display device equipped with a large-size liquid crystal display panel. The active matrix substrate includes an active element connected, via a drain extraction line, to a storage capacitor upper electrode, wherein the drain extraction line has at least two routes.
    Type: Application
    Filed: April 4, 2008
    Publication date: August 14, 2008
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Ryuji KURIHARA, Yuhko HISADA, Toshihide TSUBATA, Masanori TAKEUCHI, Tomokazu OHTSUBO