Patents by Inventor Masao Kondo

Masao Kondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210149544
    Abstract: An information processing apparatus according to an embodiment of the present technology includes a storage section and a display control section. The storage section stores first content information about physical content arranged in a first area and second content information about electronic content. The display control section respectively controls a projection of light on the physical content and a displaying of an image relating to the electronic content on a second area corresponding to the first area on the basis of the stored first and second content information.
    Type: Application
    Filed: March 1, 2019
    Publication date: May 20, 2021
    Applicant: Sony Corporation
    Inventors: Masanori MATSUSHIMA, Masao KONDO, Hirotaka TAKO, Hiroaki YOKOTA
  • Patent number: 10989228
    Abstract: Non-clogging airlift pumps and associated systems and methods employing said pumps. The airlift pumps generally include an enclosed air tank within which is located a hollow cylinder having an open top and a closed bottom wall. A gas (e.g., air) line passes into the air tank for supplying gas thereto. A suction port is located in the bottom wall of the cylinder, and a substantially vertically-oriented discharge pipe passes through a top wall of the air tank such that an intake end of the discharge pipe resides within the cylinder. Multiple airlift pumps may be used in conjunction in a given application.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: April 27, 2021
    Assignee: PULSED BURST SYSTEMS, LLC
    Inventor: Masao Kondo
  • Publication number: 20210098403
    Abstract: Two transistor rows are arranged on or in a substrate. Each of the two transistor rows is configured by a plurality of transistors aligned in a first direction, and the two transistor rows are arranged at an interval in a second direction orthogonal to the first direction. A first wiring is arranged between the two transistor rows when seen from above. The first wiring is connected to collectors or drains of the plurality of transistors in the two transistor rows. The first bump overlaps with the first wiring when seen from above, is arranged between the two transistor rows, and is connected to the first wiring.
    Type: Application
    Filed: August 14, 2020
    Publication date: April 1, 2021
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Masao KONDO, Kenji SASAKI, Shigeki KOYA, Shinnosuke TAKAHASHI
  • Publication number: 20210089262
    Abstract: The present disclosure relates to an information processing apparatus and an information processing method as well as a program that make it possible to control, by a partition provided on a boundary between two spaces, a visual shielding property and an auditory shielding property of a first space to a person in a second space in an interlocking relationship with each other in response to a distance between the person in the second space and the partition. A distance between the partition, which partitions the first space and the second space, and a person in the second space is measured, and transmittance of the partition and magnitude of output of audio in the first space to the second space are controlled in response to the measured distance. The present disclosure can be applied to a control apparatus for a partition section.
    Type: Application
    Filed: July 24, 2018
    Publication date: March 25, 2021
    Inventors: YOSHIHITO OHKI, MIHO YAMADA, HIROTAKA TAKO, MASAO KONDO, YUSUKE TSUJITA, YOHEI NAKAJIMA, DAISUKE SHIONO, MASANORI MATSUSHIMA, HIROSHI NAKAYAMA, SEIJI SUZUKI, YOSHIYASU KUBOTA, KENICHI YAMAURA
  • Patent number: 10957617
    Abstract: A semiconductor chip includes an active element on a first surface of a substrate. A heat-conductive film having a higher thermal conductivity than the substrate is disposed at a position different from a position of the active element. An insulating film covering the active element and heat-conductive film is disposed on the first surface. A bump electrically connected to the heat-conductive film is disposed on the insulating film. A via-hole extends from a second surface opposite to the first surface to the heat-conductive film. A heat-conductive member having a higher thermal conductivity than the substrate is continuously disposed from a region of the second surface overlapping the active element in plan view to an inner surface of the via-hole. The bump is connected to a land of a printed circuit board facing the first surface. The semiconductor chip is sealed with a resin.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: March 23, 2021
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masao Kondo, Isao Obu, Yasunari Umemoto, Yasuhisa Yamamoto, Masahiro Shibata, Takayuki Tsutsui
  • Publication number: 20210083080
    Abstract: An electrically conductive sub-collector layer is provided in a surface layer portion of a substrate. A collector layer, a base layer, and an emitter layer are located within the sub-collector layer when viewed in plan. The collector layer is connected to the sub-collector layer. An emitter electrode and a base electrode are long in a first direction when viewed in plan. The emitter electrode overlaps the emitter layer. The base electrode and the emitter electrode are discretely located away from each other in a second direction orthogonal to the first direction. A collector electrode is located on one side in the second direction with respect to the emitter electrode and is not located on the other side when viewed in plan. A base line is connected to the base electrode in a manner so as to adjoin a portion other than longitudinal ends of the base electrode.
    Type: Application
    Filed: August 25, 2020
    Publication date: March 18, 2021
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kenji SASAKI, Yasunari UMEMOTO, Shigeki KOYA, Shinnosuke TAKAHASHI, Masao KONDO
  • Publication number: 20210043535
    Abstract: A power amplifier module includes a substrate including, in an upper surface of the substrate, an active region and an element isolation region. The power amplifier module further includes a collector layer, a base layer, and an emitter layer that are stacked on the active region; an interlayer insulating film that covers the collector layer, the base layer, and the emitter layer; a pad that is thermally coupled to the element isolation region; and an emitter bump that is disposed on the interlayer insulating film, electrically connected to the emitter layer through a via hole provided in the interlayer insulating film, and electrically connected to the pad. In plan view, the emitter bump partially overlaps an emitter region which is a region of the emitter layer and through which an emitter current flows.
    Type: Application
    Filed: October 27, 2020
    Publication date: February 11, 2021
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Masao KONDO, Masahiro SHIBATA
  • Patent number: 10902763
    Abstract: The present technology relates to a display device, a display control method, and a program that enable various states of the device to be expressed in a limited region. A television receiver set includes an indicator unit disposed at least in a part of a periphery of a display unit and including indicator configured to be lit at a predetermined luminance, and an indicator control unit configured to control lighting of the indicator. The indicator control unit performs control such that a lighting method of the indicator is changed according to passage of time. The present invention can be applied to a display device such as a television receiver set.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: January 26, 2021
    Assignee: Saturn Licensing LLC
    Inventor: Masao Kondo
  • Publication number: 20200413119
    Abstract: The present disclosure relates to a control device, a control method, an electronic device, and a program that enables an operation in a natural manner for switching between and remotely operating various control target devices. A plurality of control target devices emits infrared light codes each including a unique ID in a predetermined pattern. A user holds a controller and directs an infrared light receiving unit toward a control target device. At this time, a control state is established for the control target device specified by an infrared light code received by the controller. After the control state has been established, when a user rotates a main body of the controller, a control parameter in accordance with the amount of rotation is calculated, and a control command in accordance with the control parameter is transmitted to the control target device to control the control target device. The present disclosure can be applied to a remote controller.
    Type: Application
    Filed: November 13, 2018
    Publication date: December 31, 2020
    Inventors: YOSHIHITO OHKI, HIROTAKA TAKO, MASAO KONDO, YUSUKE TSUJITA, YOHEI NAKAJIMA, DAISUKE SHIONO, MIHO YAMADA, MASANORI MATSUSHIMA, HIROSHI NAKAYAMA, SEIJI SUZUKI, KENICHI YAMAURA, YOSHIYASU KUBOTA
  • Patent number: 10879847
    Abstract: A transmission unit includes a first transistor that amplifies power of a first signal and outputs a second signal, a power supply circuit that supplies to the first transistor a power supply voltage that changes in accordance with an amplitude level of the first signal, and an attenuator that attenuates the first signal in such a manner that an amount of attenuation of the first signal increases with a decrease in the power supply voltage when the power supply voltage is less than a first level.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: December 29, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Satoshi Tanaka, Yasuhisa Yamamoto, Takayuki Tsutsui, Isao Obu
  • Publication number: 20200402932
    Abstract: A semiconductor element includes a semiconductor substrate, first and second amplifiers provided on the semiconductor substrate and adjacently provided in a first direction, a first reference potential bump provided on a main surface of the semiconductor substrate, and connecting the first amplifier and a reference potential, a second reference potential bump provided on the main surface, being adjacent to the first reference potential bump in the first direction, and connecting the second amplifier and a reference potential, and a rectangular bump provided on the main surface, provided between the first and second reference potential bumps in a plan view, and formed such that a second width in a second direction orthogonal to the first direction is larger than a first width in the first direction. The second width is larger than a width of at least one of the first and second reference potential bumps in the second direction.
    Type: Application
    Filed: June 18, 2020
    Publication date: December 24, 2020
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Shigeki KOYA, Yasunari UMEMOTO, Isao OBU, Masao KONDO, Yuichi SAITO, Takayuki TSUTSUI
  • Patent number: 10873307
    Abstract: A power amplifier circuit includes a first transistor amplifying a first signal; a second transistor amplifying a second signal; a bias circuit supplying a bias current or voltage to a base or gate of the second transistor; and an attenuator attenuating the first or second signal in accordance with a control voltage supplied from the bias circuit. The attenuator includes a first diode to which the control voltage is supplied, a third transistor including a collector connected to a supply path of the first or second signal, an emitter connected to a ground, and a base to which the control voltage is supplied from the first diode, and a capacitor connected in parallel with the first diode. The control voltage decreases as a second signal power level increases. The third transistor allows part of the first or second signal to pass to the emitter in accordance with the control voltage.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: December 22, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Satoshi Tanaka, Yasuhisa Yamamoto, Takayuki Tsutsui, Isao Obu
  • Patent number: 10860205
    Abstract: Provided is a control device that projects an image representing input information onto a projection surface so as to follow an input of the input information, with an effect in accordance with the type of the projection surface. As the projection surface, a thin sheet material attached on a wall surface is prepared, for example. The color of the thin sheet material is a dark color, for example, and in time with projection of the image representing a handwritten character or picture, a sound, which will come out when the character or the picture is drawn with a chalk on a chalkboard, is output from a speaker installed on the back side of the projection surface.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: December 8, 2020
    Assignee: SONY CORPORATION
    Inventors: Yohei Nakajima, Masao Kondo, Hirotaka Tako, Daisuke Shiono, Yoshiyasu Kubota, Yoshihito Ohki, Yusuke Tsujita, Miho Yamada, Kenichi Yamaura, Hiroshi Nakayama, Seiji Suzuki, Masanori Matsushima, Taichi Nokuo
  • Patent number: 10851837
    Abstract: A swing bearing allows a reduction in thickness, weight, and manufacturing cost by fixing together a pair of split rings each formed of a plate member to form an outer ring, and fixing together a pair of split rings each formed of a plate member to form an inner ring. The outer ring is composed of a pair of split rings which are obtained by splitting the outer ring at an axially midpoint of the first raceway groove, are formed of respective plate members, and are fixed together. The inner ring is composed of a pair of split rings which are obtained by splitting the inner ring at an axially midpoint of the second raceway groove, are formed of respective plate members, and are fixed together.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: December 1, 2020
    Assignee: NIPPON THOMPSON CO., LTD.
    Inventors: Kenichiro Tsuruta, Shinji Oishi, Masao Kondo, Koji Obara
  • Patent number: 10847436
    Abstract: A power amplifier module includes a substrate including, in an upper surface of the substrate, an active region and an element isolation region. The power amplifier module further includes a collector layer, a base layer, and an emitter layer that are stacked on the active region; an interlayer insulating film that covers the collector layer, the base layer, and the emitter layer; a pad that is thermally coupled to the element isolation region; and an emitter bump that is disposed on the interlayer insulating film, electrically connected to the emitter layer through a via hole provided in the interlayer insulating film, and electrically connected to the pad. In plan view, the emitter bump partially overlaps an emitter region which is a region of the emitter layer and through which an emitter current flows.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: November 24, 2020
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masao Kondo, Masahiro Shibata
  • Publication number: 20200363938
    Abstract: An information processing apparatus includes a connection unit, a processing execution unit, a setting unit, and a controller. The connection unit is capable of connecting input apparatuses that output operation information for executing an operation for an image displayed on a screen. The processing execution unit is capable of executing processing corresponding to the operation information on the image. The setting unit sets one of the input apparatuses as a main input apparatus, and sets the other input apparatuses as secondary input apparatuses. The controller performs control such that execution of the processing for the image by the processing execution unit based on the operation information from the input apparatus set as the main input apparatus is validated, and execution of the processing for the image by the processing execution unit based on the operation information from the input apparatuses set as the secondary input apparatuses is invalidated.
    Type: Application
    Filed: August 4, 2020
    Publication date: November 19, 2020
    Inventors: Masashi KIMOTO, Shigeatsu YOSHIOKA, Yutaka HASEGAWA, Masao KONDO
  • Publication number: 20200303372
    Abstract: A semiconductor device includes two cell rows, each of which is formed of a plurality of transistor cells aligned in parallel to each other. Each of the plurality of transistor cells includes a collector region, a base region, and an emitter region that are disposed above a substrate. A plurality of collector extended wiring lines are each connected to the collector region of a corresponding one of the plurality of transistor cells and are extended in a direction intersecting an alignment direction of the plurality of transistor cells. A collector integrated wiring line connects the plurality of collector extended wiring lines to each other. A collector intermediate integrated wiring line that is disposed between the two cell rows in plan view connects the plurality of collector extended wring lines extended from the plurality of transistor cells that belong to one of the two cell rows to each other.
    Type: Application
    Filed: March 16, 2020
    Publication date: September 24, 2020
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kenji SASAKI, Masao KONDO, Shigeki KOYA, Shinnosuke TAKAHASHI, Yasunari UMEMOTO, Isao OBU, Takayuki TSUTSUI
  • Patent number: 10782788
    Abstract: A processing device, server, and method are provided. According to some illustrative embodiments, the device and method are implemented by detecting a face region of an image, setting at least one action region according to the position of the face region, comparing image data corresponding to the at least one action region to detection information for purposes of determining whether or not a predetermined action has been performed, and executing predetermined processing based on cooperation control information when it is determined that the predetermined action has been performed and the cooperation control information is received.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: September 22, 2020
    Assignee: Saturn Licensing LLC
    Inventors: Yusuke Sakai, Masao Kondo
  • Patent number: D898039
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: October 6, 2020
    Assignee: SONY CORPORATION
    Inventors: Masao Kondo, Hirotaka Tako
  • Patent number: D912084
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: March 2, 2021
    Assignee: SONY CORPORATION
    Inventors: Tatsuya Hama, Jia Han, Motoki Kobayashi, Masao Kondo, Kenichi Yamaura