Patents by Inventor Masao Kondo

Masao Kondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190190476
    Abstract: A power amplifier circuit includes a first transistor amplifying a first signal; a second transistor amplifying a second signal; a bias circuit supplying a bias current or voltage to a base or gate of the second transistor; and an attenuator attenuating the first or second signal in accordance with a control voltage supplied from the bias circuit. The attenuator includes a first diode to which the control voltage is supplied, a third transistor including a collector connected to a supply path of the first or second signal, an emitter connected to a ground, and a base to which the control voltage is supplied from the first diode, and a capacitor connected in parallel with the first diode. The control voltage decreases as a second signal power level increases. The third transistor allows part of the first or second signal to pass to the emitter in accordance with the control voltage.
    Type: Application
    Filed: December 18, 2018
    Publication date: June 20, 2019
    Inventors: Masao KONDO, Satoshi TANAKA, Yasuhisa YAMAMOTO, Takayuki TSUTSUI, Isao OBU
  • Patent number: 10325214
    Abstract: An information processing apparatus includes a database configured to store a plurality of physical quantities in time-series, a processor, and a memory storing a program causing the processor to execute acquiring the plurality of physical quantities, selecting first explanatory variates, selecting second explanatory variates, generating past case data by acquiring the physical quantities corresponding to the objective variates and an input variate group of the first explanatory variates and the second explanatory variates, searching for predetermined pieces of past case data in the sequence from the shortest of the inter-vector distances, building up the second model from the input variate group in the predetermined pieces of searched past case data and from the objective variates, and predicting values of objective variates from the second model.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: June 18, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Masatoshi Ogawa, Takeo Kasajima, Hiroshi Endo, Hiroyuki Fukuda, Masao Kondo
  • Patent number: 10316778
    Abstract: An estimation device includes: a memory and a processor, wherein the processor is configured to execute a process including: determining a point of a burning having a higher peak in a predetermined range of a heat release rate based on a peak of a burning having a smaller peak, in a heat release rate waveform in an internal combustion engine that performs a multiple-stage fuel injection; calculating a tangential line of the heat release rate waveform at the point; setting a predetermined point on the tangential line as an initial value for identifying a model parameter of a heat release rate model; identifying the model parameter so that a difference between a calculation value of the heat release rate model and the heat release rate waveform is reduced with use of the initial value; and estimating a heat release rate with a result of an identification of the identifying.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: June 11, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Masatoshi Ogawa, Noriyasu Aso, Hiromitsu Soneda, Takeo Kasajima, Masao Kondo
  • Publication number: 20190172933
    Abstract: A bipolar transistor including a first collector layer, a second collector layer, a base layer, and an emitter layer is disposed on a substrate. Etching characteristics of the second collector layer are different from etching characteristics of the first collector layer and the base layer. In plan view, an edge of an interface between the first collector layer and the second collector layer is disposed inside an edge of a lower surface of the base layer, and an edge of an upper surface of the second collector layer coincides with the edge of the lower surface of the base layer or is disposed inside the edge of the lower surface of the base layer.
    Type: Application
    Filed: November 30, 2018
    Publication date: June 6, 2019
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Isao OBU, Yasunari UMEMOTO, Masahiro SHIBATA, Shigeki KOYA, Masao KONDO, Takayuki TSUTSUI
  • Patent number: 10275938
    Abstract: An image processing apparatus including: a real space information input portion into which information about a real space is input; and a signal generating portion that generates a control signal for an image that creates a virtual shadow effect in the real space on the basis of the information about the real space.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: April 30, 2019
    Assignee: SONY CORPORATION
    Inventors: Masao Kondo, Hirotaka Tako, Yusuke Tsujita, Daisuke Shiono, Isao Nakajima, Kenichi Yamaura
  • Publication number: 20190109066
    Abstract: A power amplifier module includes a substrate including, in an upper surface of the substrate, an active region and an element isolation region. The power amplifier module further includes a collector layer, a base layer, and an emitter layer that are stacked on the active region; an interlayer insulating film that covers the collector layer, the base layer, and the emitter layer; a pad that is thermally coupled to the element isolation region; and an emitter bump that is disposed on the interlayer insulating film, electrically connected to the emitter layer through a via hole provided in the interlayer insulating film, and electrically connected to the pad. In plan view, the emitter bump partially overlaps an emitter region which is a region of the emitter layer and through which an emitter current flows.
    Type: Application
    Filed: October 5, 2018
    Publication date: April 11, 2019
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Masao KONDO, Masahiro SHIBATA
  • Publication number: 20190088768
    Abstract: A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.
    Type: Application
    Filed: September 7, 2018
    Publication date: March 21, 2019
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Isao OBU, Yasunari UMEMOTO, Masahiro SHIBATA, Shigeki KOYA, Masao KONDO, Takayuki TSUTSUI
  • Publication number: 20190058444
    Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
    Type: Application
    Filed: October 24, 2018
    Publication date: February 21, 2019
    Inventors: Masao Kondo, Hidetoshi Matsumoto
  • Publication number: 20190042080
    Abstract: An information processing apparatus includes a connection unit, a processing execution unit, a setting unit, and a controller. The connection unit is capable of connecting input apparatuses that output operation information for executing an operation for an image displayed on a screen. The processing execution unit is capable of executing processing corresponding to the operation information on the image. The setting unit sets one of the input apparatuses as a main input apparatus, and sets the other input apparatuses as secondary input apparatuses. The controller performs control such that execution of the processing for the image by the processing execution unit based on the operation information from the input apparatus set as the main input apparatus is validated, and execution of the processing for the image by the processing execution unit based on the operation information from the input apparatuses set as the secondary input apparatuses is invalidated.
    Type: Application
    Filed: October 12, 2018
    Publication date: February 7, 2019
    Inventors: Masashi KIMOTO, Shigeatsu YOSHIOKA, Yutaka HASEGAWA, Masao KONDO
  • Patent number: 10191644
    Abstract: Provided is an information processing apparatus including an operation detection unit configured to detect a user's operation, and a display control unit configured to display content in a part including a middle of a display screen and display thumbnails corresponding to content belonging to one category in one direction along one side of the display screen in a region located separately from the middle of the display screen. The display control unit moves the displayed thumbnails in a vertical direction with respect to the one direction according to an operation which is detected by the operation detection unit and is an operation of switching the one category to which the content corresponding to the displayed thumbnails belongs.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: January 29, 2019
    Assignee: Sony Corporation
    Inventors: Seiji Suzuki, Naoki Saito, Kazuto Nishizawa, Masao Kondo
  • Patent number: 10178809
    Abstract: A module-type data center includes: a casing having an intake vent and an exhaust vent; a rack accommodating an electronic device; an air blower configured to introduce outside air into the casing through the intake vent and pass air through the rack from one of surfaces of the rack to another one of the surfaces of the rack; a shielding-slat unit including a plurality of shielding slats configured to change between an open state and a closed state and drive devices configured to drive the corresponding shielding slats. An inner space of the casing is divided into a first space defined between the one surface of the rack and the intake vent, a second space defined between the other surface of the rack and the exhaust vent, and a third space defined above the rack and allowing the second space to communicate with the first space.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: January 8, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Hiroshi Endo, Masao Kondo, Hiroyuki Fukuda, Masatoshi Ogawa
  • Patent number: 10177724
    Abstract: A power amplifier circuit includes first and second transistors and a first voltage output circuit. A radio frequency signal is input into a base of the first transistor. The first voltage output circuit outputs a first voltage in accordance with a power supply voltage. The first voltage is supplied to a base or a gate of the second transistor. An emitter or a source of the second transistor is connected to a collector of the first transistor. A first amplified signal generated by amplifying the radio frequency signal is output from a collector or a drain of the second transistor.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: January 8, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Takayuki Tsutsui, Masao Kondo, Satoshi Arayashiki, Fumio Harima, Masatoshi Hase
  • Publication number: 20180367659
    Abstract: To provide an information processing device, information processing method, and program that make it possible to improve convenience at the time of operation with regard to an operation target. The information processing device includes: an operation target selecting section that cancels a selected state of a target selected as an operation target on a basis of detection of a posture of an object; and a lock control section that changes a condition for cancelling the selected state on a basis of a predetermined determination criterion.
    Type: Application
    Filed: November 8, 2016
    Publication date: December 20, 2018
    Inventors: MASAO KONDO, HIROTAKA TAKO, HIDENORI KARASAWA, KENICHI YAMAURA, YOSHIHITO OHKI, YOSHIYASU KUBOTA, TOMOHIRO ISHII
  • Publication number: 20180353916
    Abstract: Non-clogging airlift pumps and associated systems and methods employing said pumps. The airlift pumps generally include an enclosed air tank within which is located a hollow cylinder having an open top and a closed bottom wall. A gas (e.g., air) line passes into the air tank for supplying gas thereto. A suction port is located in the bottom wall of the cylinder, and a substantially vertically-oriented discharge pipe passes through a top wall of the air tank such that an intake end of the discharge pipe resides within the cylinder. Multiple airlift pumps may be used in conjunction in a given application.
    Type: Application
    Filed: June 28, 2018
    Publication date: December 13, 2018
    Applicant: Pulsed Burst Systems, LLC
    Inventor: Masao Kondo
  • Patent number: 10141890
    Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: November 27, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Hidetoshi Matsumoto
  • Patent number: 10114533
    Abstract: An information processing apparatus includes a connection unit, a processing execution unit, a setting unit, and a controller. The connection unit is capable of connecting input apparatuses that output operation information for executing an operation for an image displayed on a screen. The processing execution unit is capable of executing processing corresponding to the operation information on the image. The setting unit sets one of the input apparatuses as a main input apparatus, and sets the other input apparatuses as secondary input apparatuses. The controller performs control such that execution of the processing for the image by the processing execution unit based on the operation information from the input apparatus set as the main input apparatus is validated, and execution of the processing for the image by the processing execution unit based on the operation information from the input apparatuses set as the secondary input apparatuses is invalidated.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: October 30, 2018
    Assignee: Sony Corporation
    Inventors: Masashi Kimoto, Shigeatsu Yoshioka, Yutaka Hasegawa, Masao Kondo
  • Patent number: 10090868
    Abstract: A transmission module includes an amplifier that amplifies a plurality of transmission signals in different frequency bands, a power supply voltage regulator circuit that supplies different power supply voltages for the respective frequency bands of the transmission signals to the amplifier, and a variable matching circuit including at least one variable capacitor element and at least one fixed inductor element. The variable matching circuit satisfies different output impedance matching conditions of the amplifier for the respective frequency bands of the transmission signals by changing a capacitance value of the at least one variable capacitor element on the basis of a change in the output impedance matching conditions of the amplifier in response to a change in the power supply voltages supplied to the amplifier.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: October 2, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masao Kondo
  • Patent number: 10088623
    Abstract: The present disclosure relates to a light emitting device that can improve design of emitted light. A communication substrate is provided with an LED indicator which emits light. A light guiding plate has a concave surface portion which is a concave surface to cover the LED indicator, and receives the light from the LED indicator using the concave surface portion. A storage case stores the communication substrate and the light guiding plate in a state where a part of the light guiding plate is exposed. The light guiding plate allows the light from the LED indicator to penetrate to a part of the light guiding plate exposed from the storage case by diffusing the light received using the concave surface portion. For example, the present disclosure is applicable to the light emitting device that emits light using an LED or the like.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: October 2, 2018
    Assignee: Saturn Licensing LLC
    Inventors: Soichiro Nakamura, Hiroyasu Sato, Masao Kondo, Hirotaka Tako, Keiichi Takahashi, Shin Yamamoto, Ken Yano, Takanobu Wada, Kazuya Tateishi
  • Publication number: 20180246627
    Abstract: Provided is an information processing apparatus including an operation detection unit configured to detect a user's operation, and a display control unit configured to display content in a part including a middle of a display screen and display thumbnails corresponding to content belonging to one category in one direction along one side of the display screen in a region located separately from the middle of the display screen. The display control unit moves the displayed thumbnails in a vertical direction with respect to the one direction according to an operation which is detected by the operation detection unit and is an operation of switching the one category to which the content corresponding to the displayed thumbnails belongs.
    Type: Application
    Filed: May 2, 2018
    Publication date: August 30, 2018
    Inventors: Seiji Suzuki, Naoki Saito, Kazuto Nishizawa, Masao Kondo
  • Patent number: 10061365
    Abstract: A temperature management system includes a detection unit for detecting a temperature of a heat generator, power consumption, and an intake air temperature of the electronics device; a control unit for controlling a manipulated variable to be given to the cooling device so that the temperature of the heat generator becomes close to a target value, wherein the control unit includes controllers assigned respectively to operating ranges of the electronics device and each controller includes a prediction model for predicting a future temperature of the heat generator under conditions set for the corresponding operating range, and a vector distance between a first vector for a current state of the electronic device and a second vector for conditions included in the prediction model is calculated to select the controller that corresponds to the prediction model of the shortest vector distance.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: August 28, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Masatoshi Ogawa, Hiroyoshi Kodama, Hiroshi Endo, Hiroyuki Fukuda, Masao Kondo