Abstract: Speaker system is constructed of a plurality of speakers each including a bass-reflex type cabinet. The speaker system is designed to differentiate a low-band resonance frequency between the speakers by differentiating inner cubic capacities of the speaker cabinets from each other. Audio signal of a different channel is input to each of the speakers, and only low-frequency signals of all of the channels are added together so that the added result is supplied to all of the speakers. Thus, using the differentiated low-band resonance frequencies, the speaker system permits reproduction of low-pitched sounds with a flat characteristic.

Abstract: A switching power device uses a non-capacitor flyback converter circuit not provided with a smoothing input capacitor having a large capacity. Therefore, a power harmonic can be suppressed and a rush current preventing element is not required. A fluctuation in an output current to be supplied to a load is fed back to the non-capacitor flyback converter circuit by a feedback circuit at a lower speed than an input AC frequency. Therefore, it is possible to improve a power factor by causing an input AC current to be proportional to an input AC voltage. A voltage control circuit controls an output voltage so as to have a constant voltage, and the output voltage is dropped in proportion to an output current when the output current exceeds a threshold. Therefore, it is possible to have the same output characteristic as a power device comprising a low frequency power transformer.

Abstract: Input signal amplified by an input amplifier is delivered via a voltage limiter circuit to a power amplifier, and a speaker is driven by the signal amplifier by the power amplifier. Voltage produced across a resistor, which is proportional to an output current flowing to the speaker is detected by a current detecting amplifier, and the amplitude of the signal to be inputted to the power amplifier is controlled in accordance with the current value detected by the current detecting amplifier. Thus, the maximum output power can be controlled irrespective of impedance of the speaker. By also controlling the voltage limiter circuit in accordance with an instantaneous value of the output current, the continuous maximum output value and instantaneous maximum output value can be controlled independently of each other.

Abstract: An adaptor is connectable between a signal processor and a transmission module. The signal processor has three audio channels for feeding respectively a first audio signal, a second audio signal, and a third audio signal having a frequency range lower than a frequency range of the first and second audio signals. The transmission module has two transmission channels capable of transmitting two audio signals to a codeless speaker. The adaptor has three input terminals for receiving the first, second and third audio signals from the signal processor. The adaptor filters at least one of the first and second audio signals for cutting therefrom a lower frequency range comparative to the lower frequency range of the third audio signal, and adds the third audio signal to the one of the first and second audio signals from which the lower frequency range is cut.

Abstract: A complementary signal generating circuit (301) generates first complementary signals (S1, S2) from a PWM signal. A signal converting circuit (302) converts the first complementary signals to second complementary signals (S3, S4 or S5, S6) having a voltage component based on a negative power supply (VPP?). Among the second-complementary signals, the signals (S3, S4) are supplied to a driving circuit (305), and the signals (S5, S6) are supplied to a current driving circuit (303). In response to the signals (S5, S6), the current driving circuit outputs third complementary signals (H3, H4) having a current component that is directed toward the negative power supply (VPP?), to a driving circuit (304). As a result, the driving circuits (304, 305) complementarily drive power-MOS transistors (401, 402).

Abstract: An input signal (SIN) is inverted by an inverter (101), and the inverted input signal is entered into a tri-state type inverter (104). An output portion of this inverter is connected via a delay path (105) to an input portion of an operational amplifier (106). This operational amplifier owns a hysteresis characteristic with respect to a signal entered thereinto. An exclusive-OR gate circuit (103) controls to set the output state of the inverter to a low impedance state upon receipt of a signal (S11) obtained by inverting the input signal, and controls to set the output state of the inverter to a high impedance state upon receipt of a signal (S16) output from the operational amplifier. As a result, an amplitude of a signal (S15) is limited to a constant amplitude in response to the hysteresis characteristic of the operational amplifier (106), and a delay time is made constant.

Abstract: An operational amplifier has a differential amplifier stage comprising a pair of first PMOS transistors for inputting signals, which are arranged between a positive voltage supply coupled with a first constant current source and a negative voltage supply, wherein second PMOS transistors of a high voltage resistant type, gates of which are biased to a prescribed voltage, are arranged on current paths lying between the first PMOS transistors and the negative voltage supply together with load resistors. Herein, each of drain voltages of the first PMOS transistors is limited to a certain value that is higher than the prescribed voltage by a gate threshold voltage. Therefore, even when the first PMOS transistors are configured of a normal voltage resistant type, it is possible to reliably prevent voltages applied to the first PMOS transistors from exceeding breakdown voltages thereof, thus avoiding unnecessary reduction of an S/N ratio.

Abstract: A current detection circuit applicable to a switching circuit using switching transistors to supply a prescribed load current to a load, comprises a sample-hold capacitor for temporarily holding a terminal voltage of the switching transistor that is turned on, and a switch that is inserted between the switching transistor and sample-hold capacitor and is controlled to be turned on in synchronization with the ON-timing of the switching transistor, wherein charged voltage of the sample-hold capacitor is detected as a detection voltage. An overcurrent detection circuit is constituted in such a way that the switching transistor is compulsorily turned off when the detection voltage exceeds reference voltage. The switching circuit may correspond to a pulse-width modulation (PWM) amplifier using a pair of a PMOS transistor and an NMOS transistor that are alternately turned on or off.

Abstract: A lateral PNP transistor PB and a lateral NPN transistor NB are serially connected between an input terminal and a reference potential (ground potential). In the transistor PB, a diode D1 is formed. In the transistor NB, a diode D3 is formed. When an ESD of +2000 V is input, the transistor NB turns on, whereas when an ESD of ?2000 V is input, the transistor PB turns on. The level of a positive signal capable of being input is limited by the inverse breakdown voltage (e.g., 18 to 50 V) of the diode D3, whereas the level of a negative signal capable of being input is limited by the inverse breakdown voltage (e.g., 13 to 15 V) of the diode D1.

Abstract: A detecting circuit (REFH, CM11, LA1, TN1, RN1) which detects an overcurrent flowing through a power-MOS transistor (401) in an output stage to output a first signal (ITN1) is disposed in a first driving circuit (303H) on the side of a high-side driver. Another detecting circuit (REFL, CM21, LA2, TN2, RN2) which detects an overcurrent flowing through a power-MOS transistor (402) in the output stage to output a second signal (ITN2) is disposed in a driving circuit (303L) on the side of a low-side driver. The first signal (ITN1) is converted to a third signal (ITT2) based on a negative power supply (VPP?), by a signal converting circuit. The third signal is added to the second signal. In response to the addition signal, a pulse signal to be input to the driving circuits (303H and 303L) is blocked.

Abstract: A vibration source driving device that realizes various vibration functions on portable telephones. The vibration source driving device includes a sound source for generating musical tone signals in response to music data. A vibration source to generate vibration, a driver to drive the vibration and a control circuit are further included such that the vibration source may be driven in synchronization with the rhythm signal within the music data.

Abstract: A lateral PNP transistor PB and a lateral NPN transistor NB are serially connected between an input terminal and a reference potential (ground potential). In the transistor PB, a diode D1 is formed. In the transistor NB, a diode D3 is formed. When an ESD of +2000 V is input, the transistor NB turns on, whereas when an ESD of ?2000 V is input, the transistor PB turns on. The level of a positive signal capable of being input is limited by the inverse breakdown voltage (e.g., 18 to 50 V) of the diode D3, whereas the level of a negative signal capable of being input is limited by the inverse breakdown voltage (e.g., 13 to 15 V) of the diode D1.

Abstract: Power amplifies are provided to correspond with a plurality of speaker units constituting a speaker array. Driving signals from the power amplifies are supplied to one terminals of the speaker units, and other terminals are connected a common line. Inverters are provided at preceding stages of the power amplifies such that the driving signals supplied to the speaker units being arranged adjacently have an opposite phase respectively. Since a correlation between the driving signals of the adjacent speaker units is high, a current flowing through the common line can be very reduced. An LED display panel can be driven by the similar method.

Abstract: Optical disk writing apparatus includes a flexible substrate connecting a main sheep and a pickup section. Because the flexible substrate has poor frequency characteristics, a frequency band for signals transmitted through the flexible substrate is lowered. Namely, a write strategy circuit and the like which output signals containing a lot of high-frequency components are provided in the pickup section. Further, to suppress an amount of heat emission from the pickup section, the main sheet section includes a constant-current supply/current consumption circuit that consumes a current not consumed by a laser diode.

Abstract: The integrating circuit of the triangular wave generating circuit includes an operational amplifier and a capacitor. Switch elements are alternatively turned ON and capacitors are alternatively recharged by the currents flowing in constant-current circuits thus obtaining a triangular wave on an output terminal. In this practice, when the voltage on the output terminal reaches ±1 V, comparator circuits (41, 42) and a flip-flop including NAND gates change over the switch elements. The currents flowing in the constant-current circuits are controlled depending on the current flowing in a load circuit. The current flowing in the load circuit is controlled by a PLL circuit including a phase comparator circuit, a loop filter, an LPF, an operational amplifier and an FET. This provides an output triangular wave having the same frequency as a clock pulse (CK).

Abstract: An amplitude adjustment device such as an amplitude compression device and amplitude expansion device is basically configured by a PWM modulator, a demodulator and an amplitude detector. Herein, the PWM modulator effects pulse-width modulation on an input signal to produce a pulse-width modulated signal, which is demodulated by the demodulator to produce an output signal. In addition, the amplitude detector detects an amplitude of a demodulated signal or an amplitude of the input signal to produce a control signal. A modulation factor of the pulse-width modulation is adjusted based on the control signal. In the case of the amplitude compression device, an input/output gain is changed inversely proportional to the amplitude of the input signal or amplitude of the output signal. Thus, it is possible to compress a dynamic range with respect to input/output characteristics.

Abstract: A pulse-width modulation circuit comprises a comparator having hysteresis characteristics of positive feedback, and an integrator, whose integrated output is compared with an input signal to produce a pulse-width modulation (PWM) signal having an advanced phase characteristic due to differentiation of the input signal. A switching circuit amplifies the pulse-width modulation signal based on the positive and negative source voltages (VPX, VMX). The amplified pulse-width modulation signal is supplied to a speaker via an LC filter, and it is also negatively fed back to the pulse-width modulation circuit. Since the pulse-width modulation signal whose phase is advanced is transmitted through the LC filter, it is possible to reduce phase revolution in the output of the power amplifier circuit. Thus, it is possible to effect negative feedback on the pulse-width modulation signal in a stable manner.

Abstract: There is provided a power supply circuit having a simple configuration which is capable of eliminating an adverse effect due to pumping operation. The capacitor-input positive and negative power supply circuit is comprised of diodes, switching circuits connected in parallel with the diodes, and control circuits that control the switching circuits such that the switching circuits conduct during a time period over which the diodes conduct.

Abstract: Input signal amplified by an input amplifier is delivered via a voltage limiter circuit to a power amplifier, and a speaker is driven by the signal amplifier by the power amplifier. Voltage produced across a resistor, which is proportional to an output current flowing to the speaker is detected by a current detecting amplifier, and the amplitude of the signal to be inputted to the power amplifier is controlled in accordance with the current value detected by the current detecting amplifier. Thus, the maximum output power can be controlled irrespective of impedance of the speaker. By also controlling the voltage limiter circuit in accordance with an instantaneous value of the output current, the continuous maximum output value and instantaneous maximum output value can be controlled independently of each other.

Abstract: There is provided a D/A converter that is free from a variation in the voltage width of 1 LSB between more significant bits and less significant bits of data for conversion due to variations in characteristics of resistors, transistors, etc. to thereby ensure a higher conversion accuracy than the conventional D/A converter. The eight more significant bits of 12-bit data for conversion are applied to a decoder 21, while the four less significant bits of the same are applied to a current addition circuit 22. The decoder 21 selects one of FET's F0 to F255 based on the eight more significant bits to cause one of voltages divided by a series circuit formed by resistors r0 to r255 to be applied to an operational amplifier 40. On the other hand, switches 30 to 33 of the current addition circuit 22 are switched, respectively, by the four less significant bits to turn respective FET's 35 to 38 on and off.