Abstract: A delta-sigma modulator for use in power amplification of audio signals is configured by an integration circuit, a 1-bit quantizer, an output inversion inhibitor circuit, a delay circuit, and an adder. An analog signal is supplied to the integration circuit by way of the adder, wherein it is subjected to integration. An integration result is subjected to quantization by the 1-bit quantizer to produce 1-bit digital signals. The output inversion inhibitor circuit inhibits an output signal of the 1-bit quantizer from being re-inverted during a re-inversion inhibiting period corresponding to a preset number ‘N’ (where N≧2) of clock pulses counted after the timing when the output signal of the 1-bit quantizer is inverted. The output of the output inversion inhibitor circuit is delayed by one sample and is fed back to the adder by way of the delay circuit.

Abstract: An electro-coagulation printer uses an electrode control unit to drive electrodes which are aligned in proximity to a rotation drum having a conductive ink film on its surface. The electrodes are respectively electrified to partially coagulate the conductive ink film to form ink dots on the surface of the rotation drum, so that the ink dots are transferred onto a paper. Herein, the electrode control unit receives print data from a host device by way of an interface. Gradation data representing gradation values for one line of the electrodes are created based on the print data and are output in a serial manner. The serial gradation data are converted to parallel data corresponding to the gradation values, which are held and controlled in output timing. Based on the gradation values, pulse signals are generated to drive the electrodes respectively.

Abstract: A lateral PNP transistor PB and a lateral NPN transistor NB are serially connected between an input terminal and a reference potential (ground potential). In the transistor PB, a diode D1 is formed. In the transistor NB, a diode D3 is formed. When an ESD of +2000 V is input, the transistor NB turns on, whereas when an ESD of −2000 V is input, the transistor PB turns on. The level of a positive signal capable of being input is limited by the inverse breakdown voltage (e.g., 18 to 50 V) of the diode D3, whereas the level of a negative signal capable of being input is limited by the inverse breakdown voltage (e.g., 13 to 15 V) of the diode D1.

Abstract: A delta-sigma modulator for use in power amplification of audio signals is configured by an integration circuit, a 1-bit quantizer, an output inversion inhibitor circuit, a delay circuit, and an adder. An analog signal is supplied to the integration circuit by way of the adder, wherein it is subjected to integration. An integration result is subjected to quantization by the 1-bit quantizer to produce 1-bit digital signals. The output inversion inhibitor circuit inhibits an output signal of the 1-bit quantizer from being re-inverted during a re-inversion inhibiting period corresponding to a preset number ‘N’ (where N≧2) of clock pulses counted after the timing when the output signal of the 1-bit quantizer is inverted. The output of the output inversion inhibitor circuit is delayed by one sample and is fed back to the adder by way of the delay circuit.

Abstract: A highly efficient analog-to-digital (A/D) converter circuit that converts an external analog signal sequentially generated from an external analog signal source into an n-bit digital data signal (n is an integer equal to or more than two) includes a digital-to-analog (D/A) converter circuit that converts an n-bit digital data signal into an analog signal and outputting the analog signal from a first output terminal, a comparator that compares a signal level of an external analog signal supplied from an external device with a signal level of the analog signal outputted from the first output terminal, and a digital integrator circuit that digitally integrates a 1-bit digital data signal outputted from the comparator and thereby producing an n-bit digital data signal.

Abstract: The present invention provides a high-accuracy and multi-bit D/A converter which can be produced using a CMOS process. A resistor string is formed of a plurality of resistors connected in series. A switch matrix has switch strings each formed of switches each having one end thereof connected to a corresponding one of junctions of the resistors and having respective other ends commonly connected to one of common junctions. A decoder turns on and off the switches of the switch strings according to more significant bits of data for conversion. A less significant bits-conversion circuit generates a voltage corresponding to less significant bits of the data for conversion and outputs the voltage. An operational amplifier carries out addition or subtraction of a voltage at each of the common junctions and an output from the less significant bits-conversion circuit.

Abstract: An electronic volume circuit is provided, which can be driven by a single power source and can therefore be formed by an LSI that can be fabricated in a simple manner using an oxide film and a junction process for a single power source.

Abstract: There are provided a waveform shaper that shapes a waveform of a one-bit data signal obtained by subjecting an input data signal to sigma-delta modulation, to generate an output data signal, and a sigma-delta D/A converter incorporating the waveform shaper. A clock jitter-detecting device detects jitter of a clock signal used for generating the one-bit data signal and generates an error signal indicative of the detected jitter of the clock signal. An amplitude-adjusting device shapes the waveform of the one-bit data signal by using the clock signal, and adjusts amplitude of the shaped one-bit data signal in response to the error signal, to generate the output data signal.

Abstract: A delay circuit is provided, which is capable of eliminating the influence of noise of low frequency as disturbance. A plurality of memory cells including a plurality of capacitors store an analog signal as an input signal by storing charge of the input signal in the capacitors. A first inverting device inverts the input signal to generate an inverted signal. A control circuit generates and delivers control signals to the memory cells to select the input signal and the inverted signal alternately and sequentially write the selected signals into the memory cells in a predetermined writing sequence. The control circuit further generates and delivers to the memory cells to sequentially read out the input signal and the inverted signal from the memory cells in a sequence corresponding to the predetermined writing sequence. A second inverting device inverts the read-out inverted signal. An output signal is synthesized from the read-out input signal and an output signal of the second inverting device.

Abstract: An analog-digital converter includes a .DELTA..SIGMA. modulator, a digital filter, a high-pass filter and a multiplier which are connected in series. Analog input is converted into serial-bit strings by the .DELTA..SIGMA. modulator, for which gain `1/A` is set. The digital filter extracts low-frequency components, corresponding to the analog input, from the serial-bit strings, so the low-frequency components are converted into parallel-bit digital data. The high-pass filter removes DC offset component from output of the digital filter; and then, output thereof is multiplied by scaling gain `A` by the multiplier so that digital output is produced. The .DELTA..SIGMA. modulator includes at least three switched-capacitor integrators and a one-bit quantizer, which are connected in series, as well as a one-sample delay circuit. One-bit output, produced by the one-bit quantizer, is delayed by the one-sample delay circuit, whose output is delivered to each switched-capacitor integrator.

Abstract: An information-discriminating circuit has a biasing device that superposes bias voltage on an input signal, and a comparator that discriminates information by comparing an output signal from the biasing device with a threshold value. The difference between the bias voltage and the threshold value is continuously adjusted such that a noise margin is varied according to the amplitude of the input signal.

Abstract: A mixing circuit that mixes a plurality of input signals are provided. A plurality of input terminals receive the input signals, respectively. A plurality of first resistors each providing input resistance each have one end thereof connected to a corresponding one of the input terminals, and another end thereof connected to corresponding ends of the other first resistors. A first amplifier has a positive input terminal to which the another end of each of the first resistors is commonly connected. A second resistor has one end connected to the output terminal of the first amplifier, and another end connected to the negative input terminal of the first amplifier. A second amplifier has a negative input terminal to which the another end of the second resistor is connected, with a positive input terminal thereof grounded. A plurality of third resistors are connected in series between the negative input terminal of the second amplifier and the positive input terminal of the first amplifier.

Abstract: A driving circuit has first and second output terminals for connection with a load, for supplying the load with a constant voltage changing in polarity at predetermined timing, through the output terminals. A bridge circuit has first and second output nodes connected, respectively, to the first and second output terminals. A selector circuit selectively drives a plurality of current changeover switching elements of the bridge circuit. First and second differential amplifier circuits have first input terminals supplied with a predetermined reference voltage and second input terminals connected, respectively, to the first and second output nodes, and a common output terminal. A switching circuit selectively connects the first and second differential amplifier circuits to a power source in response to selective driving of the current changeover switching elements by the selector circuit.

Abstract: A sound field processor having amplitude/phase conversion circuits for left and right channels of a stereophonic signal. The amplitude/phase conversion circuits for left and right channels have substantially the same circuit structure. Each of the amplitude/phase conversion circuits has an inversion amplifier, an amplitude/phase characteristic changing circuit that changes amplitude and phase characteristics of an output from the inversion amplifier, and a feedback device that add outputs from the amplitude/phase characteristic changing circuit and outputs from the inversion amplifier to an input signal to generate a sum signal and feed back the sum signal to the inversion amplifier. An output from the inversion amplifier for the left channel and an output from the amplitude/phase characteristic changing circuit for the right channel are added by a first adder device.

Abstract: A D/A converter circuit has at least two multiple-bit type D/A converters connected in parallel with each other. The circuit also includes a random signal generation circuit that generates a random signal voltage having a voltage value that timewise, randomly changes at each sampling cycle. The random signal voltage is added to and subtracted from a digital signal to be inputted to the at least two D/A converters. As a result, offset voltages whose sum is zero are added to the digital signals to be inputted to the D/A converters. The signals are D/A converted by the plurality of D/A converters to provide analog outputs, which are then added together by an analog adder.

Abstract: An analog-digital converter comprises a .DELTA. .SIGMA. modulator, a digital filter, a high-pass filter and a multiplier which are connected in series. Analog input is converted into serial-bit strings by the .DELTA. .SIGMA. modulator, for which gain `1/A` is set. The digital filter extracts low-frequency components, corresponding to the analog input, from the serial-bit strings, so the low-frequency components are converted into parallel-bit digital data. The high-pass filter removes DC offset component from output of the digital filter; and then, output thereof is multiplied by scaling gain `A` by the multiplier so that digital output is produced. The .DELTA. .SIGMA. modulator comprises at least three switched-capacitor integrators and a one-bit quantizer, which are connected in series, as well as a one-sample delay circuit. One-bit output, produced by the one-bit quantizer, is delayed by the one-sample delay circuit, whose output is delivered to each switched-capacitor integrator.

Abstract: A digital-to-analog converter circuit is configured by a digital-to-analog converter receiving data of m bits (where `m` is an integer arbitrarily selected), a voltage-follower circuit containing an operational amplifier, a current-mirror circuit and a current-switching circuit. Herein, the data of m bits are extended by bits b.sub.H and b.sub.L in low-order positions thereof, wherein b.sub.H is placed in a higher order than b.sub.L. A noninverting input of the operational amplifier is connected to an output of the digital-to-analog converter; and a feedback resistor is connected between an inverting input and an output of the operational amplifier. The current-mirror circuit, using MOS transistors, provides two constant currents I.sub.H and I.sub.L in response to the bits b.sub.H and b.sub.L respectively, wherein a relationship between the constant currents I.sub.H and I.sub.L is defined by an equation of I.sub.H =2.times.I.sub.L.

Abstract: A digital-to-analog converter circuit mainly comprises a D/A conversion part, an operational amplifier and a reference-voltage producing circuit. The D/A conversion part is configured by a resistance string, consisting of a string of resistors connected in series, and a plurality of switches which are each turned on or off response to a digital input. The reference-voltage producing circuit produces a reference voltage, the level of which is stabilized and is not affected by power-supply voltage. The operational amplifier has two inputs, wherein a noninverting input receives the reference voltage, while an inverting input is connected to a center-tap terminal of the resistance string. An output terminal of the operational amplifier is connected to a positive-power-supply terminal of the D/A conversion part.

Abstract: An analog-to-digital converter mainly comprises an analog-to-digital conversion unit which produces a digital output, as an equivalent of an analog input supplied thereto, by performing a successive approximation. Herein, an instantaneous value of the analog input is compared with a reference signal so as to determine the digit in each of the bits of the digital output. The analog-to-digital converter can further comprise an analog comparator, an analog amplifier and a digital attenuator in order to reduce an effect of the noise. The analog amplifier amplifies the analog input by a gain so as to produce an intermediate analog signal. The analog-to-digital conversion unit converts the intermediate analog signal into an intermediate digital signal. The digital attenuator attenuates the intermediate digital signal by an attenuation rate so as to produce the digital output.

Abstract: A power supply circuit includes a DC--DC converter, a switching inverter circuit connected to an output terminal of the DC--DC converter and an output circuit for rectifying and smoothing an output of the switching inverter circuit to provide a dc output. The DC--DC converter has a first inductance element inserted in series in at least one of an input terminal and an output terminal, and a second inductance element inserted between a reference potential terminal.